1//===-- M68kInstrBits.td - Bit Manipulation Instrs ---------*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file describes the bit manipulation instructions in the M68k
11/// architecture. Here is the current status of the file:
12///
13///  Machine:
14///
15///    BCHG    [ ]   BCLR    [ ]   BSET     [ ]   BTST     [~]
16///
17///  Map:
18///
19///   [ ] - was not touched at all
20///   [!] - requires extarnal stuff implemented
21///   [~] - in progress but usable
22///   [x] - done
23///
24//===----------------------------------------------------------------------===//
25
26//===----------------------------------------------------------------------===//
27// BTST
28//===----------------------------------------------------------------------===//
29
30/// ------------+---------+---------+---------+---------
31///  F  E  D  C | B  A  9 | 8  7  6 | 5  4  3 | 2  1  0
32/// ------------+---------+---------+---------+---------
33///  0  0  0  0 |   REG   | 1  0  0 |   MODE  |   REG
34/// ------------+---------+---------+---------+---------
35class MxBTSTEnc_R<MxBeadDReg REG, MxEncEA EA, MxEncExt EXT>
36    : MxEncoding<EA.Reg, EA.DA, EA.Mode, MxBead3Bits<0b100>, REG, MxBead4Bits<0b0000>,
37                 EXT.Imm, EXT.B8, EXT.Scale, EXT.WL, EXT.DAReg>;
38
39/// -------------------------------+---------+---------
40///  F  E  D  C  B  A  9  8 . 7  6 | 5  4  3 | 2  1  0
41/// -------------------------------+---------+---------
42///  0  0  0  0  1  0  0  0 . 0  0 |   MODE  |   REG
43/// ------------------------+------+---------+---------
44///  0  0  0  0  0  0  0  0 |        BIT NUMBER
45/// ------------------------+--------------------------
46class MxBTSTEnc_I<MxBead8Imm IMM, MxEncEA EA, MxEncExt EXT>
47    : MxEncoding<EA.Reg, EA.DA, EA.Mode, MxBead2Bits<0b00>,
48                 MxBead4Bits<0b1000>, MxBead4Bits<0b0000>, IMM,
49                 EXT.Imm, EXT.B8, EXT.Scale, EXT.WL, EXT.DAReg>;
50
51let Defs = [CCR] in {
52class MxBTST_RR<MxType TYPE>
53    : MxInst<(outs), (ins TYPE.ROp:$dst, TYPE.ROp:$bitno), "btst\t$bitno, $dst",
54             [(set CCR, (MxBtst TYPE.VT:$dst, TYPE.VT:$bitno))],
55             MxBTSTEnc_R<MxBeadDReg<1>, MxEncEAd_0, MxExtEmpty>>;
56
57class MxBTST_RI<MxType TYPE>
58    : MxInst<(outs), (ins TYPE.ROp:$dst, TYPE.IOp:$bitno), "btst\t$bitno, $dst",
59             [(set CCR, (MxBtst TYPE.VT:$dst, TYPE.IPat:$bitno))],
60             MxBTSTEnc_I<MxBead8Imm<1>, MxEncEAd_0, MxExtEmpty>>;
61
62class MxBTST_MR<MxType TYPE, MxOperand MEMOpd, ComplexPattern MEMPat,
63                MxEncEA EA, MxEncExt EXT>
64    : MxInst<(outs), (ins MEMOpd:$dst, TYPE.ROp:$bitno), "btst\t$bitno, $dst",
65             [(set CCR, (MxBtst (TYPE.Load MEMPat:$dst), TYPE.VT:$bitno))],
66             MxBTSTEnc_R<MxBeadDReg<1>, EA, EXT>>;
67
68class MxBTST_MI<MxType TYPE, MxOperand MEMOpd, ComplexPattern MEMPat,
69                MxEncEA EA, MxEncExt EXT>
70    : MxInst<(outs), (ins MEMOpd:$dst, TYPE.IOp:$bitno), "btst\t$bitno, $dst",
71             [(set CCR, (MxBtst (TYPE.Load MEMPat:$dst), TYPE.IPat:$bitno))],
72             MxBTSTEnc_I<MxBead8Imm<1>, EA, EXT>>;
73} // Defs = [CCR]
74
75// Register BTST limited to 32 bits only
76def BTST32dd : MxBTST_RR<MxType32d>;
77def BTST32di : MxBTST_RI<MxType32d>;
78
79// Memory BTST limited to 8 bits only
80def BTST8jd : MxBTST_MR<MxType8d, MxType8.JOp, MxType8.JPat,
81                        MxEncEAj_0, MxExtEmpty>;
82def BTST8od : MxBTST_MR<MxType8d, MxType8.OOp, MxType8.OPat,
83                        MxEncEAo_0, MxExtEmpty>;
84def BTST8ed : MxBTST_MR<MxType8d, MxType8.EOp, MxType8.EPat,
85                        MxEncEAe_0, MxExtEmpty>;
86def BTST8pd : MxBTST_MR<MxType8d, MxType8.POp, MxType8.PPat,
87                        MxEncEAp_0, MxExtI16_0>;
88def BTST8fd : MxBTST_MR<MxType8d, MxType8.FOp, MxType8.FPat,
89                        MxEncEAf_0, MxExtBrief_0>;
90def BTST8qd : MxBTST_MR<MxType8d, MxType8.QOp, MxType8.QPat,
91                        MxEncEAq,   MxExtI16_0>;
92def BTST8kd : MxBTST_MR<MxType8d, MxType8.KOp, MxType8.KPat,
93                        MxEncEAk,   MxExtBrief_0>;
94
95def BTST8ji : MxBTST_MI<MxType8d, MxType8.JOp, MxType8.JPat,
96                        MxEncEAj_0, MxExtEmpty>;
97def BTST8oi : MxBTST_MI<MxType8d, MxType8.OOp, MxType8.OPat,
98                        MxEncEAo_0, MxExtEmpty>;
99def BTST8ei : MxBTST_MI<MxType8d, MxType8.EOp, MxType8.EPat,
100                        MxEncEAe_0, MxExtEmpty>;
101def BTST8pi : MxBTST_MI<MxType8d, MxType8.POp, MxType8.PPat,
102                        MxEncEAp_0, MxExtI16_0>;
103def BTST8fi : MxBTST_MI<MxType8d, MxType8.FOp, MxType8.FPat,
104                        MxEncEAf_0, MxExtBrief_0>;
105def BTST8qi : MxBTST_MI<MxType8d, MxType8.QOp, MxType8.QPat,
106                        MxEncEAq,   MxExtI16_0>;
107def BTST8ki : MxBTST_MI<MxType8d, MxType8.KOp, MxType8.KPat,
108                        MxEncEAk,   MxExtBrief_0>;
109