1 //===-- M68kRegisterInfo.h - M68k Register Information Impl -----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file contains the M68k implementation of the TargetRegisterInfo
11 /// class.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_M68K_M68KREGISTERINFO_H
16 #define LLVM_LIB_TARGET_M68K_M68KREGISTERINFO_H
17 
18 #include "M68k.h"
19 
20 #include "llvm/CodeGen/TargetRegisterInfo.h"
21 
22 #define GET_REGINFO_HEADER
23 #include "M68kGenRegisterInfo.inc"
24 
25 namespace llvm {
26 class M68kSubtarget;
27 class TargetInstrInfo;
28 class Type;
29 
30 class M68kRegisterInfo : public M68kGenRegisterInfo {
31   virtual void anchor();
32 
33   /// Physical register used as stack ptr.
34   unsigned StackPtr;
35 
36   /// Physical register used as frame ptr.
37   unsigned FramePtr;
38 
39   /// Physical register used as a base ptr in complex stack frames.  I.e., when
40   /// we need a 3rd base, not just SP and FP, due to variable size stack
41   /// objects.
42   unsigned BasePtr;
43 
44   /// Physical register used to store GOT address if needed.
45   unsigned GlobalBasePtr;
46 
47 protected:
48   const M68kSubtarget &Subtarget;
49 
50 public:
51   M68kRegisterInfo(const M68kSubtarget &Subtarget);
52 
53   const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
54 
55   const uint32_t *getCallPreservedMask(const MachineFunction &MF,
56                                        CallingConv::ID) const override;
57 
58   /// Returns a register class with registers that can be used in forming tail
59   /// calls.
60   const TargetRegisterClass *
61   getRegsForTailCall(const MachineFunction &MF) const;
62 
63   /// Return a mega-register of the specified register Reg so its sub-register
64   /// of index SubIdx is Reg, its super(or mega) Reg. In other words it will
65   /// return a register that is not direct super register but still shares
66   /// physical register with Reg.
67   /// NOTE not sure about the term though.
68   unsigned getMatchingMegaReg(unsigned Reg,
69                               const TargetRegisterClass *RC) const;
70 
71   /// Returns the Register Class of a physical register of the given type,
72   /// picking the biggest register class of the right type that contains this
73   /// physreg.
74   const TargetRegisterClass *getMaximalPhysRegClass(unsigned reg, MVT VT) const;
75 
76   /// Return index of a register within a register class, otherwise return -1
77   int getRegisterOrder(unsigned Reg, const TargetRegisterClass &TRC) const;
78 
79   /// Return spill order index of a register, if there is none then trap
80   int getSpillRegisterOrder(unsigned Reg) const;
81 
82   BitVector getReservedRegs(const MachineFunction &MF) const override;
83 
84   bool requiresRegisterScavenging(const MachineFunction &MF) const override;
85 
86   bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override;
87 
88   /// FrameIndex represent objects inside a abstract stack. We must replace
89   /// FrameIndex with an stack/frame pointer direct reference.
90   void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
91                            unsigned FIOperandNum,
92                            RegScavenger *RS = nullptr) const override;
93 
94   bool hasBasePointer(const MachineFunction &MF) const;
95 
96   /// True if the stack can be realigned for the target.
97   bool canRealignStack(const MachineFunction &MF) const override;
98 
99   Register getFrameRegister(const MachineFunction &MF) const override;
100 
101   const TargetRegisterClass *
102   getCrossCopyRegClass(const TargetRegisterClass *RC) const override {
103     if (RC == &M68k::CCRCRegClass)
104       return &M68k::DR32RegClass;
105     return RC;
106   }
107 
108   unsigned getStackRegister() const { return StackPtr; }
109   unsigned getBaseRegister() const { return BasePtr; }
110   unsigned getGlobalBaseRegister() const { return GlobalBasePtr; }
111 
112   const TargetRegisterClass *intRegClass(unsigned Size) const;
113 };
114 
115 } // end namespace llvm
116 
117 #endif // LLVM_LIB_TARGET_M68K_M68KREGISTERINFO_H
118