1 //===-- MipsAsmBackend.h - Mips Asm Backend  ------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines the MipsAsmBackend class.
10 //
11 //===----------------------------------------------------------------------===//
12 //
13 
14 #ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H
15 #define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H
16 
17 #include "MCTargetDesc/MipsFixupKinds.h"
18 #include "llvm/MC/MCAsmBackend.h"
19 #include "llvm/TargetParser/Triple.h"
20 
21 namespace llvm {
22 
23 class MCAssembler;
24 struct MCFixupKindInfo;
25 class MCRegisterInfo;
26 class Target;
27 
28 class MipsAsmBackend : public MCAsmBackend {
29   Triple TheTriple;
30   bool IsN32;
31 
32 public:
MipsAsmBackend(const Target & T,const MCRegisterInfo & MRI,const Triple & TT,StringRef CPU,bool N32)33   MipsAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT,
34                  StringRef CPU, bool N32)
35       : MCAsmBackend(TT.isLittleEndian() ? llvm::endianness::little
36                                          : llvm::endianness::big),
37         TheTriple(TT), IsN32(N32) {}
38 
39   std::unique_ptr<MCObjectTargetWriter>
40   createObjectTargetWriter() const override;
41 
42   void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
43                   const MCValue &Target, MutableArrayRef<char> Data,
44                   uint64_t Value, bool IsResolved,
45                   const MCSubtargetInfo *STI) const override;
46 
47   std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
48   const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
49 
getNumFixupKinds()50   unsigned getNumFixupKinds() const override {
51     return Mips::NumTargetFixupKinds;
52   }
53 
54   /// @name Target Relaxation Interfaces
55   /// @{
56 
57   /// fixupNeedsRelaxation - Target specific predicate for whether a given
58   /// fixup requires the associated instruction to be relaxed.
fixupNeedsRelaxation(const MCFixup & Fixup,uint64_t Value,const MCRelaxableFragment * DF,const MCAsmLayout & Layout)59   bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
60                             const MCRelaxableFragment *DF,
61                             const MCAsmLayout &Layout) const override {
62     // FIXME.
63     llvm_unreachable("RelaxInstruction() unimplemented");
64     return false;
65   }
66 
67   bool writeNopData(raw_ostream &OS, uint64_t Count,
68                     const MCSubtargetInfo *STI) const override;
69 
70   bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
71                              const MCValue &Target,
72                              const MCSubtargetInfo *STI) override;
73 
74   bool isMicroMips(const MCSymbol *Sym) const override;
75 }; // class MipsAsmBackend
76 
77 } // namespace
78 
79 #endif
80