1 //===-- Mips16RegisterInfo.cpp - MIPS16 Register Information --------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains the MIPS16 implementation of the TargetRegisterInfo class. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "Mips16RegisterInfo.h" 14 #include "Mips.h" 15 #include "Mips16InstrInfo.h" 16 #include "MipsInstrInfo.h" 17 #include "MipsMachineFunction.h" 18 #include "MipsSubtarget.h" 19 #include "llvm/ADT/STLExtras.h" 20 #include "llvm/CodeGen/MachineFrameInfo.h" 21 #include "llvm/CodeGen/MachineFunction.h" 22 #include "llvm/CodeGen/MachineInstrBuilder.h" 23 #include "llvm/CodeGen/MachineRegisterInfo.h" 24 #include "llvm/CodeGen/TargetFrameLowering.h" 25 #include "llvm/CodeGen/TargetInstrInfo.h" 26 #include "llvm/IR/Constants.h" 27 #include "llvm/IR/DebugInfo.h" 28 #include "llvm/IR/Function.h" 29 #include "llvm/IR/Type.h" 30 #include "llvm/Support/Debug.h" 31 #include "llvm/Support/ErrorHandling.h" 32 #include "llvm/Support/raw_ostream.h" 33 #include "llvm/Target/TargetMachine.h" 34 #include "llvm/Target/TargetOptions.h" 35 36 using namespace llvm; 37 38 #define DEBUG_TYPE "mips16-registerinfo" 39 40 Mips16RegisterInfo::Mips16RegisterInfo() : MipsRegisterInfo() {} 41 42 bool Mips16RegisterInfo::requiresRegisterScavenging 43 (const MachineFunction &MF) const { 44 return false; 45 } 46 bool Mips16RegisterInfo::requiresFrameIndexScavenging 47 (const MachineFunction &MF) const { 48 return false; 49 } 50 51 bool Mips16RegisterInfo::useFPForScavengingIndex 52 (const MachineFunction &MF) const { 53 return false; 54 } 55 56 bool Mips16RegisterInfo::saveScavengerRegister 57 (MachineBasicBlock &MBB, 58 MachineBasicBlock::iterator I, 59 MachineBasicBlock::iterator &UseMI, 60 const TargetRegisterClass *RC, 61 unsigned Reg) const { 62 DebugLoc DL; 63 const TargetInstrInfo &TII = *MBB.getParent()->getSubtarget().getInstrInfo(); 64 TII.copyPhysReg(MBB, I, DL, Mips::T0, Reg, true); 65 TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true); 66 return true; 67 } 68 69 const TargetRegisterClass * 70 Mips16RegisterInfo::intRegClass(unsigned Size) const { 71 assert(Size == 4); 72 return &Mips::CPU16RegsRegClass; 73 } 74 75 void Mips16RegisterInfo::eliminateFI(MachineBasicBlock::iterator II, 76 unsigned OpNo, int FrameIndex, 77 uint64_t StackSize, 78 int64_t SPOffset) const { 79 MachineInstr &MI = *II; 80 MachineFunction &MF = *MI.getParent()->getParent(); 81 MachineFrameInfo &MFI = MF.getFrameInfo(); 82 83 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo(); 84 int MinCSFI = 0; 85 int MaxCSFI = -1; 86 87 if (CSI.size()) { 88 MinCSFI = CSI[0].getFrameIdx(); 89 MaxCSFI = CSI[CSI.size() - 1].getFrameIdx(); 90 } 91 92 // The following stack frame objects are always 93 // referenced relative to $sp: 94 // 1. Outgoing arguments. 95 // 2. Pointer to dynamically allocated stack space. 96 // 3. Locations for callee-saved registers. 97 // Everything else is referenced relative to whatever register 98 // getFrameRegister() returns. 99 unsigned FrameReg; 100 101 if (FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI) 102 FrameReg = Mips::SP; 103 else { 104 const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering(); 105 if (TFI->hasFP(MF)) { 106 FrameReg = Mips::S0; 107 } 108 else { 109 if ((MI.getNumOperands()> OpNo+2) && MI.getOperand(OpNo+2).isReg()) 110 FrameReg = MI.getOperand(OpNo+2).getReg(); 111 else 112 FrameReg = Mips::SP; 113 } 114 } 115 // Calculate final offset. 116 // - There is no need to change the offset if the frame object 117 // is one of the 118 // following: an outgoing argument, pointer to a dynamically allocated 119 // stack space or a $gp restore location, 120 // - If the frame object is any of the following, 121 // its offset must be adjusted 122 // by adding the size of the stack: 123 // incoming argument, callee-saved register location or local variable. 124 int64_t Offset; 125 bool IsKill = false; 126 Offset = SPOffset + (int64_t)StackSize; 127 Offset += MI.getOperand(OpNo + 1).getImm(); 128 129 LLVM_DEBUG(errs() << "Offset : " << Offset << "\n" 130 << "<--------->\n"); 131 132 if (!MI.isDebugValue() && 133 !Mips16InstrInfo::validImmediate(MI.getOpcode(), FrameReg, Offset)) { 134 MachineBasicBlock &MBB = *MI.getParent(); 135 DebugLoc DL = II->getDebugLoc(); 136 unsigned NewImm; 137 const Mips16InstrInfo &TII = 138 *static_cast<const Mips16InstrInfo *>(MF.getSubtarget().getInstrInfo()); 139 FrameReg = TII.loadImmediate(FrameReg, Offset, MBB, II, DL, NewImm); 140 Offset = SignExtend64<16>(NewImm); 141 IsKill = true; 142 } 143 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill); 144 MI.getOperand(OpNo + 1).ChangeToImmediate(Offset); 145 146 147 } 148