1 //===-- PPCMachineFunctionInfo.h - Private data used for PowerPC --*- C++ -*-=//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares the PowerPC specific subclass of MachineFunctionInfo.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_POWERPC_PPCMACHINEFUNCTIONINFO_H
14 #define LLVM_LIB_TARGET_POWERPC_PPCMACHINEFUNCTIONINFO_H
15 
16 #include "llvm/ADT/SmallVector.h"
17 #include "llvm/CodeGen/MachineFunction.h"
18 #include "llvm/CodeGen/TargetCallingConv.h"
19 
20 namespace llvm {
21 
22 /// PPCFunctionInfo - This class is derived from MachineFunction private
23 /// PowerPC target-specific information for each MachineFunction.
24 class PPCFunctionInfo : public MachineFunctionInfo {
25 public:
26   // The value in the ParamType are used to indicate the bitstrings used in the
27   // encoding format.
28   enum ParamType {
29     FixedType = 0x0,
30     ShortFloatPoint = 0x2,
31     LongFloatPoint = 0x3
32   };
33 
34 private:
35   virtual void anchor();
36 
37   /// FramePointerSaveIndex - Frame index of where the old frame pointer is
38   /// stored.  Also used as an anchor for instructions that need to be altered
39   /// when using frame pointers (dyna_add, dyna_sub.)
40   int FramePointerSaveIndex = 0;
41 
42   /// ReturnAddrSaveIndex - Frame index of where the return address is stored.
43   ///
44   int ReturnAddrSaveIndex = 0;
45 
46   /// Frame index where the old base pointer is stored.
47   int BasePointerSaveIndex = 0;
48 
49   /// Frame index where the old PIC base pointer is stored.
50   int PICBasePointerSaveIndex = 0;
51 
52   /// MustSaveLR - Indicates whether LR is defined (or clobbered) in the current
53   /// function.  This is only valid after the initial scan of the function by
54   /// PEI.
55   bool MustSaveLR = false;
56 
57   /// MustSaveTOC - Indicates that the TOC save needs to be performed in the
58   /// prologue of the function. This is typically the case when there are
59   /// indirect calls in the function and it is more profitable to save the
60   /// TOC pointer in the prologue than in the block(s) containing the call(s).
61   bool MustSaveTOC = false;
62 
63   /// Do we have to disable shrink-wrapping? This has to be set if we emit any
64   /// instructions that clobber LR in the entry block because discovering this
65   /// in PEI is too late (happens after shrink-wrapping);
66   bool ShrinkWrapDisabled = false;
67 
68   /// Does this function have any stack spills.
69   bool HasSpills = false;
70 
71   /// Does this function spill using instructions with only r+r (not r+i)
72   /// forms.
73   bool HasNonRISpills = false;
74 
75   /// SpillsCR - Indicates whether CR is spilled in the current function.
76   bool SpillsCR = false;
77 
78   /// DisableNonVolatileCR - Indicates whether non-volatile CR fields would be
79   /// disabled.
80   bool DisableNonVolatileCR = false;
81 
82   /// LRStoreRequired - The bool indicates whether there is some explicit use of
83   /// the LR/LR8 stack slot that is not obvious from scanning the code.  This
84   /// requires that the code generator produce a store of LR to the stack on
85   /// entry, even though LR may otherwise apparently not be used.
86   bool LRStoreRequired = false;
87 
88   /// This function makes use of the PPC64 ELF TOC base pointer (register r2).
89   bool UsesTOCBasePtr = false;
90 
91   /// MinReservedArea - This is the frame size that is at least reserved in a
92   /// potential caller (parameter+linkage area).
93   unsigned MinReservedArea = 0;
94 
95   /// TailCallSPDelta - Stack pointer delta used when tail calling. Maximum
96   /// amount the stack pointer is adjusted to make the frame bigger for tail
97   /// calls. Used for creating an area before the register spill area.
98   int TailCallSPDelta = 0;
99 
100   /// HasFastCall - Does this function contain a fast call. Used to determine
101   /// how the caller's stack pointer should be calculated (epilog/dynamicalloc).
102   bool HasFastCall = false;
103 
104   /// VarArgsFrameIndex - FrameIndex for start of varargs area.
105   int VarArgsFrameIndex = 0;
106 
107   /// VarArgsStackOffset - StackOffset for start of stack
108   /// arguments.
109 
110   int VarArgsStackOffset = 0;
111 
112   /// VarArgsNumGPR - Index of the first unused integer
113   /// register for parameter passing.
114   unsigned VarArgsNumGPR = 0;
115 
116   /// VarArgsNumFPR - Index of the first unused double
117   /// register for parameter passing.
118   unsigned VarArgsNumFPR = 0;
119 
120   /// FixedParamNum - Number of fixed parameter.
121   unsigned FixedParamNum = 0;
122 
123   /// FloatingParamNum - Number of floating point parameter.
124   unsigned FloatingPointParamNum = 0;
125 
126   /// ParamType - Encode type for every parameter
127   /// in the order of parameters passing in.
128   /// Bitstring starts from the most significant (leftmost) bit.
129   /// '0'b => fixed parameter.
130   /// '10'b => floating point short parameter.
131   /// '11'b => floating point long parameter.
132   uint32_t ParameterType = 0;
133 
134   /// CRSpillFrameIndex - FrameIndex for CR spill slot for 32-bit SVR4.
135   int CRSpillFrameIndex = 0;
136 
137   /// If any of CR[2-4] need to be saved in the prologue and restored in the
138   /// epilogue then they are added to this array. This is used for the
139   /// 64-bit SVR4 ABI.
140   SmallVector<Register, 3> MustSaveCRs;
141 
142   /// Whether this uses the PIC Base register or not.
143   bool UsesPICBase = false;
144 
145   /// We keep track attributes for each live-in virtual registers
146   /// to use SExt/ZExt flags in later optimization.
147   std::vector<std::pair<Register, ISD::ArgFlagsTy>> LiveInAttrs;
148 
149 public:
150   explicit PPCFunctionInfo(const MachineFunction &MF);
151 
152   int getFramePointerSaveIndex() const { return FramePointerSaveIndex; }
153   void setFramePointerSaveIndex(int Idx) { FramePointerSaveIndex = Idx; }
154 
155   int getReturnAddrSaveIndex() const { return ReturnAddrSaveIndex; }
156   void setReturnAddrSaveIndex(int idx) { ReturnAddrSaveIndex = idx; }
157 
158   int getBasePointerSaveIndex() const { return BasePointerSaveIndex; }
159   void setBasePointerSaveIndex(int Idx) { BasePointerSaveIndex = Idx; }
160 
161   int getPICBasePointerSaveIndex() const { return PICBasePointerSaveIndex; }
162   void setPICBasePointerSaveIndex(int Idx) { PICBasePointerSaveIndex = Idx; }
163 
164   unsigned getMinReservedArea() const { return MinReservedArea; }
165   void setMinReservedArea(unsigned size) { MinReservedArea = size; }
166 
167   int getTailCallSPDelta() const { return TailCallSPDelta; }
168   void setTailCallSPDelta(int size) { TailCallSPDelta = size; }
169 
170   /// MustSaveLR - This is set when the prolog/epilog inserter does its initial
171   /// scan of the function. It is true if the LR/LR8 register is ever explicitly
172   /// defined/clobbered in the machine function (e.g. by calls and movpctolr,
173   /// which is used in PIC generation), or if the LR stack slot is explicitly
174   /// referenced by builtin_return_address.
175   void setMustSaveLR(bool U) { MustSaveLR = U; }
176   bool mustSaveLR() const    { return MustSaveLR; }
177 
178   void setMustSaveTOC(bool U) { MustSaveTOC = U; }
179   bool mustSaveTOC() const    { return MustSaveTOC; }
180 
181   /// We certainly don't want to shrink wrap functions if we've emitted a
182   /// MovePCtoLR8 as that has to go into the entry, so the prologue definitely
183   /// has to go into the entry block.
184   void setShrinkWrapDisabled(bool U) { ShrinkWrapDisabled = U; }
185   bool shrinkWrapDisabled() const { return ShrinkWrapDisabled; }
186 
187   void setHasSpills()      { HasSpills = true; }
188   bool hasSpills() const   { return HasSpills; }
189 
190   void setHasNonRISpills()    { HasNonRISpills = true; }
191   bool hasNonRISpills() const { return HasNonRISpills; }
192 
193   void setSpillsCR()       { SpillsCR = true; }
194   bool isCRSpilled() const { return SpillsCR; }
195 
196   void setDisableNonVolatileCR() { DisableNonVolatileCR = true; }
197   bool isNonVolatileCRDisabled() const { return DisableNonVolatileCR; }
198 
199   void setLRStoreRequired() { LRStoreRequired = true; }
200   bool isLRStoreRequired() const { return LRStoreRequired; }
201 
202   void setUsesTOCBasePtr()    { UsesTOCBasePtr = true; }
203   bool usesTOCBasePtr() const { return UsesTOCBasePtr; }
204 
205   void setHasFastCall() { HasFastCall = true; }
206   bool hasFastCall() const { return HasFastCall;}
207 
208   int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
209   void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; }
210 
211   int getVarArgsStackOffset() const { return VarArgsStackOffset; }
212   void setVarArgsStackOffset(int Offset) { VarArgsStackOffset = Offset; }
213 
214   unsigned getVarArgsNumGPR() const { return VarArgsNumGPR; }
215   void setVarArgsNumGPR(unsigned Num) { VarArgsNumGPR = Num; }
216 
217   unsigned getFixedParamNum() const { return FixedParamNum; }
218 
219   unsigned getFloatingPointParamNum() const { return FloatingPointParamNum; }
220 
221   uint32_t getParameterType() const { return ParameterType; }
222   void appendParameterType(ParamType Type);
223 
224   unsigned getVarArgsNumFPR() const { return VarArgsNumFPR; }
225   void setVarArgsNumFPR(unsigned Num) { VarArgsNumFPR = Num; }
226 
227   /// This function associates attributes for each live-in virtual register.
228   void addLiveInAttr(Register VReg, ISD::ArgFlagsTy Flags) {
229     LiveInAttrs.push_back(std::make_pair(VReg, Flags));
230   }
231 
232   /// This function returns true if the specified vreg is
233   /// a live-in register and sign-extended.
234   bool isLiveInSExt(Register VReg) const;
235 
236   /// This function returns true if the specified vreg is
237   /// a live-in register and zero-extended.
238   bool isLiveInZExt(Register VReg) const;
239 
240   int getCRSpillFrameIndex() const { return CRSpillFrameIndex; }
241   void setCRSpillFrameIndex(int idx) { CRSpillFrameIndex = idx; }
242 
243   const SmallVectorImpl<Register> &
244     getMustSaveCRs() const { return MustSaveCRs; }
245   void addMustSaveCR(Register Reg) { MustSaveCRs.push_back(Reg); }
246 
247   void setUsesPICBase(bool uses) { UsesPICBase = uses; }
248   bool usesPICBase() const { return UsesPICBase; }
249 
250   MCSymbol *getPICOffsetSymbol(MachineFunction &MF) const;
251 
252   MCSymbol *getGlobalEPSymbol(MachineFunction &MF) const;
253   MCSymbol *getLocalEPSymbol(MachineFunction &MF) const;
254   MCSymbol *getTOCOffsetSymbol(MachineFunction &MF) const;
255 };
256 
257 } // end namespace llvm
258 
259 #endif // LLVM_LIB_TARGET_POWERPC_PPCMACHINEFUNCTIONINFO_H
260