1 //===-- PPCTargetTransformInfo.h - PPC specific TTI -------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file a TargetTransformInfo::Concept conforming object specific to the
10 /// PPC target machine. It uses the target's detailed information to
11 /// provide more precise answers to certain TTI queries, while letting the
12 /// target independent and default TTI implementations handle the rest.
13 ///
14 //===----------------------------------------------------------------------===//
15 
16 #ifndef LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H
17 #define LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H
18 
19 #include "PPCTargetMachine.h"
20 #include "llvm/Analysis/TargetTransformInfo.h"
21 #include "llvm/CodeGen/BasicTTIImpl.h"
22 #include "llvm/CodeGen/TargetLowering.h"
23 #include <optional>
24 
25 namespace llvm {
26 
27 class PPCTTIImpl : public BasicTTIImplBase<PPCTTIImpl> {
28   typedef BasicTTIImplBase<PPCTTIImpl> BaseT;
29   typedef TargetTransformInfo TTI;
30   friend BaseT;
31 
32   const PPCSubtarget *ST;
33   const PPCTargetLowering *TLI;
34 
35   const PPCSubtarget *getST() const { return ST; }
36   const PPCTargetLowering *getTLI() const { return TLI; }
37 
38 public:
39   explicit PPCTTIImpl(const PPCTargetMachine *TM, const Function &F)
40       : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
41         TLI(ST->getTargetLowering()) {}
42 
43   std::optional<Instruction *> instCombineIntrinsic(InstCombiner & IC,
44                                                     IntrinsicInst & II) const;
45 
46   /// \name Scalar TTI Implementations
47   /// @{
48 
49   using BaseT::getIntImmCost;
50   InstructionCost getIntImmCost(const APInt &Imm, Type *Ty,
51                                 TTI::TargetCostKind CostKind);
52 
53   InstructionCost getIntImmCostInst(unsigned Opcode, unsigned Idx,
54                                     const APInt &Imm, Type *Ty,
55                                     TTI::TargetCostKind CostKind,
56                                     Instruction *Inst = nullptr);
57   InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
58                                       const APInt &Imm, Type *Ty,
59                                       TTI::TargetCostKind CostKind);
60 
61   InstructionCost getInstructionCost(const User *U,
62                                      ArrayRef<const Value *> Operands,
63                                      TTI::TargetCostKind CostKind);
64 
65   TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
66   bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE,
67                                 AssumptionCache &AC,
68                                 TargetLibraryInfo *LibInfo,
69                                 HardwareLoopInfo &HWLoopInfo);
70   bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI,
71                   DominatorTree *DT, AssumptionCache *AC,
72                   TargetLibraryInfo *LibInfo);
73   bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info);
74   void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
75                                TTI::UnrollingPreferences &UP,
76                                OptimizationRemarkEmitter *ORE);
77   void getPeelingPreferences(Loop *L, ScalarEvolution &SE,
78                              TTI::PeelingPreferences &PP);
79   bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1,
80                      const TargetTransformInfo::LSRCost &C2);
81   bool isNumRegsMajorCostOfLSR();
82   bool shouldBuildRelLookupTables() const;
83   /// @}
84 
85   /// \name Vector TTI Implementations
86   /// @{
87   bool useColdCCForColdCall(Function &F);
88   bool enableAggressiveInterleaving(bool LoopHasReductions);
89   TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize,
90                                                     bool IsZeroCmp) const;
91   bool enableInterleavedAccessVectorization();
92 
93   enum PPCRegisterClass {
94     GPRRC, FPRRC, VRRC, VSXRC
95   };
96   unsigned getNumberOfRegisters(unsigned ClassID) const;
97   unsigned getRegisterClassForType(bool Vector, Type *Ty = nullptr) const;
98   const char* getRegisterClassName(unsigned ClassID) const;
99   TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const;
100   unsigned getCacheLineSize() const override;
101   unsigned getPrefetchDistance() const override;
102   unsigned getMaxInterleaveFactor(ElementCount VF);
103   InstructionCost vectorCostAdjustmentFactor(unsigned Opcode, Type *Ty1,
104                                              Type *Ty2);
105   InstructionCost getArithmeticInstrCost(
106       unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
107       TTI::OperandValueInfo Op1Info = {TTI::OK_AnyValue, TTI::OP_None},
108       TTI::OperandValueInfo Op2Info = {TTI::OK_AnyValue, TTI::OP_None},
109       ArrayRef<const Value *> Args = ArrayRef<const Value *>(),
110       const Instruction *CxtI = nullptr);
111   InstructionCost getShuffleCost(TTI::ShuffleKind Kind, Type *Tp,
112                                  ArrayRef<int> Mask,
113                                  TTI::TargetCostKind CostKind, int Index,
114                                  Type *SubTp,
115                                  ArrayRef<const Value *> Args = std::nullopt);
116   InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
117                                    TTI::CastContextHint CCH,
118                                    TTI::TargetCostKind CostKind,
119                                    const Instruction *I = nullptr);
120   InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind,
121                                  const Instruction *I = nullptr);
122   InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
123                                      CmpInst::Predicate VecPred,
124                                      TTI::TargetCostKind CostKind,
125                                      const Instruction *I = nullptr);
126   using BaseT::getVectorInstrCost;
127   InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
128                                      TTI::TargetCostKind CostKind,
129                                      unsigned Index, Value *Op0, Value *Op1);
130   InstructionCost
131   getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment,
132                   unsigned AddressSpace, TTI::TargetCostKind CostKind,
133                   TTI::OperandValueInfo OpInfo = {TTI::OK_AnyValue, TTI::OP_None},
134                   const Instruction *I = nullptr);
135   InstructionCost getInterleavedMemoryOpCost(
136       unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
137       Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
138       bool UseMaskForCond = false, bool UseMaskForGaps = false);
139   InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
140                                         TTI::TargetCostKind CostKind);
141   bool areTypesABICompatible(const Function *Caller, const Function *Callee,
142                              const ArrayRef<Type *> &Types) const;
143   bool hasActiveVectorLength(unsigned Opcode, Type *DataType,
144                              Align Alignment) const;
145   InstructionCost getVPMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
146                                     unsigned AddressSpace,
147                                     TTI::TargetCostKind CostKind,
148                                     const Instruction *I = nullptr);
149   bool supportsTailCallFor(const CallBase *CB) const;
150 
151 private:
152   // The following constant is used for estimating costs on power9.
153   static const InstructionCost::CostType P9PipelineFlushEstimate = 80;
154 
155   /// @}
156 };
157 
158 } // end namespace llvm
159 
160 #endif
161