1 //===-- RISCVRegisterBankInfo.cpp -------------------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 /// \file 9 /// This file implements the targeting of the RegisterBankInfo class for RISC-V. 10 /// \todo This should be generated by TableGen. 11 //===----------------------------------------------------------------------===// 12 13 #include "RISCVRegisterBankInfo.h" 14 #include "MCTargetDesc/RISCVMCTargetDesc.h" 15 #include "llvm/CodeGen/MachineRegisterInfo.h" 16 #include "llvm/CodeGen/RegisterBank.h" 17 #include "llvm/CodeGen/RegisterBankInfo.h" 18 #include "llvm/CodeGen/TargetRegisterInfo.h" 19 20 #define GET_TARGET_REGBANK_IMPL 21 #include "RISCVGenRegisterBank.inc" 22 23 using namespace llvm; 24 25 RISCVRegisterBankInfo::RISCVRegisterBankInfo(unsigned HwMode) 26 : RISCVGenRegisterBankInfo(HwMode) {} 27