15f757f3fSDimitry Andric //===-- RISCVFixupKinds.h - RISC-V Specific Fixup Entries -------*- C++ -*-===//
20b57cec5SDimitry Andric //
30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60b57cec5SDimitry Andric //
70b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
80b57cec5SDimitry Andric 
90b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVFIXUPKINDS_H
100b57cec5SDimitry Andric #define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVFIXUPKINDS_H
110b57cec5SDimitry Andric 
125f757f3fSDimitry Andric #include "llvm/BinaryFormat/ELF.h"
130b57cec5SDimitry Andric #include "llvm/MC/MCFixup.h"
1406c3fb27SDimitry Andric #include <utility>
150b57cec5SDimitry Andric 
160b57cec5SDimitry Andric #undef RISCV
170b57cec5SDimitry Andric 
18bdd1243dSDimitry Andric namespace llvm::RISCV {
190b57cec5SDimitry Andric enum Fixups {
20fe6060f1SDimitry Andric   // 20-bit fixup corresponding to %hi(foo) for instructions like lui
210b57cec5SDimitry Andric   fixup_riscv_hi20 = FirstTargetFixupKind,
22fe6060f1SDimitry Andric   // 12-bit fixup corresponding to %lo(foo) for instructions like addi
230b57cec5SDimitry Andric   fixup_riscv_lo12_i,
2406c3fb27SDimitry Andric   // 12-bit fixup corresponding to foo-bar for instructions like addi
2506c3fb27SDimitry Andric   fixup_riscv_12_i,
26fe6060f1SDimitry Andric   // 12-bit fixup corresponding to %lo(foo) for the S-type store instructions
270b57cec5SDimitry Andric   fixup_riscv_lo12_s,
28fe6060f1SDimitry Andric   // 20-bit fixup corresponding to %pcrel_hi(foo) for instructions like auipc
290b57cec5SDimitry Andric   fixup_riscv_pcrel_hi20,
30fe6060f1SDimitry Andric   // 12-bit fixup corresponding to %pcrel_lo(foo) for instructions like addi
310b57cec5SDimitry Andric   fixup_riscv_pcrel_lo12_i,
32fe6060f1SDimitry Andric   // 12-bit fixup corresponding to %pcrel_lo(foo) for the S-type store
330b57cec5SDimitry Andric   // instructions
34fe6060f1SDimitry Andric   fixup_riscv_pcrel_lo12_s,
35fe6060f1SDimitry Andric   // 20-bit fixup corresponding to %got_pcrel_hi(foo) for instructions like
36fe6060f1SDimitry Andric   // auipc
37fe6060f1SDimitry Andric   fixup_riscv_got_hi20,
38fe6060f1SDimitry Andric   // 20-bit fixup corresponding to %tprel_hi(foo) for instructions like lui
39fe6060f1SDimitry Andric   fixup_riscv_tprel_hi20,
40fe6060f1SDimitry Andric   // 12-bit fixup corresponding to %tprel_lo(foo) for instructions like addi
41fe6060f1SDimitry Andric   fixup_riscv_tprel_lo12_i,
42fe6060f1SDimitry Andric   // 12-bit fixup corresponding to %tprel_lo(foo) for the S-type store
43fe6060f1SDimitry Andric   // instructions
44fe6060f1SDimitry Andric   fixup_riscv_tprel_lo12_s,
45fe6060f1SDimitry Andric   // Fixup corresponding to %tprel_add(foo) for PseudoAddTPRel, used as a linker
46fe6060f1SDimitry Andric   // hint
47fe6060f1SDimitry Andric   fixup_riscv_tprel_add,
48fe6060f1SDimitry Andric   // 20-bit fixup corresponding to %tls_ie_pcrel_hi(foo) for instructions like
49fe6060f1SDimitry Andric   // auipc
50fe6060f1SDimitry Andric   fixup_riscv_tls_got_hi20,
51fe6060f1SDimitry Andric   // 20-bit fixup corresponding to %tls_gd_pcrel_hi(foo) for instructions like
52fe6060f1SDimitry Andric   // auipc
53fe6060f1SDimitry Andric   fixup_riscv_tls_gd_hi20,
54fe6060f1SDimitry Andric   // 20-bit fixup for symbol references in the jal instruction
55fe6060f1SDimitry Andric   fixup_riscv_jal,
56fe6060f1SDimitry Andric   // 12-bit fixup for symbol references in the branch instructions
570b57cec5SDimitry Andric   fixup_riscv_branch,
58fe6060f1SDimitry Andric   // 11-bit fixup for symbol references in the compressed jump instruction
590b57cec5SDimitry Andric   fixup_riscv_rvc_jump,
60fe6060f1SDimitry Andric   // 8-bit fixup for symbol references in the compressed branch instruction
610b57cec5SDimitry Andric   fixup_riscv_rvc_branch,
62fe6060f1SDimitry Andric   // Fixup representing a legacy no-pic function call attached to the auipc
630b57cec5SDimitry Andric   // instruction in a pair composed of adjacent auipc+jalr instructions.
640b57cec5SDimitry Andric   fixup_riscv_call,
65fe6060f1SDimitry Andric   // Fixup representing a function call attached to the auipc instruction in a
66fe6060f1SDimitry Andric   // pair composed of adjacent auipc+jalr instructions.
670b57cec5SDimitry Andric   fixup_riscv_call_plt,
68fe6060f1SDimitry Andric   // Used to generate an R_RISCV_RELAX relocation, which indicates the linker
69fe6060f1SDimitry Andric   // may relax the instruction pair.
700b57cec5SDimitry Andric   fixup_riscv_relax,
71fe6060f1SDimitry Andric   // Used to generate an R_RISCV_ALIGN relocation, which indicates the linker
72fe6060f1SDimitry Andric   // should fixup the alignment after linker relaxation.
730b57cec5SDimitry Andric   fixup_riscv_align,
747a6dacacSDimitry Andric   // Fixups indicating a TLS descriptor code sequence, corresponding to auipc,
757a6dacacSDimitry Andric   // lw/ld, addi, and jalr, respectively.
767a6dacacSDimitry Andric   fixup_riscv_tlsdesc_hi20,
777a6dacacSDimitry Andric   fixup_riscv_tlsdesc_load_lo12,
787a6dacacSDimitry Andric   fixup_riscv_tlsdesc_add_lo12,
797a6dacacSDimitry Andric   fixup_riscv_tlsdesc_call,
800b57cec5SDimitry Andric 
81fe6060f1SDimitry Andric   // Used as a sentinel, must be the last
820b57cec5SDimitry Andric   fixup_riscv_invalid,
830b57cec5SDimitry Andric   NumTargetFixupKinds = fixup_riscv_invalid - FirstTargetFixupKind
840b57cec5SDimitry Andric };
8506c3fb27SDimitry Andric 
8606c3fb27SDimitry Andric static inline std::pair<MCFixupKind, MCFixupKind>
getRelocPairForSize(unsigned Size)8706c3fb27SDimitry Andric getRelocPairForSize(unsigned Size) {
8806c3fb27SDimitry Andric   switch (Size) {
8906c3fb27SDimitry Andric   default:
9006c3fb27SDimitry Andric     llvm_unreachable("unsupported fixup size");
9106c3fb27SDimitry Andric   case 1:
925f757f3fSDimitry Andric     return std::make_pair(
935f757f3fSDimitry Andric         MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_ADD8),
945f757f3fSDimitry Andric         MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_SUB8));
9506c3fb27SDimitry Andric   case 2:
965f757f3fSDimitry Andric     return std::make_pair(
975f757f3fSDimitry Andric         MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_ADD16),
985f757f3fSDimitry Andric         MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_SUB16));
9906c3fb27SDimitry Andric   case 4:
1005f757f3fSDimitry Andric     return std::make_pair(
1015f757f3fSDimitry Andric         MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_ADD32),
1025f757f3fSDimitry Andric         MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_SUB32));
10306c3fb27SDimitry Andric   case 8:
1045f757f3fSDimitry Andric     return std::make_pair(
1055f757f3fSDimitry Andric         MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_ADD64),
1065f757f3fSDimitry Andric         MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_SUB64));
10706c3fb27SDimitry Andric   }
10806c3fb27SDimitry Andric }
10906c3fb27SDimitry Andric 
110bdd1243dSDimitry Andric } // end namespace llvm::RISCV
1110b57cec5SDimitry Andric 
1120b57cec5SDimitry Andric #endif
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