1//===-- RISCVCallingConv.td - Calling Conventions RISC-V ---*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This describes the calling conventions for the RISC-V architecture.
10//
11//===----------------------------------------------------------------------===//
12
13// The RISC-V calling convention is handled with custom code in
14// RISCVISelLowering.cpp (CC_RISCV).
15
16def CSR_ILP32E_LP64E : CalleeSavedRegs<(add X1, X8, X9)>;
17
18def CSR_ILP32_LP64
19    : CalleeSavedRegs<(add CSR_ILP32E_LP64E, (sequence "X%u", 18, 27))>;
20
21def CSR_ILP32F_LP64F
22    : CalleeSavedRegs<(add CSR_ILP32_LP64,
23                       F8_F, F9_F, (sequence "F%u_F", 18, 27))>;
24
25def CSR_ILP32D_LP64D
26    : CalleeSavedRegs<(add CSR_ILP32_LP64,
27                       F8_D, F9_D, (sequence "F%u_D", 18, 27))>;
28
29// Needed for implementation of RISCVRegisterInfo::getNoPreservedMask()
30def CSR_NoRegs : CalleeSavedRegs<(add)>;
31
32// Interrupt handler needs to save/restore all registers that are used,
33// both Caller and Callee saved registers.
34def CSR_Interrupt : CalleeSavedRegs<(add X1, (sequence "X%u", 5, 31))>;
35
36// Same as CSR_Interrupt, but including all 32-bit FP registers.
37def CSR_XLEN_F32_Interrupt: CalleeSavedRegs<(add CSR_Interrupt,
38                                             (sequence "F%u_F", 0, 31))>;
39
40// Same as CSR_Interrupt, but including all 64-bit FP registers.
41def CSR_XLEN_F64_Interrupt: CalleeSavedRegs<(add CSR_Interrupt,
42                                             (sequence "F%u_D", 0, 31))>;
43
44// Same as CSR_Interrupt, but excluding X16-X31.
45def CSR_Interrupt_RVE : CalleeSavedRegs<(sub CSR_Interrupt,
46                                        (sequence "X%u", 16, 31))>;
47
48// Same as CSR_XLEN_F32_Interrupt, but excluding X16-X31.
49def CSR_XLEN_F32_Interrupt_RVE: CalleeSavedRegs<(sub CSR_XLEN_F32_Interrupt,
50                                                (sequence "X%u", 16, 31))>;
51
52// Same as CSR_XLEN_F64_Interrupt, but excluding X16-X31.
53def CSR_XLEN_F64_Interrupt_RVE: CalleeSavedRegs<(sub CSR_XLEN_F64_Interrupt,
54                                                (sequence "X%u", 16, 31))>;
55