1 //===-- RISCVFrameLowering.h - Define frame lowering for RISCV -*- C++ -*--===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This class implements RISCV-specific bits of TargetFrameLowering class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_RISCV_RISCVFRAMELOWERING_H
14 #define LLVM_LIB_TARGET_RISCV_RISCVFRAMELOWERING_H
15 
16 #include "llvm/CodeGen/TargetFrameLowering.h"
17 #include "llvm/Support/TypeSize.h"
18 
19 namespace llvm {
20 class RISCVSubtarget;
21 
22 class RISCVFrameLowering : public TargetFrameLowering {
23 public:
24   explicit RISCVFrameLowering(const RISCVSubtarget &STI)
25       : TargetFrameLowering(StackGrowsDown,
26                             /*StackAlignment=*/Align(16),
27                             /*LocalAreaOffset=*/0),
28         STI(STI) {}
29 
30   void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
31   void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
32 
33   uint64_t getStackSizeWithRVVPadding(const MachineFunction &MF) const;
34 
35   StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
36                                      Register &FrameReg) const override;
37 
38   void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
39                             RegScavenger *RS) const override;
40 
41   void processFunctionBeforeFrameFinalized(MachineFunction &MF,
42                                            RegScavenger *RS) const override;
43 
44   bool hasFP(const MachineFunction &MF) const override;
45 
46   bool hasBP(const MachineFunction &MF) const;
47 
48   bool hasReservedCallFrame(const MachineFunction &MF) const override;
49   MachineBasicBlock::iterator
50   eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
51                                 MachineBasicBlock::iterator MI) const override;
52   bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
53                                  MachineBasicBlock::iterator MI,
54                                  ArrayRef<CalleeSavedInfo> CSI,
55                                  const TargetRegisterInfo *TRI) const override;
56   bool
57   restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
58                               MachineBasicBlock::iterator MI,
59                               MutableArrayRef<CalleeSavedInfo> CSI,
60                               const TargetRegisterInfo *TRI) const override;
61 
62   // Get the first stack adjustment amount for SplitSPAdjust.
63   // Return 0 if we don't want to to split the SP adjustment in prologue and
64   // epilogue.
65   uint64_t getFirstSPAdjustAmount(const MachineFunction &MF) const;
66 
67   bool canUseAsPrologue(const MachineBasicBlock &MBB) const override;
68   bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override;
69 
70   bool enableShrinkWrapping(const MachineFunction &MF) const override;
71 
72   bool isSupportedStackID(TargetStackID::Value ID) const override;
73   TargetStackID::Value getStackIDForScalableVectors() const override;
74 
75 protected:
76   const RISCVSubtarget &STI;
77 
78 private:
79   void determineFrameLayout(MachineFunction &MF) const;
80   void adjustReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
81                  const DebugLoc &DL, Register DestReg, Register SrcReg,
82                  int64_t Val, MachineInstr::MIFlag Flag) const;
83   void adjustStackForRVV(MachineFunction &MF, MachineBasicBlock &MBB,
84                          MachineBasicBlock::iterator MBBI, const DebugLoc &DL,
85                          int64_t Amount, MachineInstr::MIFlag Flag) const;
86   std::pair<int64_t, Align>
87   assignRVVStackObjectOffsets(MachineFunction &MF) const;
88 };
89 } // namespace llvm
90 #endif
91