1//===-- RISCVInstrFormatsV.td - RISCV V Instruction Formats --*- tablegen -*-=//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9//  This file describes the RISC-V V extension instruction formats.
10//
11//===----------------------------------------------------------------------===//
12
13class RISCVVFormat<bits<3> val> {
14  bits<3> Value = val;
15}
16def OPIVV : RISCVVFormat<0b000>;
17def OPFVV : RISCVVFormat<0b001>;
18def OPMVV : RISCVVFormat<0b010>;
19def OPIVI : RISCVVFormat<0b011>;
20def OPIVX : RISCVVFormat<0b100>;
21def OPFVF : RISCVVFormat<0b101>;
22def OPMVX : RISCVVFormat<0b110>;
23
24class RISCVMOP<bits<2> val> {
25  bits<2> Value = val;
26}
27def MOPLDUnitStride   : RISCVMOP<0b00>;
28def MOPLDIndexedUnord : RISCVMOP<0b01>;
29def MOPLDStrided      : RISCVMOP<0b10>;
30def MOPLDIndexedOrder : RISCVMOP<0b11>;
31
32def MOPSTUnitStride   : RISCVMOP<0b00>;
33def MOPSTIndexedUnord : RISCVMOP<0b01>;
34def MOPSTStrided      : RISCVMOP<0b10>;
35def MOPSTIndexedOrder : RISCVMOP<0b11>;
36
37class RISCVLSUMOP<bits<5> val> {
38  bits<5> Value = val;
39}
40def LUMOPUnitStride  : RISCVLSUMOP<0b00000>;
41def LUMOPUnitStrideMask : RISCVLSUMOP<0b01011>;
42def LUMOPUnitStrideWholeReg : RISCVLSUMOP<0b01000>;
43def LUMOPUnitStrideFF: RISCVLSUMOP<0b10000>;
44def SUMOPUnitStride  : RISCVLSUMOP<0b00000>;
45def SUMOPUnitStrideMask : RISCVLSUMOP<0b01011>;
46def SUMOPUnitStrideWholeReg : RISCVLSUMOP<0b01000>;
47
48class RISCVAMOOP<bits<5> val> {
49  bits<5> Value = val;
50}
51def AMOOPVamoSwap : RISCVAMOOP<0b00001>;
52def AMOOPVamoAdd : RISCVAMOOP<0b00000>;
53def AMOOPVamoXor : RISCVAMOOP<0b00100>;
54def AMOOPVamoAnd : RISCVAMOOP<0b01100>;
55def AMOOPVamoOr : RISCVAMOOP<0b01000>;
56def AMOOPVamoMin : RISCVAMOOP<0b10000>;
57def AMOOPVamoMax : RISCVAMOOP<0b10100>;
58def AMOOPVamoMinu : RISCVAMOOP<0b11000>;
59def AMOOPVamoMaxu : RISCVAMOOP<0b11100>;
60
61class RISCVWidth<bits<4> val> {
62  bits<4> Value = val;
63}
64def LSWidth8     : RISCVWidth<0b0000>;
65def LSWidth16    : RISCVWidth<0b0101>;
66def LSWidth32    : RISCVWidth<0b0110>;
67def LSWidth64    : RISCVWidth<0b0111>;
68
69class RVInstSetiVLi<dag outs, dag ins, string opcodestr, string argstr>
70    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatI> {
71  bits<5> uimm;
72  bits<5> rd;
73  bits<10> vtypei;
74
75  let Inst{31} = 1;
76  let Inst{30} = 1;
77  let Inst{29-20} = vtypei{9-0};
78  let Inst{19-15} = uimm;
79  let Inst{14-12} = 0b111;
80  let Inst{11-7} = rd;
81  let Opcode = OPC_OP_V.Value;
82
83  let Defs = [VTYPE, VL];
84}
85
86class RVInstSetVLi<dag outs, dag ins, string opcodestr, string argstr>
87    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatI> {
88  bits<5> rs1;
89  bits<5> rd;
90  bits<11> vtypei;
91
92  let Inst{31} = 0;
93  let Inst{30-20} = vtypei;
94  let Inst{19-15} = rs1;
95  let Inst{14-12} = 0b111;
96  let Inst{11-7} = rd;
97  let Opcode = OPC_OP_V.Value;
98
99  let Defs = [VTYPE, VL];
100}
101
102class RVInstSetVL<dag outs, dag ins, string opcodestr, string argstr>
103    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
104  bits<5> rs2;
105  bits<5> rs1;
106  bits<5> rd;
107
108  let Inst{31} = 1;
109  let Inst{30-25} = 0b000000;
110  let Inst{24-20} = rs2;
111  let Inst{19-15} = rs1;
112  let Inst{14-12} = 0b111;
113  let Inst{11-7} = rd;
114  let Opcode = OPC_OP_V.Value;
115
116  let Defs = [VTYPE, VL];
117}
118
119class RVInstVV<bits<6> funct6, RISCVVFormat opv, dag outs, dag ins,
120               string opcodestr, string argstr>
121    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
122  bits<5> vs2;
123  bits<5> vs1;
124  bits<5> vd;
125  bit vm;
126
127  let Inst{31-26} = funct6;
128  let Inst{25} = vm;
129  let Inst{24-20} = vs2;
130  let Inst{19-15} = vs1;
131  let Inst{14-12} = opv.Value;
132  let Inst{11-7} = vd;
133  let Opcode = OPC_OP_V.Value;
134
135  let Uses = [VTYPE, VL];
136  let RVVConstraint = VMConstraint;
137}
138
139class RVInstVX<bits<6> funct6, RISCVVFormat opv, dag outs, dag ins,
140                string opcodestr, string argstr>
141    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
142  bits<5> vs2;
143  bits<5> rs1;
144  bits<5> vd;
145  bit vm;
146
147  let Inst{31-26} = funct6;
148  let Inst{25} = vm;
149  let Inst{24-20} = vs2;
150  let Inst{19-15} = rs1;
151  let Inst{14-12} = opv.Value;
152  let Inst{11-7} = vd;
153  let Opcode = OPC_OP_V.Value;
154
155  let Uses = [VTYPE, VL];
156  let RVVConstraint = VMConstraint;
157}
158
159class RVInstV2<bits<6> funct6, bits<5> vs2, RISCVVFormat opv, dag outs, dag ins,
160                string opcodestr, string argstr>
161    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
162  bits<5> rs1;
163  bits<5> vd;
164  bit vm;
165
166  let Inst{31-26} = funct6;
167  let Inst{25} = vm;
168  let Inst{24-20} = vs2;
169  let Inst{19-15} = rs1;
170  let Inst{14-12} = opv.Value;
171  let Inst{11-7} = vd;
172  let Opcode = OPC_OP_V.Value;
173
174  let Uses = [VTYPE, VL];
175  let RVVConstraint = VMConstraint;
176}
177
178class RVInstIVI<bits<6> funct6, dag outs, dag ins, string opcodestr,
179                string argstr>
180    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
181  bits<5> vs2;
182  bits<5> imm;
183  bits<5> vd;
184  bit vm;
185
186  let Inst{31-26} = funct6;
187  let Inst{25} = vm;
188  let Inst{24-20} = vs2;
189  let Inst{19-15} = imm;
190  let Inst{14-12} = 0b011;
191  let Inst{11-7} = vd;
192  let Opcode = OPC_OP_V.Value;
193
194  let Uses = [VTYPE, VL];
195  let RVVConstraint = VMConstraint;
196}
197
198class RVInstV<bits<6> funct6, bits<5> vs1, RISCVVFormat opv, dag outs,
199              dag ins, string opcodestr, string argstr>
200    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
201  bits<5> vs2;
202  bits<5> vd;
203  bit vm;
204
205  let Inst{31-26} = funct6;
206  let Inst{25} = vm;
207  let Inst{24-20} = vs2;
208  let Inst{19-15} = vs1;
209  let Inst{14-12} = opv.Value;
210  let Inst{11-7} = vd;
211  let Opcode = OPC_OP_V.Value;
212
213  let Uses = [VTYPE, VL];
214  let RVVConstraint = VMConstraint;
215}
216
217class RVInstVLU<bits<3> nf, bit mew, RISCVLSUMOP lumop,
218                bits<3> width, dag outs, dag ins, string opcodestr,
219                string argstr>
220    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
221  bits<5> rs1;
222  bits<5> vd;
223  bit vm;
224
225  let Inst{31-29} = nf;
226  let Inst{28} = mew;
227  let Inst{27-26} = MOPLDUnitStride.Value;
228  let Inst{25} = vm;
229  let Inst{24-20} = lumop.Value;
230  let Inst{19-15} = rs1;
231  let Inst{14-12} = width;
232  let Inst{11-7} = vd;
233  let Opcode = OPC_LOAD_FP.Value;
234
235  let Uses = [VTYPE, VL];
236  let RVVConstraint = VMConstraint;
237}
238
239class RVInstVLS<bits<3> nf, bit mew, bits<3> width,
240                dag outs, dag ins, string opcodestr, string argstr>
241    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
242  bits<5> rs2;
243  bits<5> rs1;
244  bits<5> vd;
245  bit vm;
246
247  let Inst{31-29} = nf;
248  let Inst{28} = mew;
249  let Inst{27-26} = MOPLDStrided.Value;
250  let Inst{25} = vm;
251  let Inst{24-20} = rs2;
252  let Inst{19-15} = rs1;
253  let Inst{14-12} = width;
254  let Inst{11-7} = vd;
255  let Opcode = OPC_LOAD_FP.Value;
256
257  let Uses = [VTYPE, VL];
258  let RVVConstraint = VMConstraint;
259}
260
261class RVInstVLX<bits<3> nf, bit mew, RISCVMOP mop, bits<3> width,
262                dag outs, dag ins, string opcodestr, string argstr>
263    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
264  bits<5> vs2;
265  bits<5> rs1;
266  bits<5> vd;
267  bit vm;
268
269  let Inst{31-29} = nf;
270  let Inst{28} = mew;
271  let Inst{27-26} = mop.Value;
272  let Inst{25} = vm;
273  let Inst{24-20} = vs2;
274  let Inst{19-15} = rs1;
275  let Inst{14-12} = width;
276  let Inst{11-7} = vd;
277  let Opcode = OPC_LOAD_FP.Value;
278
279  let Uses = [VTYPE, VL];
280  let RVVConstraint = VMConstraint;
281}
282
283class RVInstVSU<bits<3> nf, bit mew, RISCVLSUMOP sumop,
284                bits<3> width, dag outs, dag ins, string opcodestr,
285                string argstr>
286    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
287  bits<5> rs1;
288  bits<5> vs3;
289  bit vm;
290
291  let Inst{31-29} = nf;
292  let Inst{28} = mew;
293  let Inst{27-26} = MOPSTUnitStride.Value;
294  let Inst{25} = vm;
295  let Inst{24-20} = sumop.Value;
296  let Inst{19-15} = rs1;
297  let Inst{14-12} = width;
298  let Inst{11-7} = vs3;
299  let Opcode = OPC_STORE_FP.Value;
300
301  let Uses = [VTYPE, VL];
302}
303
304class RVInstVSS<bits<3> nf, bit mew, bits<3> width,
305                dag outs, dag ins, string opcodestr, string argstr>
306    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
307  bits<5> rs2;
308  bits<5> rs1;
309  bits<5> vs3;
310  bit vm;
311
312  let Inst{31-29} = nf;
313  let Inst{28} = mew;
314  let Inst{27-26} = MOPSTStrided.Value;
315  let Inst{25} = vm;
316  let Inst{24-20} = rs2;
317  let Inst{19-15} = rs1;
318  let Inst{14-12} = width;
319  let Inst{11-7} = vs3;
320  let Opcode = OPC_STORE_FP.Value;
321
322  let Uses = [VTYPE, VL];
323}
324
325class RVInstVSX<bits<3> nf, bit mew, RISCVMOP mop, bits<3> width,
326                dag outs, dag ins, string opcodestr, string argstr>
327    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
328  bits<5> vs2;
329  bits<5> rs1;
330  bits<5> vs3;
331  bit vm;
332
333  let Inst{31-29} = nf;
334  let Inst{28} = mew;
335  let Inst{27-26} = mop.Value;
336  let Inst{25} = vm;
337  let Inst{24-20} = vs2;
338  let Inst{19-15} = rs1;
339  let Inst{14-12} = width;
340  let Inst{11-7} = vs3;
341  let Opcode = OPC_STORE_FP.Value;
342
343  let Uses = [VTYPE, VL];
344}
345
346class RVInstVAMO<RISCVAMOOP amoop, bits<3> width, dag outs,
347                 dag ins, string opcodestr, string argstr>
348    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
349  bits<5> vs2;
350  bits<5> rs1;
351  bit wd;
352  bit vm;
353
354  let Inst{31-27} = amoop.Value;
355  let Inst{26} = wd;
356  let Inst{25} = vm;
357  let Inst{24-20} = vs2;
358  let Inst{19-15} = rs1;
359  let Inst{14-12} = width;
360  let Opcode = OPC_AMO.Value;
361
362  let Uses = [VTYPE, VL];
363}
364