1//===-- RISCVInstrFormatsV.td - RISCV V Instruction Formats --*- tablegen -*-=//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9//  This file describes the RISC-V V extension instruction formats.
10//
11//===----------------------------------------------------------------------===//
12
13class RISCVVFormat<bits<3> val> {
14  bits<3> Value = val;
15}
16def OPIVV : RISCVVFormat<0b000>;
17def OPFVV : RISCVVFormat<0b001>;
18def OPMVV : RISCVVFormat<0b010>;
19def OPIVI : RISCVVFormat<0b011>;
20def OPIVX : RISCVVFormat<0b100>;
21def OPFVF : RISCVVFormat<0b101>;
22def OPMVX : RISCVVFormat<0b110>;
23
24class RISCVMOP<bits<3> val> {
25  bits<3> Value = val;
26}
27def MOPLDUnitStrideU : RISCVMOP<0b000>;
28def MOPLDStridedU    : RISCVMOP<0b010>;
29def MOPLDIndexedU    : RISCVMOP<0b011>;
30def MOPLDUnitStrideS : RISCVMOP<0b100>;
31def MOPLDStridedS    : RISCVMOP<0b110>;
32def MOPLDIndexedS    : RISCVMOP<0b111>;
33
34def MOPSTUnitStride  : RISCVMOP<0b000>;
35def MOPSTStrided     : RISCVMOP<0b010>;
36def MOPSTIndexedOrder: RISCVMOP<0b011>;
37def MOPSTIndexedUnOrd: RISCVMOP<0b111>;
38
39class RISCVLSUMOP<bits<5> val> {
40  bits<5> Value = val;
41}
42def LUMOPUnitStride  : RISCVLSUMOP<0b00000>;
43def LUMOPUnitStrideWholeReg : RISCVLSUMOP<0b01000>;
44def LUMOPUnitStrideFF: RISCVLSUMOP<0b10000>;
45def SUMOPUnitStride  : RISCVLSUMOP<0b00000>;
46def SUMOPUnitStrideWholeReg : RISCVLSUMOP<0b01000>;
47
48class RISCVWidth<bits<3> val> {
49  bits<3> Value = val;
50}
51def LSWidthVByte : RISCVWidth<0b000>;
52def LSWidthVHalf : RISCVWidth<0b101>;
53def LSWidthVWord : RISCVWidth<0b110>;
54def LSWidthVSEW  : RISCVWidth<0b111>;
55
56class RVInstSetVLi<dag outs, dag ins, string opcodestr, string argstr>
57    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatI> {
58  bits<5> rs1;
59  bits<5> rd;
60  bits<11> vtypei;
61
62  let Inst{31} = 0;
63  let Inst{30-20} = vtypei;
64  let Inst{19-15} = rs1;
65  let Inst{14-12} = 0b111;
66  let Inst{11-7} = rd;
67  let Opcode = OPC_OP_V.Value;
68
69  let Defs = [VTYPE, VL];
70}
71
72class RVInstSetVL<dag outs, dag ins, string opcodestr, string argstr>
73    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
74  bits<5> rs2;
75  bits<5> rs1;
76  bits<5> rd;
77
78  let Inst{31} = 1;
79  let Inst{30-25} = 0b000000;
80  let Inst{24-20} = rs2;
81  let Inst{19-15} = rs1;
82  let Inst{14-12} = 0b111;
83  let Inst{11-7} = rd;
84  let Opcode = OPC_OP_V.Value;
85
86  let Defs = [VTYPE, VL];
87}
88
89class RVInstVV<bits<6> funct6, RISCVVFormat opv, dag outs, dag ins,
90               string opcodestr, string argstr>
91    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
92  bits<5> vs2;
93  bits<5> vs1;
94  bits<5> vd;
95  bit vm;
96
97  let Inst{31-26} = funct6;
98  let Inst{25} = vm;
99  let Inst{24-20} = vs2;
100  let Inst{19-15} = vs1;
101  let Inst{14-12} = opv.Value;
102  let Inst{11-7} = vd;
103  let Opcode = OPC_OP_V.Value;
104
105  let Uses = [VTYPE, VL];
106}
107
108class RVInstVX<bits<6> funct6, RISCVVFormat opv, dag outs, dag ins,
109                string opcodestr, string argstr>
110    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
111  bits<5> vs2;
112  bits<5> rs1;
113  bits<5> vd;
114  bit vm;
115
116  let Inst{31-26} = funct6;
117  let Inst{25} = vm;
118  let Inst{24-20} = vs2;
119  let Inst{19-15} = rs1;
120  let Inst{14-12} = opv.Value;
121  let Inst{11-7} = vd;
122  let Opcode = OPC_OP_V.Value;
123
124  let Uses = [VTYPE, VL];
125}
126
127class RVInstV2<bits<6> funct6, bits<5> vs2, RISCVVFormat opv, dag outs, dag ins,
128                string opcodestr, string argstr>
129    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
130  bits<5> rs1;
131  bits<5> vd;
132  bit vm;
133
134  let Inst{31-26} = funct6;
135  let Inst{25} = vm;
136  let Inst{24-20} = vs2;
137  let Inst{19-15} = rs1;
138  let Inst{14-12} = opv.Value;
139  let Inst{11-7} = vd;
140  let Opcode = OPC_OP_V.Value;
141
142  let Uses = [VTYPE, VL];
143}
144
145class RVInstIVI<bits<6> funct6, dag outs, dag ins, string opcodestr,
146                string argstr>
147    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
148  bits<5> vs2;
149  bits<5> imm;
150  bits<5> vd;
151  bit vm;
152
153  let Inst{31-26} = funct6;
154  let Inst{25} = vm;
155  let Inst{24-20} = vs2;
156  let Inst{19-15} = imm;
157  let Inst{14-12} = 0b011;
158  let Inst{11-7} = vd;
159  let Opcode = OPC_OP_V.Value;
160
161  let Uses = [VTYPE, VL];
162}
163
164class RVInstV<bits<6> funct6, bits<5> vs1, RISCVVFormat opv, dag outs,
165              dag ins, string opcodestr, string argstr>
166    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
167  bits<5> vs2;
168  bits<5> vd;
169  bit vm;
170
171  let Inst{31-26} = funct6;
172  let Inst{25} = vm;
173  let Inst{24-20} = vs2;
174  let Inst{19-15} = vs1;
175  let Inst{14-12} = opv.Value;
176  let Inst{11-7} = vd;
177  let Opcode = OPC_OP_V.Value;
178
179  let Uses = [VTYPE, VL];
180}
181
182class RVInstVLU<bits<3> nf, RISCVMOP mop, RISCVLSUMOP lumop,
183                RISCVWidth width, dag outs, dag ins, string opcodestr,
184                string argstr>
185    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
186  bits<5> rs1;
187  bits<5> vd;
188  bit vm;
189
190  let Inst{31-29} = nf;
191  let Inst{28-26} = mop.Value;
192  let Inst{25} = vm;
193  let Inst{24-20} = lumop.Value;
194  let Inst{19-15} = rs1;
195  let Inst{14-12} = width.Value;
196  let Inst{11-7} = vd;
197  let Opcode = OPC_LOAD_FP.Value;
198
199  let Uses = [VTYPE, VL];
200}
201
202class RVInstVLS<bits<3> nf, RISCVMOP mop, RISCVWidth width,
203                dag outs, dag ins, string opcodestr, string argstr>
204    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
205  bits<5> rs2;
206  bits<5> rs1;
207  bits<5> vd;
208  bit vm;
209
210  let Inst{31-29} = nf;
211  let Inst{28-26} = mop.Value;
212  let Inst{25} = vm;
213  let Inst{24-20} = rs2;
214  let Inst{19-15} = rs1;
215  let Inst{14-12} = width.Value;
216  let Inst{11-7} = vd;
217  let Opcode = OPC_LOAD_FP.Value;
218
219  let Uses = [VTYPE, VL];
220}
221
222class RVInstVLX<bits<3> nf, RISCVMOP mop, RISCVWidth width,
223                dag outs, dag ins, string opcodestr, string argstr>
224    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
225  bits<5> vs2;
226  bits<5> rs1;
227  bits<5> vd;
228  bit vm;
229
230  let Inst{31-29} = nf;
231  let Inst{28-26} = mop.Value;
232  let Inst{25} = vm;
233  let Inst{24-20} = vs2;
234  let Inst{19-15} = rs1;
235  let Inst{14-12} = width.Value;
236  let Inst{11-7} = vd;
237  let Opcode = OPC_LOAD_FP.Value;
238
239  let Uses = [VTYPE, VL];
240}
241
242class RVInstVSU<bits<3> nf, RISCVMOP mop, RISCVLSUMOP sumop,
243                RISCVWidth width, dag outs, dag ins, string opcodestr,
244                string argstr>
245    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
246  bits<5> rs1;
247  bits<5> vs3;
248  bit vm;
249
250  let Inst{31-29} = nf;
251  let Inst{28-26} = mop.Value;
252  let Inst{25} = vm;
253  let Inst{24-20} = sumop.Value;
254  let Inst{19-15} = rs1;
255  let Inst{14-12} = width.Value;
256  let Inst{11-7} = vs3;
257  let Opcode = OPC_STORE_FP.Value;
258
259  let Uses = [VTYPE, VL];
260}
261
262class RVInstVSS<bits<3> nf, RISCVMOP mop, RISCVWidth width,
263                dag outs, dag ins, string opcodestr, string argstr>
264    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
265  bits<5> rs2;
266  bits<5> rs1;
267  bits<5> vs3;
268  bit vm;
269
270  let Inst{31-29} = nf;
271  let Inst{28-26} = mop.Value;
272  let Inst{25} = vm;
273  let Inst{24-20} = rs2;
274  let Inst{19-15} = rs1;
275  let Inst{14-12} = width.Value;
276  let Inst{11-7} = vs3;
277  let Opcode = OPC_STORE_FP.Value;
278
279  let Uses = [VTYPE, VL];
280}
281
282class RVInstVSX<bits<3> nf, RISCVMOP mop, RISCVWidth width,
283                dag outs, dag ins, string opcodestr, string argstr>
284    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
285  bits<5> vs2;
286  bits<5> rs1;
287  bits<5> vs3;
288  bit vm;
289
290  let Inst{31-29} = nf;
291  let Inst{28-26} = mop.Value;
292  let Inst{25} = vm;
293  let Inst{24-20} = vs2;
294  let Inst{19-15} = rs1;
295  let Inst{14-12} = width.Value;
296  let Inst{11-7} = vs3;
297  let Opcode = OPC_STORE_FP.Value;
298
299  let Uses = [VTYPE, VL];
300}
301