1 //===--- SPIRVCallLowering.cpp - Call lowering ------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements the lowering of LLVM calls to machine code calls for 10 // GlobalISel. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "SPIRVCallLowering.h" 15 #include "MCTargetDesc/SPIRVBaseInfo.h" 16 #include "SPIRV.h" 17 #include "SPIRVGlobalRegistry.h" 18 #include "SPIRVISelLowering.h" 19 #include "SPIRVRegisterInfo.h" 20 #include "SPIRVSubtarget.h" 21 #include "SPIRVUtils.h" 22 #include "llvm/CodeGen/FunctionLoweringInfo.h" 23 24 using namespace llvm; 25 26 SPIRVCallLowering::SPIRVCallLowering(const SPIRVTargetLowering &TLI, 27 const SPIRVSubtarget &ST, 28 SPIRVGlobalRegistry *GR) 29 : CallLowering(&TLI), ST(ST), GR(GR) {} 30 31 bool SPIRVCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, 32 const Value *Val, ArrayRef<Register> VRegs, 33 FunctionLoweringInfo &FLI, 34 Register SwiftErrorVReg) const { 35 // Currently all return types should use a single register. 36 // TODO: handle the case of multiple registers. 37 if (VRegs.size() > 1) 38 return false; 39 if (Val) 40 return MIRBuilder.buildInstr(SPIRV::OpReturnValue) 41 .addUse(VRegs[0]) 42 .constrainAllUses(MIRBuilder.getTII(), *ST.getRegisterInfo(), 43 *ST.getRegBankInfo()); 44 MIRBuilder.buildInstr(SPIRV::OpReturn); 45 return true; 46 } 47 48 // Based on the LLVM function attributes, get a SPIR-V FunctionControl. 49 static uint32_t getFunctionControl(const Function &F) { 50 uint32_t FuncControl = static_cast<uint32_t>(SPIRV::FunctionControl::None); 51 if (F.hasFnAttribute(Attribute::AttrKind::AlwaysInline)) { 52 FuncControl |= static_cast<uint32_t>(SPIRV::FunctionControl::Inline); 53 } 54 if (F.hasFnAttribute(Attribute::AttrKind::ReadNone)) { 55 FuncControl |= static_cast<uint32_t>(SPIRV::FunctionControl::Pure); 56 } 57 if (F.hasFnAttribute(Attribute::AttrKind::ReadOnly)) { 58 FuncControl |= static_cast<uint32_t>(SPIRV::FunctionControl::Const); 59 } 60 if (F.hasFnAttribute(Attribute::AttrKind::NoInline)) { 61 FuncControl |= static_cast<uint32_t>(SPIRV::FunctionControl::DontInline); 62 } 63 return FuncControl; 64 } 65 66 bool SPIRVCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder, 67 const Function &F, 68 ArrayRef<ArrayRef<Register>> VRegs, 69 FunctionLoweringInfo &FLI) const { 70 assert(GR && "Must initialize the SPIRV type registry before lowering args."); 71 72 // Assign types and names to all args, and store their types for later. 73 SmallVector<Register, 4> ArgTypeVRegs; 74 if (VRegs.size() > 0) { 75 unsigned i = 0; 76 for (const auto &Arg : F.args()) { 77 // Currently formal args should use single registers. 78 // TODO: handle the case of multiple registers. 79 if (VRegs[i].size() > 1) 80 return false; 81 auto *SpirvTy = 82 GR->assignTypeToVReg(Arg.getType(), VRegs[i][0], MIRBuilder); 83 ArgTypeVRegs.push_back(GR->getSPIRVTypeID(SpirvTy)); 84 85 if (Arg.hasName()) 86 buildOpName(VRegs[i][0], Arg.getName(), MIRBuilder); 87 if (Arg.getType()->isPointerTy()) { 88 auto DerefBytes = static_cast<unsigned>(Arg.getDereferenceableBytes()); 89 if (DerefBytes != 0) 90 buildOpDecorate(VRegs[i][0], MIRBuilder, 91 SPIRV::Decoration::MaxByteOffset, {DerefBytes}); 92 } 93 if (Arg.hasAttribute(Attribute::Alignment)) { 94 buildOpDecorate(VRegs[i][0], MIRBuilder, SPIRV::Decoration::Alignment, 95 {static_cast<unsigned>(Arg.getParamAlignment())}); 96 } 97 if (Arg.hasAttribute(Attribute::ReadOnly)) { 98 auto Attr = 99 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::NoWrite); 100 buildOpDecorate(VRegs[i][0], MIRBuilder, 101 SPIRV::Decoration::FuncParamAttr, {Attr}); 102 } 103 if (Arg.hasAttribute(Attribute::ZExt)) { 104 auto Attr = 105 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::Zext); 106 buildOpDecorate(VRegs[i][0], MIRBuilder, 107 SPIRV::Decoration::FuncParamAttr, {Attr}); 108 } 109 ++i; 110 } 111 } 112 113 // Generate a SPIR-V type for the function. 114 auto MRI = MIRBuilder.getMRI(); 115 Register FuncVReg = MRI->createGenericVirtualRegister(LLT::scalar(32)); 116 MRI->setRegClass(FuncVReg, &SPIRV::IDRegClass); 117 118 auto *FTy = F.getFunctionType(); 119 auto FuncTy = GR->assignTypeToVReg(FTy, FuncVReg, MIRBuilder); 120 121 // Build the OpTypeFunction declaring it. 122 Register ReturnTypeID = FuncTy->getOperand(1).getReg(); 123 uint32_t FuncControl = getFunctionControl(F); 124 125 MIRBuilder.buildInstr(SPIRV::OpFunction) 126 .addDef(FuncVReg) 127 .addUse(ReturnTypeID) 128 .addImm(FuncControl) 129 .addUse(GR->getSPIRVTypeID(FuncTy)); 130 131 // Add OpFunctionParameters. 132 const unsigned NumArgs = ArgTypeVRegs.size(); 133 for (unsigned i = 0; i < NumArgs; ++i) { 134 assert(VRegs[i].size() == 1 && "Formal arg has multiple vregs"); 135 MRI->setRegClass(VRegs[i][0], &SPIRV::IDRegClass); 136 MIRBuilder.buildInstr(SPIRV::OpFunctionParameter) 137 .addDef(VRegs[i][0]) 138 .addUse(ArgTypeVRegs[i]); 139 } 140 // Name the function. 141 if (F.hasName()) 142 buildOpName(FuncVReg, F.getName(), MIRBuilder); 143 144 // Handle entry points and function linkage. 145 if (F.getCallingConv() == CallingConv::SPIR_KERNEL) { 146 auto MIB = MIRBuilder.buildInstr(SPIRV::OpEntryPoint) 147 .addImm(static_cast<uint32_t>(SPIRV::ExecutionModel::Kernel)) 148 .addUse(FuncVReg); 149 addStringImm(F.getName(), MIB); 150 } else if (F.getLinkage() == GlobalValue::LinkageTypes::ExternalLinkage || 151 F.getLinkage() == GlobalValue::LinkOnceODRLinkage) { 152 auto LnkTy = F.isDeclaration() ? SPIRV::LinkageType::Import 153 : SPIRV::LinkageType::Export; 154 buildOpDecorate(FuncVReg, MIRBuilder, SPIRV::Decoration::LinkageAttributes, 155 {static_cast<uint32_t>(LnkTy)}, F.getGlobalIdentifier()); 156 } 157 158 return true; 159 } 160 161 bool SPIRVCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, 162 CallLoweringInfo &Info) const { 163 // Currently call returns should have single vregs. 164 // TODO: handle the case of multiple registers. 165 if (Info.OrigRet.Regs.size() > 1) 166 return false; 167 168 Register ResVReg = 169 Info.OrigRet.Regs.empty() ? Register(0) : Info.OrigRet.Regs[0]; 170 // Emit a regular OpFunctionCall. If it's an externally declared function, 171 // be sure to emit its type and function declaration here. It will be 172 // hoisted globally later. 173 if (Info.Callee.isGlobal()) { 174 auto *CF = dyn_cast_or_null<const Function>(Info.Callee.getGlobal()); 175 // TODO: support constexpr casts and indirect calls. 176 if (CF == nullptr) 177 return false; 178 if (CF->isDeclaration()) { 179 // Emit the type info and forward function declaration to the first MBB 180 // to ensure VReg definition dependencies are valid across all MBBs. 181 MachineBasicBlock::iterator OldII = MIRBuilder.getInsertPt(); 182 MachineBasicBlock &OldBB = MIRBuilder.getMBB(); 183 MachineBasicBlock &FirstBB = *MIRBuilder.getMF().getBlockNumbered(0); 184 MIRBuilder.setInsertPt(FirstBB, FirstBB.instr_end()); 185 186 SmallVector<ArrayRef<Register>, 8> VRegArgs; 187 SmallVector<SmallVector<Register, 1>, 8> ToInsert; 188 for (const Argument &Arg : CF->args()) { 189 if (MIRBuilder.getDataLayout().getTypeStoreSize(Arg.getType()).isZero()) 190 continue; // Don't handle zero sized types. 191 ToInsert.push_back({MIRBuilder.getMRI()->createGenericVirtualRegister( 192 LLT::scalar(32))}); 193 VRegArgs.push_back(ToInsert.back()); 194 } 195 // TODO: Reuse FunctionLoweringInfo. 196 FunctionLoweringInfo FuncInfo; 197 lowerFormalArguments(MIRBuilder, *CF, VRegArgs, FuncInfo); 198 MIRBuilder.setInsertPt(OldBB, OldII); 199 } 200 } 201 202 // Make sure there's a valid return reg, even for functions returning void. 203 if (!ResVReg.isValid()) { 204 ResVReg = MIRBuilder.getMRI()->createVirtualRegister(&SPIRV::IDRegClass); 205 } 206 SPIRVType *RetType = 207 GR->assignTypeToVReg(Info.OrigRet.Ty, ResVReg, MIRBuilder); 208 209 // Emit the OpFunctionCall and its args. 210 auto MIB = MIRBuilder.buildInstr(SPIRV::OpFunctionCall) 211 .addDef(ResVReg) 212 .addUse(GR->getSPIRVTypeID(RetType)) 213 .add(Info.Callee); 214 215 for (const auto &Arg : Info.OrigArgs) { 216 // Currently call args should have single vregs. 217 if (Arg.Regs.size() > 1) 218 return false; 219 MIB.addUse(Arg.Regs[0]); 220 } 221 return MIB.constrainAllUses(MIRBuilder.getTII(), *ST.getRegisterInfo(), 222 *ST.getRegBankInfo()); 223 } 224