1*81ad6265SDimitry Andric //===- SPIRVRegisterBankInfo.h -----------------------------------*- C++ -*-==//
2*81ad6265SDimitry Andric //
3*81ad6265SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4*81ad6265SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
5*81ad6265SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6*81ad6265SDimitry Andric //
7*81ad6265SDimitry Andric //===----------------------------------------------------------------------===//
8*81ad6265SDimitry Andric //
9*81ad6265SDimitry Andric // This file declares the targeting of the RegisterBankInfo class for SPIR-V.
10*81ad6265SDimitry Andric //
11*81ad6265SDimitry Andric //===----------------------------------------------------------------------===//
12*81ad6265SDimitry Andric 
13*81ad6265SDimitry Andric #ifndef LLVM_LIB_TARGET_SPIRV_SPIRVREGISTERBANKINFO_H
14*81ad6265SDimitry Andric #define LLVM_LIB_TARGET_SPIRV_SPIRVREGISTERBANKINFO_H
15*81ad6265SDimitry Andric 
16*81ad6265SDimitry Andric #include "llvm/CodeGen/RegisterBankInfo.h"
17*81ad6265SDimitry Andric 
18*81ad6265SDimitry Andric #define GET_REGBANK_DECLARATIONS
19*81ad6265SDimitry Andric #include "SPIRVGenRegisterBank.inc"
20*81ad6265SDimitry Andric 
21*81ad6265SDimitry Andric namespace llvm {
22*81ad6265SDimitry Andric 
23*81ad6265SDimitry Andric class TargetRegisterInfo;
24*81ad6265SDimitry Andric 
25*81ad6265SDimitry Andric class SPIRVGenRegisterBankInfo : public RegisterBankInfo {
26*81ad6265SDimitry Andric protected:
27*81ad6265SDimitry Andric #define GET_TARGET_REGBANK_CLASS
28*81ad6265SDimitry Andric #include "SPIRVGenRegisterBank.inc"
29*81ad6265SDimitry Andric };
30*81ad6265SDimitry Andric 
31*81ad6265SDimitry Andric // This class provides the information for the target register banks.
32*81ad6265SDimitry Andric class SPIRVRegisterBankInfo final : public SPIRVGenRegisterBankInfo {
33*81ad6265SDimitry Andric public:
34*81ad6265SDimitry Andric   const RegisterBank &getRegBankFromRegClass(const TargetRegisterClass &RC,
35*81ad6265SDimitry Andric                                              LLT Ty) const override;
36*81ad6265SDimitry Andric };
37*81ad6265SDimitry Andric } // namespace llvm
38*81ad6265SDimitry Andric #endif // LLVM_LIB_TARGET_SPIRV_SPIRVREGISTERBANKINFO_H
39