1*81ad6265SDimitry Andric//===-- SPIRVRegisterBanks.td - Describe SPIR-V RegBanks ---*- tablegen -*-===// 2*81ad6265SDimitry Andric// 3*81ad6265SDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*81ad6265SDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 5*81ad6265SDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*81ad6265SDimitry Andric// 7*81ad6265SDimitry Andric//===----------------------------------------------------------------------===// 8*81ad6265SDimitry Andric 9*81ad6265SDimitry Andric// Although RegisterBankSelection is disabled we need to distinct the banks 10*81ad6265SDimitry Andric// as InstructionSelector RegClass checking code relies on them 11*81ad6265SDimitry Andricdef IDRegBank : RegisterBank<"IDBank", [ID]>; 12*81ad6265SDimitry Andricdef fIDRegBank : RegisterBank<"fIDBank", [fID]>; 13*81ad6265SDimitry Andricdef vIDRegBank : RegisterBank<"vIDBank", [vID]>; 14*81ad6265SDimitry Andricdef vfIDRegBank : RegisterBank<"vfIDBank", [vfID]>; 15*81ad6265SDimitry Andricdef TYPERegBank : RegisterBank<"TYPEBank", [TYPE]>; 16