10b57cec5SDimitry Andric//===-- SystemZ.td - Describe the SystemZ target machine -----*- tblgen -*-===// 20b57cec5SDimitry Andric// 30b57cec5SDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric// 70b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric 90b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 100b57cec5SDimitry Andric// Target-independent interfaces which we are implementing 110b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 120b57cec5SDimitry Andric 130b57cec5SDimitry Andricinclude "llvm/Target/Target.td" 140b57cec5SDimitry Andric 150b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 160b57cec5SDimitry Andric// SystemZ subtarget features 170b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 180b57cec5SDimitry Andric 190b57cec5SDimitry Andricinclude "SystemZFeatures.td" 200b57cec5SDimitry Andric 210b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 220b57cec5SDimitry Andric// SystemZ subtarget scheduling models 230b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 240b57cec5SDimitry Andric 250b57cec5SDimitry Andricinclude "SystemZSchedule.td" 260b57cec5SDimitry Andric 270b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 280b57cec5SDimitry Andric// SystemZ supported processors 290b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 300b57cec5SDimitry Andric 310b57cec5SDimitry Andricinclude "SystemZProcessors.td" 320b57cec5SDimitry Andric 330b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 340b57cec5SDimitry Andric// Register file description 350b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 360b57cec5SDimitry Andric 370b57cec5SDimitry Andricinclude "SystemZRegisterInfo.td" 380b57cec5SDimitry Andric 390b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 400b57cec5SDimitry Andric// Calling convention description 410b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 420b57cec5SDimitry Andric 430b57cec5SDimitry Andricinclude "SystemZCallingConv.td" 440b57cec5SDimitry Andric 450b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 460b57cec5SDimitry Andric// Instruction descriptions 470b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 480b57cec5SDimitry Andric 490b57cec5SDimitry Andricinclude "SystemZOperators.td" 500b57cec5SDimitry Andricinclude "SystemZOperands.td" 510b57cec5SDimitry Andricinclude "SystemZPatterns.td" 520b57cec5SDimitry Andricinclude "SystemZInstrFormats.td" 530b57cec5SDimitry Andricinclude "SystemZInstrInfo.td" 540b57cec5SDimitry Andricinclude "SystemZInstrVector.td" 550b57cec5SDimitry Andricinclude "SystemZInstrFP.td" 560b57cec5SDimitry Andricinclude "SystemZInstrHFP.td" 570b57cec5SDimitry Andricinclude "SystemZInstrDFP.td" 580b57cec5SDimitry Andricinclude "SystemZInstrSystem.td" 590b57cec5SDimitry Andric 600b57cec5SDimitry Andricdef SystemZInstrInfo : InstrInfo { let guessInstructionProperties = 0; } 610b57cec5SDimitry Andric 620b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 630b57cec5SDimitry Andric// Assembly parser 640b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 650b57cec5SDimitry Andric 660b57cec5SDimitry Andricdef SystemZAsmParser : AsmParser { 670b57cec5SDimitry Andric let ShouldEmitMatchRegisterName = 0; 680b57cec5SDimitry Andric} 690b57cec5SDimitry Andric 700b57cec5SDimitry Andricdef ATTAsmParserVariant : AsmParserVariant { 710b57cec5SDimitry Andric int Variant = 0; 720b57cec5SDimitry Andric 730b57cec5SDimitry Andric // Variant name. 740b57cec5SDimitry Andric string Name = "att"; 750b57cec5SDimitry Andric} 760b57cec5SDimitry Andric 770b57cec5SDimitry Andricdef HLASMAsmParserVariant : AsmParserVariant { 780b57cec5SDimitry Andric int Variant = 1; 79 80 // Variant name. 81 string Name = "hlasm"; 82} 83 84//===----------------------------------------------------------------------===// 85// Top-level target declaration 86//===----------------------------------------------------------------------===// 87 88def SystemZ : Target { 89 let InstructionSet = SystemZInstrInfo; 90 let AssemblyParsers = [SystemZAsmParser]; 91 let AssemblyParserVariants = [ATTAsmParserVariant, HLASMAsmParserVariant]; 92 let AllowRegisterRenaming = 1; 93} 94