1 //===-- SystemZRegisterInfo.h - SystemZ register information ----*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZREGISTERINFO_H 10 #define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZREGISTERINFO_H 11 12 #include "SystemZ.h" 13 #include "llvm/CodeGen/TargetRegisterInfo.h" 14 15 #define GET_REGINFO_HEADER 16 #include "SystemZGenRegisterInfo.inc" 17 18 namespace llvm { 19 20 class LiveIntervals; 21 22 namespace SystemZ { 23 // Return the subreg to use for referring to the even and odd registers 24 // in a GR128 pair. Is32Bit says whether we want a GR32 or GR64. 25 inline unsigned even128(bool Is32bit) { 26 return Is32bit ? subreg_hl32 : subreg_h64; 27 } 28 inline unsigned odd128(bool Is32bit) { 29 return Is32bit ? subreg_l32 : subreg_l64; 30 } 31 32 // Reg should be a 32-bit GPR. Return true if it is a high register rather 33 // than a low register. 34 inline bool isHighReg(unsigned int Reg) { 35 if (SystemZ::GRH32BitRegClass.contains(Reg)) 36 return true; 37 assert(SystemZ::GR32BitRegClass.contains(Reg) && "Invalid GRX32"); 38 return false; 39 } 40 } // end namespace SystemZ 41 42 struct SystemZRegisterInfo : public SystemZGenRegisterInfo { 43 public: 44 SystemZRegisterInfo(); 45 46 /// getPointerRegClass - Return the register class to use to hold pointers. 47 /// This is currently only used by LOAD_STACK_GUARD, which requires a non-%r0 48 /// register, hence ADDR64. 49 const TargetRegisterClass * 50 getPointerRegClass(const MachineFunction &MF, 51 unsigned Kind=0) const override { 52 return &SystemZ::ADDR64BitRegClass; 53 } 54 55 /// getCrossCopyRegClass - Returns a legal register class to copy a register 56 /// in the specified class to or from. Returns NULL if it is possible to copy 57 /// between a two registers of the specified class. 58 const TargetRegisterClass * 59 getCrossCopyRegClass(const TargetRegisterClass *RC) const override; 60 61 bool getRegAllocationHints(unsigned VirtReg, 62 ArrayRef<MCPhysReg> Order, 63 SmallVectorImpl<MCPhysReg> &Hints, 64 const MachineFunction &MF, 65 const VirtRegMap *VRM, 66 const LiveRegMatrix *Matrix) const override; 67 68 // Override TargetRegisterInfo.h. 69 bool requiresRegisterScavenging(const MachineFunction &MF) const override { 70 return true; 71 } 72 bool requiresFrameIndexScavenging(const MachineFunction &MF) const override { 73 return true; 74 } 75 bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override { 76 return true; 77 } 78 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override; 79 const uint32_t *getCallPreservedMask(const MachineFunction &MF, 80 CallingConv::ID CC) const override; 81 BitVector getReservedRegs(const MachineFunction &MF) const override; 82 void eliminateFrameIndex(MachineBasicBlock::iterator MI, 83 int SPAdj, unsigned FIOperandNum, 84 RegScavenger *RS) const override; 85 86 /// SrcRC and DstRC will be morphed into NewRC if this returns true. 87 bool shouldCoalesce(MachineInstr *MI, 88 const TargetRegisterClass *SrcRC, 89 unsigned SubReg, 90 const TargetRegisterClass *DstRC, 91 unsigned DstSubReg, 92 const TargetRegisterClass *NewRC, 93 LiveIntervals &LIS) const override; 94 95 Register getFrameRegister(const MachineFunction &MF) const override; 96 }; 97 98 } // end namespace llvm 99 100 #endif 101