1//=- SystemZScheduleZ196.td - SystemZ Scheduling Definitions ---*- tblgen -*-=// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This file defines the machine model for Z196 to support instruction 10// scheduling and other instruction cost heuristics. 11// 12// Pseudos expanded right after isel do not need to be modelled here. 13// 14//===----------------------------------------------------------------------===// 15 16def Z196Model : SchedMachineModel { 17 18 let UnsupportedFeatures = Arch9UnsupportedFeatures.List; 19 20 let IssueWidth = 3; 21 let MicroOpBufferSize = 40; // Issue queues 22 let LoadLatency = 1; // Optimistic load latency. 23 24 let PostRAScheduler = 1; 25 26 // Extra cycles for a mispredicted branch. 27 let MispredictPenalty = 16; 28} 29 30let SchedModel = Z196Model in { 31// These definitions need the SchedModel value. They could be put in a 32// subtarget common include file, but it seems the include system in Tablegen 33// currently (2016) rejects multiple includes of same file. 34 35// Decoder grouping rules 36let NumMicroOps = 1 in { 37 def : WriteRes<NormalGr, []>; 38 def : WriteRes<BeginGroup, []> { let BeginGroup = 1; } 39 def : WriteRes<EndGroup, []> { let EndGroup = 1; } 40} 41def : WriteRes<GroupAlone, []> { 42 let NumMicroOps = 3; 43 let BeginGroup = 1; 44 let EndGroup = 1; 45} 46def : WriteRes<GroupAlone2, []> { 47 let NumMicroOps = 6; 48 let BeginGroup = 1; 49 let EndGroup = 1; 50} 51def : WriteRes<GroupAlone3, []> { 52 let NumMicroOps = 9; 53 let BeginGroup = 1; 54 let EndGroup = 1; 55} 56 57// Incoming latency removed from the register operand which is used together 58// with a memory operand by the instruction. 59def : ReadAdvance<RegReadAdv, 4>; 60 61// LoadLatency (above) is not used for instructions in this file. This is 62// instead the role of LSULatency, which is the latency value added to the 63// result of loads and instructions with folded memory operands. 64def : WriteRes<LSULatency, []> { let Latency = 4; let NumMicroOps = 0; } 65 66let NumMicroOps = 0 in { 67 foreach L = 1-30 in { 68 def : WriteRes<!cast<SchedWrite>("WLat"#L), []> { let Latency = L; } 69 } 70} 71 72// Execution units. 73def Z196_FXUnit : ProcResource<2>; 74def Z196_LSUnit : ProcResource<2>; 75def Z196_FPUnit : ProcResource<1>; 76def Z196_DFUnit : ProcResource<1>; 77def Z196_MCD : ProcResource<1>; 78 79// Subtarget specific definitions of scheduling resources. 80let NumMicroOps = 0 in { 81 def : WriteRes<FXU, [Z196_FXUnit]>; 82 def : WriteRes<LSU, [Z196_LSUnit]>; 83 def : WriteRes<FPU, [Z196_FPUnit]>; 84 def : WriteRes<DFU, [Z196_DFUnit]>; 85 foreach Num = 2-6 in { let ResourceCycles = [Num] in { 86 def : WriteRes<!cast<SchedWrite>("FXU"#Num), [Z196_FXUnit]>; 87 def : WriteRes<!cast<SchedWrite>("LSU"#Num), [Z196_LSUnit]>; 88 def : WriteRes<!cast<SchedWrite>("FPU"#Num), [Z196_FPUnit]>; 89 def : WriteRes<!cast<SchedWrite>("DFU"#Num), [Z196_DFUnit]>; 90 }} 91} 92 93def : WriteRes<MCD, [Z196_MCD]> { let NumMicroOps = 3; 94 let BeginGroup = 1; 95 let EndGroup = 1; } 96 97// -------------------------- INSTRUCTIONS ---------------------------------- // 98 99// InstRW constructs have been used in order to preserve the 100// readability of the InstrInfo files. 101 102// For each instruction, as matched by a regexp, provide a list of 103// resources that it needs. These will be combined into a SchedClass. 104 105//===----------------------------------------------------------------------===// 106// Stack allocation 107//===----------------------------------------------------------------------===// 108 109def : InstRW<[WLat1, FXU, NormalGr], (instregex "ADJDYNALLOC$")>; // Pseudo -> LA / LAY 110 111//===----------------------------------------------------------------------===// 112// Branch instructions 113//===----------------------------------------------------------------------===// 114 115// Branch 116def : InstRW<[WLat1, LSU, EndGroup], (instregex "(Call)?BRC(L)?(Asm.*)?$")>; 117def : InstRW<[WLat1, LSU, EndGroup], (instregex "(Call)?J(G)?(Asm.*)?$")>; 118def : InstRW<[WLat1, LSU, EndGroup], (instregex "(Call)?BC(R)?(Asm.*)?$")>; 119def : InstRW<[WLat1, LSU, EndGroup], (instregex "(Call)?B(R)?(Asm.*)?$")>; 120def : InstRW<[WLat1, FXU, LSU, GroupAlone], (instregex "BRCT(G|H)?$")>; 121def : InstRW<[WLat1, FXU, LSU, GroupAlone], (instregex "BCT(G)?(R)?$")>; 122def : InstRW<[WLat1, FXU3, LSU, GroupAlone2], 123 (instregex "B(R)?X(H|L).*$")>; 124 125// Compare and branch 126def : InstRW<[WLat1, FXU, LSU, GroupAlone], 127 (instregex "C(L)?(G)?(I|R)J(Asm.*)?$")>; 128def : InstRW<[WLat1, FXU, LSU, GroupAlone], 129 (instregex "C(L)?(G)?(I|R)B(Call|Return|Asm.*)?$")>; 130 131//===----------------------------------------------------------------------===// 132// Trap instructions 133//===----------------------------------------------------------------------===// 134 135// Trap 136def : InstRW<[WLat1, LSU, EndGroup], (instregex "(Cond)?Trap$")>; 137 138// Compare and trap 139def : InstRW<[WLat1, FXU, NormalGr], (instregex "C(G)?(I|R)T(Asm.*)?$")>; 140def : InstRW<[WLat1, FXU, NormalGr], (instregex "CL(G)?RT(Asm.*)?$")>; 141def : InstRW<[WLat1, FXU, NormalGr], (instregex "CL(F|G)IT(Asm.*)?$")>; 142 143//===----------------------------------------------------------------------===// 144// Call and return instructions 145//===----------------------------------------------------------------------===// 146 147// Call 148def : InstRW<[WLat1, LSU, FXU2, GroupAlone], (instregex "(Call)?BRAS$")>; 149def : InstRW<[WLat1, LSU, FXU2, GroupAlone], (instregex "(Call)?BRASL$")>; 150def : InstRW<[WLat1, LSU, FXU2, GroupAlone], (instregex "(Call)?BAS(R)?$")>; 151def : InstRW<[WLat1, LSU, FXU2, GroupAlone], (instregex "TLS_(G|L)DCALL$")>; 152 153// Return 154def : InstRW<[WLat1, LSU, EndGroup], (instregex "Return$")>; 155def : InstRW<[WLat1, LSU, EndGroup], (instregex "CondReturn$")>; 156 157//===----------------------------------------------------------------------===// 158// Move instructions 159//===----------------------------------------------------------------------===// 160 161// Moves 162def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "MV(G|H)?HI$")>; 163def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "MVI(Y)?$")>; 164 165// Move character 166def : InstRW<[WLat1, FXU, LSU3, GroupAlone], (instregex "MVC$")>; 167def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVCL(E|U)?$")>; 168 169// Pseudo -> reg move 170def : InstRW<[WLat1, FXU, NormalGr], (instregex "COPY(_TO_REGCLASS)?$")>; 171def : InstRW<[WLat1, FXU, NormalGr], (instregex "EXTRACT_SUBREG$")>; 172def : InstRW<[WLat1, FXU, NormalGr], (instregex "INSERT_SUBREG$")>; 173def : InstRW<[WLat1, FXU, NormalGr], (instregex "REG_SEQUENCE$")>; 174 175// Loads 176def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L(Y|FH|RL|Mux)?$")>; 177def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LG(RL)?$")>; 178def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>; 179 180def : InstRW<[WLat1, FXU, NormalGr], (instregex "LLIH(F|H|L)$")>; 181def : InstRW<[WLat1, FXU, NormalGr], (instregex "LLIL(F|H|L)$")>; 182 183def : InstRW<[WLat1, FXU, NormalGr], (instregex "LG(F|H)I$")>; 184def : InstRW<[WLat1, FXU, NormalGr], (instregex "LHI(Mux)?$")>; 185def : InstRW<[WLat1, FXU, NormalGr], (instregex "LR$")>; 186 187// Load and test 188def : InstRW<[WLat1LSU, WLat1LSU, LSU, FXU, NormalGr], (instregex "LT(G)?$")>; 189def : InstRW<[WLat1, FXU, NormalGr], (instregex "LT(G)?R$")>; 190 191// Stores 192def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STG(RL)?$")>; 193def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "ST128$")>; 194def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "ST(Y|FH|RL|Mux)?$")>; 195 196// String moves. 197def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVST$")>; 198 199//===----------------------------------------------------------------------===// 200// Conditional move instructions 201//===----------------------------------------------------------------------===// 202 203def : InstRW<[WLat2, FXU, EndGroup], (instregex "LOC(G)?R(Asm.*)?$")>; 204def : InstRW<[WLat2LSU, RegReadAdv, FXU, LSU, EndGroup], 205 (instregex "LOC(G)?(Asm.*)?$")>; 206def : InstRW<[WLat1, FXU, LSU, EndGroup], (instregex "STOC(G)?(Asm.*)?$")>; 207 208//===----------------------------------------------------------------------===// 209// Sign extensions 210//===----------------------------------------------------------------------===// 211 212def : InstRW<[WLat1, FXU, NormalGr], (instregex "L(B|H|G)R$")>; 213def : InstRW<[WLat1, FXU, NormalGr], (instregex "LG(B|H|F)R$")>; 214 215def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "LTGF$")>; 216def : InstRW<[WLat1, FXU, NormalGr], (instregex "LTGFR$")>; 217 218def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LB(H|Mux)?$")>; 219def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LH(Y)?$")>; 220def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LH(H|Mux|RL)$")>; 221def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LG(B|H|F)$")>; 222def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LG(H|F)RL$")>; 223 224//===----------------------------------------------------------------------===// 225// Zero extensions 226//===----------------------------------------------------------------------===// 227 228def : InstRW<[WLat1, FXU, NormalGr], (instregex "LLCR(Mux)?$")>; 229def : InstRW<[WLat1, FXU, NormalGr], (instregex "LLHR(Mux)?$")>; 230def : InstRW<[WLat1, FXU, NormalGr], (instregex "LLG(C|H|F|T)R$")>; 231def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLC(Mux)?$")>; 232def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLH(Mux)?$")>; 233def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LL(C|H)H$")>; 234def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLHRL$")>; 235def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLG(C|H|F|T|HRL|FRL)$")>; 236 237//===----------------------------------------------------------------------===// 238// Truncations 239//===----------------------------------------------------------------------===// 240 241def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STC(H|Y|Mux)?$")>; 242def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STH(H|Y|RL|Mux)?$")>; 243def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STCM(H|Y)?$")>; 244 245//===----------------------------------------------------------------------===// 246// Multi-register moves 247//===----------------------------------------------------------------------===// 248 249// Load multiple (estimated average of 5 ops) 250def : InstRW<[WLat10, WLat10, LSU5, GroupAlone], (instregex "LM(H|Y|G)?$")>; 251 252// Load multiple disjoint 253def : InstRW<[WLat30, WLat30, MCD], (instregex "LMD$")>; 254 255// Store multiple (estimated average of 3 ops) 256def : InstRW<[WLat1, LSU2, FXU5, GroupAlone], (instregex "STM(H|Y|G)?$")>; 257 258//===----------------------------------------------------------------------===// 259// Byte swaps 260//===----------------------------------------------------------------------===// 261 262def : InstRW<[WLat1, FXU, NormalGr], (instregex "LRV(G)?R$")>; 263def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LRV(G|H)?$")>; 264def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STRV(G|H)?$")>; 265def : InstRW<[WLat30, MCD], (instregex "MVCIN$")>; 266 267//===----------------------------------------------------------------------===// 268// Load address instructions 269//===----------------------------------------------------------------------===// 270 271def : InstRW<[WLat1, FXU, NormalGr], (instregex "LA(Y|RL)?$")>; 272 273// Load the Global Offset Table address 274def : InstRW<[WLat1, FXU, NormalGr], (instregex "GOT$")>; 275 276//===----------------------------------------------------------------------===// 277// Absolute and Negation 278//===----------------------------------------------------------------------===// 279 280def : InstRW<[WLat2, WLat2, FXU, NormalGr], (instregex "LP(G)?R$")>; 281def : InstRW<[WLat3, WLat3, FXU2, GroupAlone], (instregex "L(N|P)GFR$")>; 282def : InstRW<[WLat2, WLat2, FXU, NormalGr], (instregex "LN(R|GR)$")>; 283def : InstRW<[WLat1, FXU, NormalGr], (instregex "LC(R|GR)$")>; 284def : InstRW<[WLat2, WLat2, FXU2, GroupAlone], (instregex "LCGFR$")>; 285 286//===----------------------------------------------------------------------===// 287// Insertion 288//===----------------------------------------------------------------------===// 289 290def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "IC(Y)?$")>; 291def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 292 (instregex "IC32(Y)?$")>; 293def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 294 (instregex "ICM(H|Y)?$")>; 295def : InstRW<[WLat1, FXU, NormalGr], (instregex "II(F|H|L)Mux$")>; 296def : InstRW<[WLat1, FXU, NormalGr], (instregex "IIHF(64)?$")>; 297def : InstRW<[WLat1, FXU, NormalGr], (instregex "IIHH(64)?$")>; 298def : InstRW<[WLat1, FXU, NormalGr], (instregex "IIHL(64)?$")>; 299def : InstRW<[WLat1, FXU, NormalGr], (instregex "IILF(64)?$")>; 300def : InstRW<[WLat1, FXU, NormalGr], (instregex "IILH(64)?$")>; 301def : InstRW<[WLat1, FXU, NormalGr], (instregex "IILL(64)?$")>; 302 303//===----------------------------------------------------------------------===// 304// Addition 305//===----------------------------------------------------------------------===// 306 307def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 308 (instregex "A(L)?(Y)?$")>; 309def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "A(L)?SI$")>; 310def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone], 311 (instregex "AH(Y)?$")>; 312def : InstRW<[WLat1, FXU, NormalGr], (instregex "AIH$")>; 313def : InstRW<[WLat1, FXU, NormalGr], (instregex "AFI(Mux)?$")>; 314def : InstRW<[WLat1, FXU, NormalGr], (instregex "AGFI$")>; 315def : InstRW<[WLat1, FXU, NormalGr], (instregex "AGHI(K)?$")>; 316def : InstRW<[WLat1, FXU, NormalGr], (instregex "AGR(K)?$")>; 317def : InstRW<[WLat1, FXU, NormalGr], (instregex "AHI(K)?$")>; 318def : InstRW<[WLat1, FXU, NormalGr], (instregex "AHIMux(K)?$")>; 319def : InstRW<[WLat1, FXU, NormalGr], (instregex "AL(FI|HSIK)$")>; 320def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 321 (instregex "ALGF$")>; 322def : InstRW<[WLat1, FXU, NormalGr], (instregex "ALGHSIK$")>; 323def : InstRW<[WLat1, FXU, NormalGr], (instregex "ALGF(I|R)$")>; 324def : InstRW<[WLat1, FXU, NormalGr], (instregex "ALGR(K)?$")>; 325def : InstRW<[WLat1, FXU, NormalGr], (instregex "ALR(K)?$")>; 326def : InstRW<[WLat1, FXU, NormalGr], (instregex "AR(K)?$")>; 327def : InstRW<[WLat1, FXU, NormalGr], (instregex "A(L)?HHHR$")>; 328def : InstRW<[WLat2, WLat2, FXU2, GroupAlone], (instregex "A(L)?HHLR$")>; 329def : InstRW<[WLat1, FXU, NormalGr], (instregex "ALSIH(N)?$")>; 330def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 331 (instregex "A(L)?G$")>; 332def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "A(L)?GSI$")>; 333 334// Logical addition with carry 335def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXU, LSU, GroupAlone], 336 (instregex "ALC(G)?$")>; 337def : InstRW<[WLat2, WLat2, FXU, GroupAlone], (instregex "ALC(G)?R$")>; 338 339// Add with sign extension (32 -> 64) 340def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone], 341 (instregex "AGF$")>; 342def : InstRW<[WLat2, WLat2, FXU2, GroupAlone], (instregex "AGFR$")>; 343 344//===----------------------------------------------------------------------===// 345// Subtraction 346//===----------------------------------------------------------------------===// 347 348def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 349 (instregex "S(G|Y)?$")>; 350def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone], 351 (instregex "SH(Y)?$")>; 352def : InstRW<[WLat1, FXU, NormalGr], (instregex "SGR(K)?$")>; 353def : InstRW<[WLat1, FXU, NormalGr], (instregex "SLFI$")>; 354def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 355 (instregex "SL(G|GF|Y)?$")>; 356def : InstRW<[WLat1, FXU, NormalGr], (instregex "SLGF(I|R)$")>; 357def : InstRW<[WLat1, FXU, NormalGr], (instregex "SLGR(K)?$")>; 358def : InstRW<[WLat1, FXU, NormalGr], (instregex "SLR(K)?$")>; 359def : InstRW<[WLat1, FXU, NormalGr], (instregex "SR(K)?$")>; 360def : InstRW<[WLat1, FXU, NormalGr], (instregex "S(L)?HHHR$")>; 361def : InstRW<[WLat2, WLat2, FXU2, GroupAlone], (instregex "S(L)?HHLR$")>; 362 363// Subtraction with borrow 364def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXU, LSU, GroupAlone], 365 (instregex "SLB(G)?$")>; 366def : InstRW<[WLat2, WLat2, FXU, GroupAlone], (instregex "SLB(G)?R$")>; 367 368// Subtraction with sign extension (32 -> 64) 369def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone], 370 (instregex "SGF$")>; 371def : InstRW<[WLat2, WLat2, FXU2, GroupAlone], (instregex "SGFR$")>; 372 373//===----------------------------------------------------------------------===// 374// AND 375//===----------------------------------------------------------------------===// 376 377def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 378 (instregex "N(G|Y)?$")>; 379def : InstRW<[WLat1, FXU, NormalGr], (instregex "NGR(K)?$")>; 380def : InstRW<[WLat1, FXU, NormalGr], (instregex "NI(FMux|HMux|LMux)$")>; 381def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "NI(Y)?$")>; 382def : InstRW<[WLat1, FXU, NormalGr], (instregex "NIHF(64)?$")>; 383def : InstRW<[WLat1, FXU, NormalGr], (instregex "NIHH(64)?$")>; 384def : InstRW<[WLat1, FXU, NormalGr], (instregex "NIHL(64)?$")>; 385def : InstRW<[WLat1, FXU, NormalGr], (instregex "NILF(64)?$")>; 386def : InstRW<[WLat1, FXU, NormalGr], (instregex "NILH(64)?$")>; 387def : InstRW<[WLat1, FXU, NormalGr], (instregex "NILL(64)?$")>; 388def : InstRW<[WLat1, FXU, NormalGr], (instregex "NR(K)?$")>; 389def : InstRW<[WLat5LSU, LSU2, FXU, GroupAlone], (instregex "NC$")>; 390 391//===----------------------------------------------------------------------===// 392// OR 393//===----------------------------------------------------------------------===// 394 395def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 396 (instregex "O(G|Y)?$")>; 397def : InstRW<[WLat1, FXU, NormalGr], (instregex "OGR(K)?$")>; 398def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "OI(Y)?$")>; 399def : InstRW<[WLat1, FXU, NormalGr], (instregex "OI(FMux|HMux|LMux)$")>; 400def : InstRW<[WLat1, FXU, NormalGr], (instregex "OIHF(64)?$")>; 401def : InstRW<[WLat1, FXU, NormalGr], (instregex "OIHH(64)?$")>; 402def : InstRW<[WLat1, FXU, NormalGr], (instregex "OIHL(64)?$")>; 403def : InstRW<[WLat1, FXU, NormalGr], (instregex "OILF(64)?$")>; 404def : InstRW<[WLat1, FXU, NormalGr], (instregex "OILH(64)?$")>; 405def : InstRW<[WLat1, FXU, NormalGr], (instregex "OILL(64)?$")>; 406def : InstRW<[WLat1, FXU, NormalGr], (instregex "OR(K)?$")>; 407def : InstRW<[WLat5LSU, LSU2, FXU, GroupAlone], (instregex "OC$")>; 408 409//===----------------------------------------------------------------------===// 410// XOR 411//===----------------------------------------------------------------------===// 412 413def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 414 (instregex "X(G|Y)?$")>; 415def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "XI(Y)?$")>; 416def : InstRW<[WLat1, FXU, NormalGr], (instregex "XIFMux$")>; 417def : InstRW<[WLat1, FXU, NormalGr], (instregex "XGR(K)?$")>; 418def : InstRW<[WLat1, FXU, NormalGr], (instregex "XIHF(64)?$")>; 419def : InstRW<[WLat1, FXU, NormalGr], (instregex "XILF(64)?$")>; 420def : InstRW<[WLat1, FXU, NormalGr], (instregex "XR(K)?$")>; 421def : InstRW<[WLat5LSU, LSU2, FXU, GroupAlone], (instregex "XC$")>; 422 423//===----------------------------------------------------------------------===// 424// Multiplication 425//===----------------------------------------------------------------------===// 426 427def : InstRW<[WLat6LSU, RegReadAdv, FXU, LSU, NormalGr], 428 (instregex "MS(GF|Y)?$")>; 429def : InstRW<[WLat6, FXU, NormalGr], (instregex "MS(R|FI)$")>; 430def : InstRW<[WLat8LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "MSG$")>; 431def : InstRW<[WLat8, FXU, NormalGr], (instregex "MSGR$")>; 432def : InstRW<[WLat6, FXU, NormalGr], (instregex "MSGF(I|R)$")>; 433def : InstRW<[WLat11LSU, RegReadAdv, FXU2, LSU, GroupAlone], 434 (instregex "MLG$")>; 435def : InstRW<[WLat9, FXU2, GroupAlone], (instregex "MLGR$")>; 436def : InstRW<[WLat5, FXU, NormalGr], (instregex "MGHI$")>; 437def : InstRW<[WLat5, FXU, NormalGr], (instregex "MHI$")>; 438def : InstRW<[WLat5LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "MH(Y)?$")>; 439def : InstRW<[WLat7, FXU2, GroupAlone], (instregex "M(L)?R$")>; 440def : InstRW<[WLat7LSU, RegReadAdv, FXU2, LSU, GroupAlone], 441 (instregex "M(FY|L)?$")>; 442 443//===----------------------------------------------------------------------===// 444// Division and remainder 445//===----------------------------------------------------------------------===// 446 447def : InstRW<[WLat30, FPU4, FXU5, GroupAlone3], (instregex "DR$")>; 448def : InstRW<[WLat30, RegReadAdv, FPU4, LSU, FXU4, GroupAlone3], 449 (instregex "D$")>; 450def : InstRW<[WLat30, FPU4, FXU4, GroupAlone3], (instregex "DSG(F)?R$")>; 451def : InstRW<[WLat30, RegReadAdv, FPU4, LSU, FXU3, GroupAlone3], 452 (instregex "DSG(F)?$")>; 453def : InstRW<[WLat30, FPU4, FXU5, GroupAlone3], (instregex "DL(G)?R$")>; 454def : InstRW<[WLat30, RegReadAdv, FPU4, LSU, FXU4, GroupAlone3], 455 (instregex "DL(G)?$")>; 456 457//===----------------------------------------------------------------------===// 458// Shifts 459//===----------------------------------------------------------------------===// 460 461def : InstRW<[WLat1, FXU, NormalGr], (instregex "SLL(G|K)?$")>; 462def : InstRW<[WLat1, FXU, NormalGr], (instregex "SRL(G|K)?$")>; 463def : InstRW<[WLat1, FXU, NormalGr], (instregex "SRA(G|K)?$")>; 464def : InstRW<[WLat2, WLat2, FXU, NormalGr], (instregex "SLA(G|K)?$")>; 465def : InstRW<[WLat5LSU, WLat5LSU, FXU4, LSU, GroupAlone2], 466 (instregex "S(L|R)D(A|L)$")>; 467 468// Rotate 469def : InstRW<[WLat2LSU, FXU, LSU, NormalGr], (instregex "RLL(G)?$")>; 470 471// Rotate and insert 472def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBG(32)?$")>; 473def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBH(G|H|L)$")>; 474def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBL(G|H|L)$")>; 475def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBMux$")>; 476 477// Rotate and Select 478def : InstRW<[WLat3, WLat3, FXU2, GroupAlone], (instregex "R(N|O|X)SBG$")>; 479 480//===----------------------------------------------------------------------===// 481// Comparison 482//===----------------------------------------------------------------------===// 483 484def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "C(G|Y|Mux|RL)?$")>; 485def : InstRW<[WLat1, FXU, NormalGr], (instregex "C(F|H)I(Mux)?$")>; 486def : InstRW<[WLat1, FXU, NormalGr], (instregex "CG(F|H)I$")>; 487def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CG(HSI|RL)$")>; 488def : InstRW<[WLat1, FXU, NormalGr], (instregex "C(G)?R$")>; 489def : InstRW<[WLat1, FXU, NormalGr], (instregex "CIH$")>; 490def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "CHF$")>; 491def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CHSI$")>; 492def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 493 (instregex "CL(Y|Mux)?$")>; 494def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLFHSI$")>; 495def : InstRW<[WLat1, FXU, NormalGr], (instregex "CLFI(Mux)?$")>; 496def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "CLG$")>; 497def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLG(HRL|HSI)$")>; 498def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "CLGF$")>; 499def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLGFRL$")>; 500def : InstRW<[WLat1, FXU, NormalGr], (instregex "CLGF(I|R)$")>; 501def : InstRW<[WLat1, FXU, NormalGr], (instregex "CLGR$")>; 502def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLGRL$")>; 503def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "CLHF$")>; 504def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLH(RL|HSI)$")>; 505def : InstRW<[WLat1, FXU, NormalGr], (instregex "CLIH$")>; 506def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLI(Y)?$")>; 507def : InstRW<[WLat1, FXU, NormalGr], (instregex "CLR$")>; 508def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLRL$")>; 509def : InstRW<[WLat1, FXU, NormalGr], (instregex "C(L)?HHR$")>; 510def : InstRW<[WLat2, FXU2, GroupAlone], (instregex "C(L)?HLR$")>; 511 512// Compare halfword 513def : InstRW<[WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone], 514 (instregex "CH(Y)?$")>; 515def : InstRW<[WLat2LSU, FXU2, LSU, GroupAlone], (instregex "CHRL$")>; 516def : InstRW<[WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone], (instregex "CGH$")>; 517def : InstRW<[WLat2LSU, FXU2, LSU, GroupAlone], (instregex "CGHRL$")>; 518def : InstRW<[WLat2LSU, FXU2, LSU, GroupAlone], (instregex "CHHSI$")>; 519 520// Compare with sign extension (32 -> 64) 521def : InstRW<[WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone], (instregex "CGF$")>; 522def : InstRW<[WLat2LSU, FXU2, LSU, GroupAlone], (instregex "CGFRL$")>; 523def : InstRW<[WLat2, FXU2, GroupAlone], (instregex "CGFR$")>; 524 525// Compare logical character 526def : InstRW<[WLat9, FXU, LSU2, GroupAlone], (instregex "CLC$")>; 527def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLCL(E|U)?$")>; 528def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLST$")>; 529 530// Test under mask 531def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "TM(Y)?$")>; 532def : InstRW<[WLat1, FXU, NormalGr], (instregex "TM(H|L)Mux$")>; 533def : InstRW<[WLat1, FXU, NormalGr], (instregex "TMHH(64)?$")>; 534def : InstRW<[WLat1, FXU, NormalGr], (instregex "TMHL(64)?$")>; 535def : InstRW<[WLat1, FXU, NormalGr], (instregex "TMLH(64)?$")>; 536def : InstRW<[WLat1, FXU, NormalGr], (instregex "TMLL(64)?$")>; 537 538// Compare logical characters under mask 539def : InstRW<[WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone], 540 (instregex "CLM(H|Y)?$")>; 541 542//===----------------------------------------------------------------------===// 543// Prefetch 544//===----------------------------------------------------------------------===// 545 546def : InstRW<[WLat1, LSU, GroupAlone], (instregex "PFD(RL)?$")>; 547 548//===----------------------------------------------------------------------===// 549// Atomic operations 550//===----------------------------------------------------------------------===// 551 552def : InstRW<[WLat1, LSU, EndGroup], (instregex "Serialize$")>; 553 554def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "LAA(G)?$")>; 555def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "LAAL(G)?$")>; 556def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "LAN(G)?$")>; 557def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "LAO(G)?$")>; 558def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "LAX(G)?$")>; 559 560// Test and set 561def : InstRW<[WLat1LSU, FXU, LSU, EndGroup], (instregex "TS$")>; 562 563// Compare and swap 564def : InstRW<[WLat2LSU, WLat2LSU, FXU2, LSU, GroupAlone], 565 (instregex "CS(G|Y)?$")>; 566 567// Compare double and swap 568def : InstRW<[WLat5LSU, WLat5LSU, FXU5, LSU, GroupAlone2], 569 (instregex "CDS(Y)?$")>; 570def : InstRW<[WLat12, WLat12, FXU6, LSU2, GroupAlone], 571 (instregex "CDSG$")>; 572 573// Compare and swap and store 574def : InstRW<[WLat30, MCD], (instregex "CSST$")>; 575 576// Perform locked operation 577def : InstRW<[WLat30, MCD], (instregex "PLO$")>; 578 579// Load/store pair from/to quadword 580def : InstRW<[WLat4LSU, LSU2, GroupAlone], (instregex "LPQ$")>; 581def : InstRW<[WLat1, FXU2, LSU2, GroupAlone], (instregex "STPQ$")>; 582 583// Load pair disjoint 584def : InstRW<[WLat2LSU, WLat2LSU, LSU2, GroupAlone], (instregex "LPD(G)?$")>; 585 586//===----------------------------------------------------------------------===// 587// Translate and convert 588//===----------------------------------------------------------------------===// 589 590def : InstRW<[WLat30, MCD], (instregex "TR$")>; 591def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRT$")>; 592def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRTR$")>; 593def : InstRW<[WLat30, WLat30, MCD], (instregex "TRE$")>; 594def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRT(R)?E(Opt)?$")>; 595def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TR(T|O)(T|O)(Opt)?$")>; 596def : InstRW<[WLat30, WLat30, WLat30, MCD], 597 (instregex "CU(12|14|21|24|41|42)(Opt)?$")>; 598def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "(CUUTF|CUTFU)(Opt)?$")>; 599 600//===----------------------------------------------------------------------===// 601// Message-security assist 602//===----------------------------------------------------------------------===// 603 604def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], 605 (instregex "KM(C|F|O|CTR)?$")>; 606def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "(KIMD|KLMD|KMAC|PCC)$")>; 607 608//===----------------------------------------------------------------------===// 609// Decimal arithmetic 610//===----------------------------------------------------------------------===// 611 612def : InstRW<[WLat30, RegReadAdv, FXU, DFU2, LSU2, GroupAlone2], 613 (instregex "CVBG$")>; 614def : InstRW<[WLat20, RegReadAdv, FXU, DFU, LSU, GroupAlone2], 615 (instregex "CVB(Y)?$")>; 616def : InstRW<[WLat1, FXU3, DFU4, LSU, GroupAlone3], (instregex "CVDG$")>; 617def : InstRW<[WLat1, FXU2, DFU, LSU, GroupAlone3], (instregex "CVD(Y)?$")>; 618def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "MV(N|O|Z)$")>; 619def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "(PACK|PKA|PKU)$")>; 620def : InstRW<[WLat10, LSU5, GroupAlone], (instregex "UNPK(A|U)$")>; 621def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "UNPK$")>; 622 623def : InstRW<[WLat11LSU, FXU, DFU4, LSU2, GroupAlone], 624 (instregex "(A|S|ZA)P$")>; 625def : InstRW<[WLat1, FXU, DFU4, LSU2, GroupAlone], (instregex "(M|D)P$")>; 626def : InstRW<[WLat15, FXU2, DFU4, LSU3, GroupAlone], (instregex "SRP$")>; 627def : InstRW<[WLat11, DFU4, LSU2, GroupAlone], (instregex "CP$")>; 628def : InstRW<[WLat5LSU, DFU2, LSU2, GroupAlone], (instregex "TP$")>; 629def : InstRW<[WLat30, MCD], (instregex "ED(MK)?$")>; 630 631//===----------------------------------------------------------------------===// 632// Access registers 633//===----------------------------------------------------------------------===// 634 635// Extract/set/copy access register 636def : InstRW<[WLat3, LSU, NormalGr], (instregex "(EAR|SAR|CPYA)$")>; 637 638// Load address extended 639def : InstRW<[WLat5, LSU, FXU, GroupAlone], (instregex "LAE(Y)?$")>; 640 641// Load/store access multiple (not modeled precisely) 642def : InstRW<[WLat10, WLat10, LSU5, GroupAlone], (instregex "LAM(Y)?$")>; 643def : InstRW<[WLat1, FXU5, LSU5, GroupAlone], (instregex "STAM(Y)?$")>; 644 645//===----------------------------------------------------------------------===// 646// Program mask and addressing mode 647//===----------------------------------------------------------------------===// 648 649// Insert Program Mask 650def : InstRW<[WLat3, FXU, EndGroup], (instregex "IPM$")>; 651 652// Set Program Mask 653def : InstRW<[WLat3, LSU, EndGroup], (instregex "SPM$")>; 654 655// Branch and link 656def : InstRW<[WLat1, FXU2, LSU, GroupAlone], (instregex "BAL(R)?$")>; 657 658// Test addressing mode 659def : InstRW<[WLat1, FXU, NormalGr], (instregex "TAM$")>; 660 661// Set addressing mode 662def : InstRW<[WLat1, LSU, EndGroup], (instregex "SAM(24|31|64)$")>; 663 664// Branch (and save) and set mode. 665def : InstRW<[WLat1, FXU, LSU, GroupAlone], (instregex "BSM$")>; 666def : InstRW<[WLat1, FXU2, LSU, GroupAlone], (instregex "BASSM$")>; 667 668//===----------------------------------------------------------------------===// 669// Miscellaneous Instructions. 670//===----------------------------------------------------------------------===// 671 672// Find leftmost one 673def : InstRW<[WLat7, WLat7, FXU2, GroupAlone], (instregex "FLOGR$")>; 674 675// Population count 676def : InstRW<[WLat3, WLat3, FXU, NormalGr], (instregex "POPCNT$")>; 677 678// String instructions 679def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "SRST(U)?$")>; 680def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CUSE$")>; 681 682// Various complex instructions 683def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CFC$")>; 684def : InstRW<[WLat30, WLat30, WLat30, WLat30, WLat30, WLat30, MCD], 685 (instregex "UPT$")>; 686def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CKSM$")>; 687def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CMPSC$")>; 688 689// Execute 690def : InstRW<[LSU, GroupAlone], (instregex "EX(RL)?$")>; 691 692//===----------------------------------------------------------------------===// 693// .insn directive instructions 694//===----------------------------------------------------------------------===// 695 696// An "empty" sched-class will be assigned instead of the "invalid sched-class". 697// getNumDecoderSlots() will then return 1 instead of 0. 698def : InstRW<[], (instregex "Insn.*")>; 699 700 701// ----------------------------- Floating point ----------------------------- // 702 703//===----------------------------------------------------------------------===// 704// FP: Move instructions 705//===----------------------------------------------------------------------===// 706 707// Load zero 708def : InstRW<[WLat1, FXU, NormalGr], (instregex "LZ(DR|ER)$")>; 709def : InstRW<[WLat2, FXU2, GroupAlone2], (instregex "LZXR$")>; 710 711// Load 712def : InstRW<[WLat1, FXU, NormalGr], (instregex "LER$")>; 713def : InstRW<[WLat1, FXU, NormalGr], (instregex "LD(R|R32|GR)$")>; 714def : InstRW<[WLat3, FXU, NormalGr], (instregex "LGDR$")>; 715def : InstRW<[WLat2, FXU2, GroupAlone2], (instregex "LXR$")>; 716 717// Load and Test 718def : InstRW<[WLat9, WLat9, FPU, NormalGr], (instregex "LT(E|D)BR$")>; 719def : InstRW<[WLat9, FPU, NormalGr], (instregex "LT(E|D)BRCompare$")>; 720def : InstRW<[WLat10, WLat10, FPU4, GroupAlone], (instregex "LTXBR(Compare)?$")>; 721 722// Copy sign 723def : InstRW<[WLat5, FXU2, GroupAlone], (instregex "CPSDR(d|s)(d|s)$")>; 724 725//===----------------------------------------------------------------------===// 726// FP: Load instructions 727//===----------------------------------------------------------------------===// 728 729def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L(E|D)(Y|E32)?$")>; 730def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LX$")>; 731 732//===----------------------------------------------------------------------===// 733// FP: Store instructions 734//===----------------------------------------------------------------------===// 735 736def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "ST(E|D)(Y)?$")>; 737def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STX$")>; 738 739//===----------------------------------------------------------------------===// 740// FP: Conversion instructions 741//===----------------------------------------------------------------------===// 742 743// Load rounded 744def : InstRW<[WLat7, FPU, NormalGr], (instregex "LEDBR(A)?$")>; 745def : InstRW<[WLat9, FPU2, NormalGr], (instregex "L(E|D)XBR(A)?$")>; 746 747// Load lengthened 748def : InstRW<[WLat7LSU, FPU, LSU, NormalGr], (instregex "LDEB$")>; 749def : InstRW<[WLat7, FPU, NormalGr], (instregex "LDEBR$")>; 750def : InstRW<[WLat11LSU, FPU4, LSU, GroupAlone], (instregex "LX(E|D)B$")>; 751def : InstRW<[WLat10, FPU4, GroupAlone], (instregex "LX(E|D)BR$")>; 752 753// Convert from fixed / logical 754def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "C(E|D)(F|G)BR(A)?$")>; 755def : InstRW<[WLat11, FXU, FPU4, GroupAlone2], (instregex "CX(F|G)BR(A?)$")>; 756def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CEL(F|G)BR$")>; 757def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CDL(F|G)BR$")>; 758def : InstRW<[WLat11, FXU, FPU4, GroupAlone2], (instregex "CXL(F|G)BR$")>; 759 760// Convert to fixed / logical 761def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone], 762 (instregex "C(F|G)(E|D)BR(A?)$")>; 763def : InstRW<[WLat12, WLat12, FXU, FPU2, GroupAlone], 764 (instregex "C(F|G)XBR(A?)$")>; 765def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone], 766 (instregex "CL(F|G)(E|D)BR$")>; 767def : InstRW<[WLat12, WLat12, FXU, FPU2, GroupAlone], (instregex "CL(F|G)XBR$")>; 768 769//===----------------------------------------------------------------------===// 770// FP: Unary arithmetic 771//===----------------------------------------------------------------------===// 772 773// Load Complement / Negative / Positive 774def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "L(C|N|P)(E|D)BR$")>; 775def : InstRW<[WLat1, FXU, NormalGr], (instregex "L(C|N|P)DFR(_32)?$")>; 776def : InstRW<[WLat10, WLat10, FPU4, GroupAlone], (instregex "L(C|N|P)XBR$")>; 777 778// Square root 779def : InstRW<[WLat30, FPU, LSU, NormalGr], (instregex "SQ(E|D)B$")>; 780def : InstRW<[WLat30, FPU, NormalGr], (instregex "SQ(E|D)BR$")>; 781def : InstRW<[WLat30, FPU4, GroupAlone], (instregex "SQXBR$")>; 782 783// Load FP integer 784def : InstRW<[WLat7, FPU, NormalGr], (instregex "FI(E|D)BR(A)?$")>; 785def : InstRW<[WLat15, FPU4, GroupAlone], (instregex "FIXBR(A)?$")>; 786 787//===----------------------------------------------------------------------===// 788// FP: Binary arithmetic 789//===----------------------------------------------------------------------===// 790 791// Addition 792def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, FPU, LSU, NormalGr], 793 (instregex "A(E|D)B$")>; 794def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "A(E|D)BR$")>; 795def : InstRW<[WLat20, WLat20, FPU4, GroupAlone], (instregex "AXBR$")>; 796 797// Subtraction 798def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, FPU, LSU, NormalGr], 799 (instregex "S(E|D)B$")>; 800def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "S(E|D)BR$")>; 801def : InstRW<[WLat20, WLat20, FPU4, GroupAlone], (instregex "SXBR$")>; 802 803// Multiply 804def : InstRW<[WLat7LSU, RegReadAdv, FPU, LSU, NormalGr], 805 (instregex "M(D|DE|EE)B$")>; 806def : InstRW<[WLat7, FPU, NormalGr], (instregex "M(D|DE|EE)BR$")>; 807def : InstRW<[WLat11LSU, RegReadAdv, FPU4, LSU, GroupAlone], 808 (instregex "MXDB$")>; 809def : InstRW<[WLat10, FPU4, GroupAlone], (instregex "MXDBR$")>; 810def : InstRW<[WLat30, FPU4, GroupAlone], (instregex "MXBR$")>; 811 812// Multiply and add / subtract 813def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, FPU2, LSU, GroupAlone], 814 (instregex "M(A|S)EB$")>; 815def : InstRW<[WLat7, FPU, GroupAlone], (instregex "M(A|S)EBR$")>; 816def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, FPU2, LSU, GroupAlone], 817 (instregex "M(A|S)DB$")>; 818def : InstRW<[WLat7, FPU, GroupAlone], (instregex "M(A|S)DBR$")>; 819 820// Division 821def : InstRW<[WLat30, RegReadAdv, FPU, LSU, NormalGr], (instregex "D(E|D)B$")>; 822def : InstRW<[WLat30, FPU, NormalGr], (instregex "D(E|D)BR$")>; 823def : InstRW<[WLat30, FPU4, GroupAlone], (instregex "DXBR$")>; 824 825// Divide to integer 826def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "DI(E|D)BR$")>; 827 828//===----------------------------------------------------------------------===// 829// FP: Comparisons 830//===----------------------------------------------------------------------===// 831 832// Compare 833def : InstRW<[WLat11LSU, RegReadAdv, FPU, LSU, NormalGr], 834 (instregex "(K|C)(E|D)B$")>; 835def : InstRW<[WLat9, FPU, NormalGr], (instregex "(K|C)(E|D)BR$")>; 836def : InstRW<[WLat30, FPU2, NormalGr], (instregex "(K|C)XBR$")>; 837 838// Test Data Class 839def : InstRW<[WLat15, FPU, LSU, NormalGr], (instregex "TC(E|D)B$")>; 840def : InstRW<[WLat15, FPU4, LSU, GroupAlone], (instregex "TCXB$")>; 841 842//===----------------------------------------------------------------------===// 843// FP: Floating-point control register instructions 844//===----------------------------------------------------------------------===// 845 846def : InstRW<[WLat4, FXU, LSU, GroupAlone], (instregex "EFPC$")>; 847def : InstRW<[WLat1, FXU, LSU, GroupAlone], (instregex "STFPC$")>; 848def : InstRW<[WLat1, LSU, GroupAlone], (instregex "SFPC$")>; 849def : InstRW<[WLat1, LSU2, GroupAlone], (instregex "LFPC$")>; 850def : InstRW<[WLat30, MCD], (instregex "SFASR$")>; 851def : InstRW<[WLat30, MCD], (instregex "LFAS$")>; 852def : InstRW<[WLat2, FXU, GroupAlone], (instregex "SRNM(B|T)?$")>; 853 854 855// --------------------- Hexadecimal floating point ------------------------- // 856 857//===----------------------------------------------------------------------===// 858// HFP: Move instructions 859//===----------------------------------------------------------------------===// 860 861// Load and Test 862def : InstRW<[WLat9, WLat9, FPU, NormalGr], (instregex "LT(E|D)R$")>; 863def : InstRW<[WLat9, WLat9, FPU4, GroupAlone], (instregex "LTXR$")>; 864 865//===----------------------------------------------------------------------===// 866// HFP: Conversion instructions 867//===----------------------------------------------------------------------===// 868 869// Load rounded 870def : InstRW<[WLat7, FPU, NormalGr], (instregex "(LEDR|LRER)$")>; 871def : InstRW<[WLat7, FPU, NormalGr], (instregex "LEXR$")>; 872def : InstRW<[WLat9, FPU, NormalGr], (instregex "(LDXR|LRDR)$")>; 873 874// Load lengthened 875def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LDE$")>; 876def : InstRW<[WLat1, FXU, NormalGr], (instregex "LDER$")>; 877def : InstRW<[WLat11LSU, FPU4, LSU, GroupAlone], (instregex "LX(E|D)$")>; 878def : InstRW<[WLat9, FPU4, GroupAlone], (instregex "LX(E|D)R$")>; 879 880// Convert from fixed 881def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "C(E|D)(F|G)R$")>; 882def : InstRW<[WLat10, FXU, FPU4, GroupAlone2], (instregex "CX(F|G)R$")>; 883 884// Convert to fixed 885def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone], 886 (instregex "C(F|G)(E|D)R$")>; 887def : InstRW<[WLat30, WLat30, FXU, FPU2, GroupAlone], (instregex "C(F|G)XR$")>; 888 889// Convert BFP to HFP / HFP to BFP. 890def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "THD(E)?R$")>; 891def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "TB(E)?DR$")>; 892 893//===----------------------------------------------------------------------===// 894// HFP: Unary arithmetic 895//===----------------------------------------------------------------------===// 896 897// Load Complement / Negative / Positive 898def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "L(C|N|P)(E|D)R$")>; 899def : InstRW<[WLat9, WLat9, FPU4, GroupAlone], (instregex "L(C|N|P)XR$")>; 900 901// Halve 902def : InstRW<[WLat7, FPU, NormalGr], (instregex "H(E|D)R$")>; 903 904// Square root 905def : InstRW<[WLat30, FPU, LSU, NormalGr], (instregex "SQ(E|D)$")>; 906def : InstRW<[WLat30, FPU, NormalGr], (instregex "SQ(E|D)R$")>; 907def : InstRW<[WLat30, FPU4, GroupAlone], (instregex "SQXR$")>; 908 909// Load FP integer 910def : InstRW<[WLat7, FPU, NormalGr], (instregex "FI(E|D)R$")>; 911def : InstRW<[WLat15, FPU4, GroupAlone], (instregex "FIXR$")>; 912 913//===----------------------------------------------------------------------===// 914// HFP: Binary arithmetic 915//===----------------------------------------------------------------------===// 916 917// Addition 918def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, FPU, LSU, NormalGr], 919 (instregex "A(E|D|U|W)$")>; 920def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "A(E|D|U|W)R$")>; 921def : InstRW<[WLat15, WLat15, FPU4, GroupAlone], (instregex "AXR$")>; 922 923// Subtraction 924def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, FPU, LSU, NormalGr], 925 (instregex "S(E|D|U|W)$")>; 926def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "S(E|D|U|W)R$")>; 927def : InstRW<[WLat15, WLat15, FPU4, GroupAlone], (instregex "SXR$")>; 928 929// Multiply 930def : InstRW<[WLat7LSU, RegReadAdv, FPU, LSU, NormalGr], (instregex "M(D|EE)$")>; 931def : InstRW<[WLat8LSU, RegReadAdv, FPU, LSU, NormalGr], (instregex "M(DE|E)$")>; 932def : InstRW<[WLat7, FPU, NormalGr], (instregex "M(D|EE)R$")>; 933def : InstRW<[WLat8, FPU, NormalGr], (instregex "M(DE|E)R$")>; 934def : InstRW<[WLat11LSU, RegReadAdv, FPU4, LSU, GroupAlone], (instregex "MXD$")>; 935def : InstRW<[WLat10, FPU4, GroupAlone], (instregex "MXDR$")>; 936def : InstRW<[WLat30, FPU4, GroupAlone], (instregex "MXR$")>; 937def : InstRW<[WLat11LSU, RegReadAdv, FPU4, LSU, GroupAlone], (instregex "MY$")>; 938def : InstRW<[WLat7LSU, RegReadAdv, FPU2, LSU, GroupAlone], 939 (instregex "MY(H|L)$")>; 940def : InstRW<[WLat10, FPU4, GroupAlone], (instregex "MYR$")>; 941def : InstRW<[WLat7, FPU, GroupAlone], (instregex "MY(H|L)R$")>; 942 943// Multiply and add / subtract 944def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, FPU2, LSU, GroupAlone], 945 (instregex "M(A|S)(E|D)$")>; 946def : InstRW<[WLat7, FPU, GroupAlone], (instregex "M(A|S)(E|D)R$")>; 947def : InstRW<[WLat11LSU, RegReadAdv, RegReadAdv, FPU4, LSU, GroupAlone], 948 (instregex "MAY$")>; 949def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, FPU2, LSU, GroupAlone], 950 (instregex "MAY(H|L)$")>; 951def : InstRW<[WLat10, FPU4, GroupAlone], (instregex "MAYR$")>; 952def : InstRW<[WLat7, FPU, GroupAlone], (instregex "MAY(H|L)R$")>; 953 954// Division 955def : InstRW<[WLat30, RegReadAdv, FPU, LSU, NormalGr], (instregex "D(E|D)$")>; 956def : InstRW<[WLat30, FPU, NormalGr], (instregex "D(E|D)R$")>; 957def : InstRW<[WLat30, FPU4, GroupAlone], (instregex "DXR$")>; 958 959//===----------------------------------------------------------------------===// 960// HFP: Comparisons 961//===----------------------------------------------------------------------===// 962 963// Compare 964def : InstRW<[WLat11LSU, RegReadAdv, FPU, LSU, NormalGr], (instregex "C(E|D)$")>; 965def : InstRW<[WLat9, FPU, NormalGr], (instregex "C(E|D)R$")>; 966def : InstRW<[WLat15, FPU2, NormalGr], (instregex "CXR$")>; 967 968 969// ------------------------ Decimal floating point -------------------------- // 970 971//===----------------------------------------------------------------------===// 972// DFP: Move instructions 973//===----------------------------------------------------------------------===// 974 975// Load and Test 976def : InstRW<[WLat4, WLat4, DFU, NormalGr], (instregex "LTDTR$")>; 977def : InstRW<[WLat6, WLat6, DFU4, GroupAlone], (instregex "LTXTR$")>; 978 979//===----------------------------------------------------------------------===// 980// DFP: Conversion instructions 981//===----------------------------------------------------------------------===// 982 983// Load rounded 984def : InstRW<[WLat30, DFU, NormalGr], (instregex "LEDTR$")>; 985def : InstRW<[WLat30, DFU2, NormalGr], (instregex "LDXTR$")>; 986 987// Load lengthened 988def : InstRW<[WLat7, DFU, NormalGr], (instregex "LDETR$")>; 989def : InstRW<[WLat6, DFU4, GroupAlone], (instregex "LXDTR$")>; 990 991// Convert from fixed / logical 992def : InstRW<[WLat9, FXU, DFU, GroupAlone], (instregex "CDFTR$")>; 993def : InstRW<[WLat30, FXU, DFU, GroupAlone], (instregex "CDGTR(A)?$")>; 994def : InstRW<[WLat5, FXU, DFU4, GroupAlone2], (instregex "CXFTR(A)?$")>; 995def : InstRW<[WLat30, FXU, DFU4, GroupAlone2], (instregex "CXGTR(A)?$")>; 996def : InstRW<[WLat9, FXU, DFU, GroupAlone], (instregex "CDL(F|G)TR$")>; 997def : InstRW<[WLat9, FXU, DFU4, GroupAlone2], (instregex "CXLFTR$")>; 998def : InstRW<[WLat5, FXU, DFU4, GroupAlone2], (instregex "CXLGTR$")>; 999 1000// Convert to fixed / logical 1001def : InstRW<[WLat11, WLat11, FXU, DFU, GroupAlone], (instregex "CFDTR(A)?$")>; 1002def : InstRW<[WLat30, WLat30, FXU, DFU, GroupAlone], (instregex "CGDTR(A)?$")>; 1003def : InstRW<[WLat7, WLat7, FXU, DFU2, GroupAlone], (instregex "CFXTR$")>; 1004def : InstRW<[WLat30, WLat30, FXU, DFU2, GroupAlone], (instregex "CGXTR(A)?$")>; 1005def : InstRW<[WLat11, WLat11, FXU, DFU, GroupAlone], (instregex "CL(F|G)DTR$")>; 1006def : InstRW<[WLat7, WLat7, FXU, DFU2, GroupAlone], (instregex "CL(F|G)XTR$")>; 1007 1008// Convert from / to signed / unsigned packed 1009def : InstRW<[WLat5, FXU, DFU, GroupAlone], (instregex "CD(S|U)TR$")>; 1010def : InstRW<[WLat8, FXU2, DFU4, GroupAlone2], (instregex "CX(S|U)TR$")>; 1011def : InstRW<[WLat7, FXU, DFU, GroupAlone], (instregex "C(S|U)DTR$")>; 1012def : InstRW<[WLat12, FXU2, DFU4, GroupAlone2], (instregex "C(S|U)XTR$")>; 1013 1014// Perform floating-point operation 1015def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "PFPO$")>; 1016 1017//===----------------------------------------------------------------------===// 1018// DFP: Unary arithmetic 1019//===----------------------------------------------------------------------===// 1020 1021// Load FP integer 1022def : InstRW<[WLat8, DFU, NormalGr], (instregex "FIDTR$")>; 1023def : InstRW<[WLat10, DFU4, GroupAlone], (instregex "FIXTR$")>; 1024 1025// Extract biased exponent 1026def : InstRW<[WLat7, FXU, DFU, GroupAlone], (instregex "EEDTR$")>; 1027def : InstRW<[WLat8, FXU, DFU2, GroupAlone], (instregex "EEXTR$")>; 1028 1029// Extract significance 1030def : InstRW<[WLat7, FXU, DFU, GroupAlone], (instregex "ESDTR$")>; 1031def : InstRW<[WLat8, FXU, DFU2, GroupAlone], (instregex "ESXTR$")>; 1032 1033//===----------------------------------------------------------------------===// 1034// DFP: Binary arithmetic 1035//===----------------------------------------------------------------------===// 1036 1037// Addition 1038def : InstRW<[WLat9, WLat9, DFU, NormalGr], (instregex "ADTR(A)?$")>; 1039def : InstRW<[WLat30, WLat30, DFU4, GroupAlone], (instregex "AXTR(A)?$")>; 1040 1041// Subtraction 1042def : InstRW<[WLat9, WLat9, DFU, NormalGr], (instregex "SDTR(A)?$")>; 1043def : InstRW<[WLat30, WLat30, DFU4, GroupAlone], (instregex "SXTR(A)?$")>; 1044 1045// Multiply 1046def : InstRW<[WLat30, DFU, NormalGr], (instregex "MDTR(A)?$")>; 1047def : InstRW<[WLat30, DFU4, GroupAlone], (instregex "MXTR(A)?$")>; 1048 1049// Division 1050def : InstRW<[WLat30, DFU, NormalGr], (instregex "DDTR(A)?$")>; 1051def : InstRW<[WLat30, DFU4, GroupAlone], (instregex "DXTR(A)?$")>; 1052 1053// Quantize 1054def : InstRW<[WLat8, WLat8, DFU, NormalGr], (instregex "QADTR$")>; 1055def : InstRW<[WLat10, WLat10, DFU4, GroupAlone], (instregex "QAXTR$")>; 1056 1057// Reround 1058def : InstRW<[WLat11, WLat11, FXU, DFU, GroupAlone], (instregex "RRDTR$")>; 1059def : InstRW<[WLat30, WLat30, FXU, DFU4, GroupAlone2], (instregex "RRXTR$")>; 1060 1061// Shift significand left/right 1062def : InstRW<[WLat7LSU, LSU, DFU, GroupAlone], (instregex "S(L|R)DT$")>; 1063def : InstRW<[WLat11LSU, LSU, DFU4, GroupAlone], (instregex "S(L|R)XT$")>; 1064 1065// Insert biased exponent 1066def : InstRW<[WLat5, FXU, DFU, GroupAlone], (instregex "IEDTR$")>; 1067def : InstRW<[WLat7, FXU, DFU4, GroupAlone2], (instregex "IEXTR$")>; 1068 1069//===----------------------------------------------------------------------===// 1070// DFP: Comparisons 1071//===----------------------------------------------------------------------===// 1072 1073// Compare 1074def : InstRW<[WLat9, DFU, NormalGr], (instregex "(K|C)DTR$")>; 1075def : InstRW<[WLat10, DFU2, NormalGr], (instregex "(K|C)XTR$")>; 1076 1077// Compare biased exponent 1078def : InstRW<[WLat4, DFU, NormalGr], (instregex "CEDTR$")>; 1079def : InstRW<[WLat5, DFU2, NormalGr], (instregex "CEXTR$")>; 1080 1081// Test Data Class/Group 1082def : InstRW<[WLat9, LSU, DFU, NormalGr], (instregex "TD(C|G)DT$")>; 1083def : InstRW<[WLat10, LSU, DFU, NormalGr], (instregex "TD(C|G)ET$")>; 1084def : InstRW<[WLat10, LSU, DFU2, NormalGr], (instregex "TD(C|G)XT$")>; 1085 1086 1087// -------------------------------- System ---------------------------------- // 1088 1089//===----------------------------------------------------------------------===// 1090// System: Program-Status Word Instructions 1091//===----------------------------------------------------------------------===// 1092 1093def : InstRW<[WLat30, WLat30, MCD], (instregex "EPSW$")>; 1094def : InstRW<[WLat30, MCD], (instregex "LPSW(E)?$")>; 1095def : InstRW<[WLat3, FXU, GroupAlone], (instregex "IPK$")>; 1096def : InstRW<[WLat1, LSU, EndGroup], (instregex "SPKA$")>; 1097def : InstRW<[WLat1, LSU, EndGroup], (instregex "SSM$")>; 1098def : InstRW<[WLat1, FXU, LSU, GroupAlone], (instregex "ST(N|O)SM$")>; 1099def : InstRW<[WLat3, FXU, NormalGr], (instregex "IAC$")>; 1100def : InstRW<[WLat1, LSU, EndGroup], (instregex "SAC(F)?$")>; 1101 1102//===----------------------------------------------------------------------===// 1103// System: Control Register Instructions 1104//===----------------------------------------------------------------------===// 1105 1106def : InstRW<[WLat10, WLat10, LSU2, GroupAlone], (instregex "LCTL(G)?$")>; 1107def : InstRW<[WLat1, FXU5, LSU5, GroupAlone], (instregex "STCT(L|G)$")>; 1108def : InstRW<[LSULatency, LSU, NormalGr], (instregex "E(P|S)A(I)?R$")>; 1109def : InstRW<[WLat30, MCD], (instregex "SSA(I)?R$")>; 1110def : InstRW<[WLat30, MCD], (instregex "ESEA$")>; 1111 1112//===----------------------------------------------------------------------===// 1113// System: Prefix-Register Instructions 1114//===----------------------------------------------------------------------===// 1115 1116def : InstRW<[WLat30, MCD], (instregex "S(T)?PX$")>; 1117 1118//===----------------------------------------------------------------------===// 1119// System: Storage-Key and Real Memory Instructions 1120//===----------------------------------------------------------------------===// 1121 1122def : InstRW<[WLat30, MCD], (instregex "ISKE$")>; 1123def : InstRW<[WLat30, MCD], (instregex "IVSK$")>; 1124def : InstRW<[WLat30, MCD], (instregex "SSKE(Opt)?$")>; 1125def : InstRW<[WLat30, MCD], (instregex "RRB(E|M)$")>; 1126def : InstRW<[WLat30, MCD], (instregex "PFMF$")>; 1127def : InstRW<[WLat30, WLat30, MCD], (instregex "TB$")>; 1128def : InstRW<[WLat30, MCD], (instregex "PGIN$")>; 1129def : InstRW<[WLat30, MCD], (instregex "PGOUT$")>; 1130 1131//===----------------------------------------------------------------------===// 1132// System: Dynamic-Address-Translation Instructions 1133//===----------------------------------------------------------------------===// 1134 1135def : InstRW<[WLat30, MCD], (instregex "IPTE(Opt)?(Opt)?$")>; 1136def : InstRW<[WLat30, MCD], (instregex "IDTE(Opt)?$")>; 1137def : InstRW<[WLat30, MCD], (instregex "PTLB$")>; 1138def : InstRW<[WLat30, WLat30, MCD], (instregex "CSP(G)?$")>; 1139def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "LPTEA$")>; 1140def : InstRW<[WLat30, WLat30, MCD], (instregex "LRA(Y|G)?$")>; 1141def : InstRW<[WLat30, MCD], (instregex "STRAG$")>; 1142def : InstRW<[WLat30, MCD], (instregex "LURA(G)?$")>; 1143def : InstRW<[WLat30, MCD], (instregex "STUR(A|G)$")>; 1144def : InstRW<[WLat30, MCD], (instregex "TPROT$")>; 1145 1146//===----------------------------------------------------------------------===// 1147// System: Memory-move Instructions 1148//===----------------------------------------------------------------------===// 1149 1150def : InstRW<[WLat30, MCD], (instregex "MVC(K|P|S)$")>; 1151def : InstRW<[WLat30, MCD], (instregex "MVC(S|D)K$")>; 1152def : InstRW<[WLat30, MCD], (instregex "MVCOS$")>; 1153def : InstRW<[WLat30, MCD], (instregex "MVPG$")>; 1154 1155//===----------------------------------------------------------------------===// 1156// System: Address-Space Instructions 1157//===----------------------------------------------------------------------===// 1158 1159def : InstRW<[WLat30, MCD], (instregex "LASP$")>; 1160def : InstRW<[WLat1, LSU, GroupAlone], (instregex "PALB$")>; 1161def : InstRW<[WLat30, MCD], (instregex "PC$")>; 1162def : InstRW<[WLat30, MCD], (instregex "PR$")>; 1163def : InstRW<[WLat30, MCD], (instregex "PT(I)?$")>; 1164def : InstRW<[WLat30, MCD], (instregex "RP$")>; 1165def : InstRW<[WLat30, MCD], (instregex "BS(G|A)$")>; 1166def : InstRW<[WLat30, MCD], (instregex "TAR$")>; 1167 1168//===----------------------------------------------------------------------===// 1169// System: Linkage-Stack Instructions 1170//===----------------------------------------------------------------------===// 1171 1172def : InstRW<[WLat30, MCD], (instregex "BAKR$")>; 1173def : InstRW<[WLat30, MCD], (instregex "EREG(G)?$")>; 1174def : InstRW<[WLat30, WLat30, MCD], (instregex "(E|M)STA$")>; 1175 1176//===----------------------------------------------------------------------===// 1177// System: Time-Related Instructions 1178//===----------------------------------------------------------------------===// 1179 1180def : InstRW<[WLat30, MCD], (instregex "PTFF$")>; 1181def : InstRW<[WLat30, MCD], (instregex "SCK$")>; 1182def : InstRW<[WLat30, MCD], (instregex "SCKPF$")>; 1183def : InstRW<[WLat30, MCD], (instregex "SCKC$")>; 1184def : InstRW<[WLat30, MCD], (instregex "SPT$")>; 1185def : InstRW<[WLat30, MCD], (instregex "STCK(F)?$")>; 1186def : InstRW<[WLat30, MCD], (instregex "STCKE$")>; 1187def : InstRW<[WLat30, MCD], (instregex "STCKC$")>; 1188def : InstRW<[WLat30, MCD], (instregex "STPT$")>; 1189 1190//===----------------------------------------------------------------------===// 1191// System: CPU-Related Instructions 1192//===----------------------------------------------------------------------===// 1193 1194def : InstRW<[WLat30, MCD], (instregex "STAP$")>; 1195def : InstRW<[WLat30, MCD], (instregex "STIDP$")>; 1196def : InstRW<[WLat30, WLat30, MCD], (instregex "STSI$")>; 1197def : InstRW<[WLat30, WLat30, MCD], (instregex "STFL(E)?$")>; 1198def : InstRW<[WLat30, MCD], (instregex "ECAG$")>; 1199def : InstRW<[WLat30, WLat30, MCD], (instregex "ECTG$")>; 1200def : InstRW<[WLat30, MCD], (instregex "PTF$")>; 1201def : InstRW<[WLat30, MCD], (instregex "PCKMO$")>; 1202 1203//===----------------------------------------------------------------------===// 1204// System: Miscellaneous Instructions 1205//===----------------------------------------------------------------------===// 1206 1207def : InstRW<[WLat30, MCD], (instregex "SVC$")>; 1208def : InstRW<[WLat1, FXU, GroupAlone], (instregex "MC$")>; 1209def : InstRW<[WLat30, MCD], (instregex "DIAG$")>; 1210def : InstRW<[WLat30, MCD], (instregex "TRAC(E|G)$")>; 1211def : InstRW<[WLat30, MCD], (instregex "TRAP(2|4)$")>; 1212def : InstRW<[WLat30, MCD], (instregex "SIG(P|A)$")>; 1213def : InstRW<[WLat30, MCD], (instregex "SIE$")>; 1214 1215//===----------------------------------------------------------------------===// 1216// System: CPU-Measurement Facility Instructions 1217//===----------------------------------------------------------------------===// 1218 1219def : InstRW<[WLat1, FXU, NormalGr], (instregex "LPP$")>; 1220def : InstRW<[WLat30, WLat30, MCD], (instregex "ECPGA$")>; 1221def : InstRW<[WLat30, WLat30, MCD], (instregex "E(C|P)CTR$")>; 1222def : InstRW<[WLat30, MCD], (instregex "LCCTL$")>; 1223def : InstRW<[WLat30, MCD], (instregex "L(P|S)CTL$")>; 1224def : InstRW<[WLat30, MCD], (instregex "Q(S|CTR)I$")>; 1225def : InstRW<[WLat30, MCD], (instregex "S(C|P)CTR$")>; 1226 1227//===----------------------------------------------------------------------===// 1228// System: I/O Instructions 1229//===----------------------------------------------------------------------===// 1230 1231def : InstRW<[WLat30, MCD], (instregex "(C|H|R|X)SCH$")>; 1232def : InstRW<[WLat30, MCD], (instregex "(M|S|ST|T)SCH$")>; 1233def : InstRW<[WLat30, MCD], (instregex "RCHP$")>; 1234def : InstRW<[WLat30, MCD], (instregex "SCHM$")>; 1235def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>; 1236def : InstRW<[WLat30, MCD], (instregex "TPI$")>; 1237def : InstRW<[WLat30, MCD], (instregex "SAL$")>; 1238 1239} 1240 1241