1 //===-- VEISelLowering.h - VE DAG Lowering Interface ------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines the interfaces that VE uses to lower LLVM code into a
10 // selection DAG.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_VE_VEISELLOWERING_H
15 #define LLVM_LIB_TARGET_VE_VEISELLOWERING_H
16 
17 #include "VE.h"
18 #include "llvm/CodeGen/TargetLowering.h"
19 
20 namespace llvm {
21 class VESubtarget;
22 
23 namespace VEISD {
24 enum NodeType : unsigned {
25   FIRST_NUMBER = ISD::BUILTIN_OP_END,
26   RET_FLAG, // Return with a flag operand.
27 };
28 }
29 
30 class VETargetLowering : public TargetLowering {
31   const VESubtarget *Subtarget;
32 
33 public:
34   VETargetLowering(const TargetMachine &TM, const VESubtarget &STI);
35 
36   const char *getTargetNodeName(unsigned Opcode) const override;
37 
38   Register getRegisterByName(const char *RegName, LLT VT,
39                              const MachineFunction &MF) const override;
40 
41   /// getSetCCResultType - Return the ISD::SETCC ValueType
42   EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
43                          EVT VT) const override;
44 
45   SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
46                                bool isVarArg,
47                                const SmallVectorImpl<ISD::InputArg> &Ins,
48                                const SDLoc &dl, SelectionDAG &DAG,
49                                SmallVectorImpl<SDValue> &InVals) const override;
50 
51   bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
52                       bool isVarArg,
53                       const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
54                       LLVMContext &Context) const override;
55   SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
56                       const SmallVectorImpl<ISD::OutputArg> &Outs,
57                       const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
58                       SelectionDAG &DAG) const override;
59 };
60 } // namespace llvm
61 
62 #endif // VE_ISELLOWERING_H
63