1//===-- VEInstrPatternsVec.td - VEC_-type SDNodes and isel for VE Target --===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file describes the VEC_* prefixed intermediate SDNodes and their
10// isel patterns.
11//
12//===----------------------------------------------------------------------===//
13
14//===----------------------------------------------------------------------===//
15// Instruction format superclass
16//===----------------------------------------------------------------------===//
17
18multiclass vbrd_elem32<ValueType v32, ValueType s32, SDPatternOperator ImmOp,
19                       SDNodeXForm ImmCast, OutPatFrag SuperRegCast> {
20  // VBRDil
21  def : Pat<(v32 (vec_broadcast (s32 ImmOp:$sy), i32:$vl)),
22            (VBRDil (ImmCast $sy), i32:$vl)>;
23
24  // VBRDrl
25  def : Pat<(v32 (vec_broadcast s32:$sy, i32:$vl)),
26            (VBRDrl (SuperRegCast $sy), i32:$vl)>;
27}
28
29multiclass vbrd_elem64<ValueType v64, ValueType s64,
30                       SDPatternOperator ImmOp, SDNodeXForm ImmCast> {
31  // VBRDil
32  def : Pat<(v64 (vec_broadcast (s64 ImmOp:$sy), i32:$vl)),
33            (VBRDil (ImmCast $sy), i32:$vl)>;
34
35  // VBRDrl
36  def : Pat<(v64 (vec_broadcast s64:$sy, i32:$vl)),
37            (VBRDrl s64:$sy, i32:$vl)>;
38}
39
40multiclass extract_insert_elem32<ValueType v32, ValueType s32,
41                                 OutPatFrag SubRegCast,
42                                 OutPatFrag SuperRegCast> {
43  // LVSvi
44  def: Pat<(s32 (extractelt v32:$vec, uimm7:$idx)),
45           (SubRegCast (LVSvi v32:$vec, (ULO7 $idx)))>;
46  // LVSvr
47  def: Pat<(s32 (extractelt v32:$vec, i64:$idx)),
48           (SubRegCast (LVSvr v32:$vec, $idx))>;
49
50  // LSVir
51  def: Pat<(v32 (insertelt v32:$vec, s32:$val, uimm7:$idx)),
52           (LSVir_v (ULO7 $idx), (SuperRegCast $val), $vec)>;
53  // LSVrr
54  def: Pat<(v32 (insertelt v32:$vec, s32:$val, i64:$idx)),
55           (LSVrr_v $idx, (SuperRegCast $val), $vec)>;
56}
57
58multiclass extract_insert_elem64<ValueType v64, ValueType s64> {
59  // LVSvi
60  def: Pat<(s64 (extractelt v64:$vec, uimm7:$idx)),
61           (LVSvi v64:$vec, (ULO7 $idx))>;
62  // LVSvr
63  def: Pat<(s64 (extractelt v64:$vec, i64:$idx)),
64           (LVSvr v64:$vec, $idx)>;
65
66  // LSVir
67  def: Pat<(v64 (insertelt v64:$vec, s64:$val, uimm7:$idx)),
68           (LSVir_v (ULO7 $idx), $val, $vec)>;
69  // LSVrr
70  def: Pat<(v64 (insertelt v64:$vec, s64:$val, i64:$idx)),
71           (LSVrr_v $idx, $val, $vec)>;
72}
73
74multiclass patterns_elem32<ValueType v32, ValueType s32,
75                           SDPatternOperator ImmOp, SDNodeXForm ImmCast,
76                           OutPatFrag SubRegCast, OutPatFrag SuperRegCast> {
77  defm : vbrd_elem32<v32, s32, ImmOp, ImmCast, SuperRegCast>;
78  defm : extract_insert_elem32<v32, s32, SubRegCast, SuperRegCast>;
79}
80
81multiclass patterns_elem64<ValueType v64, ValueType s64,
82                           SDPatternOperator ImmOp, SDNodeXForm ImmCast> {
83  defm : vbrd_elem64<v64, s64, ImmOp, ImmCast>;
84  defm : extract_insert_elem64<v64, s64>;
85}
86
87defm : patterns_elem32<v256i32, i32, simm7, LO7, l2i, i2l>;
88defm : patterns_elem32<v256f32, f32, simm7fp, LO7FP, l2f, f2l>;
89
90defm : patterns_elem64<v256i64, i64, simm7, LO7>;
91defm : patterns_elem64<v256f64, f64, simm7fp, LO7FP>;
92