1 //===-- VETargetMachine.cpp - Define TargetMachine for VE -----------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 //
10 //===----------------------------------------------------------------------===//
11 
12 #include "VETargetMachine.h"
13 #include "VE.h"
14 #include "VETargetTransformInfo.h"
15 #include "llvm/CodeGen/Passes.h"
16 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
17 #include "llvm/CodeGen/TargetPassConfig.h"
18 #include "llvm/IR/LegacyPassManager.h"
19 #include "llvm/Support/TargetRegistry.h"
20 
21 using namespace llvm;
22 
23 #define DEBUG_TYPE "ve"
24 
25 extern "C" void LLVMInitializeVETarget() {
26   // Register the target.
27   RegisterTargetMachine<VETargetMachine> X(getTheVETarget());
28 }
29 
30 static std::string computeDataLayout(const Triple &T) {
31   // Aurora VE is little endian
32   std::string Ret = "e";
33 
34   // Use ELF mangling
35   Ret += "-m:e";
36 
37   // Alignments for 64 bit integers.
38   Ret += "-i64:64";
39 
40   // VE supports 32 bit and 64 bits integer on registers
41   Ret += "-n32:64";
42 
43   // Stack alignment is 64 bits
44   Ret += "-S64";
45 
46   return Ret;
47 }
48 
49 static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
50   if (!RM.hasValue())
51     return Reloc::Static;
52   return *RM;
53 }
54 
55 class VEELFTargetObjectFile : public TargetLoweringObjectFileELF {
56   void Initialize(MCContext &Ctx, const TargetMachine &TM) override {
57     TargetLoweringObjectFileELF::Initialize(Ctx, TM);
58     InitializeELF(TM.Options.UseInitArray);
59   }
60 };
61 
62 static std::unique_ptr<TargetLoweringObjectFile> createTLOF() {
63   return std::make_unique<VEELFTargetObjectFile>();
64 }
65 
66 /// Create an Aurora VE architecture model
67 VETargetMachine::VETargetMachine(const Target &T, const Triple &TT,
68                                  StringRef CPU, StringRef FS,
69                                  const TargetOptions &Options,
70                                  Optional<Reloc::Model> RM,
71                                  Optional<CodeModel::Model> CM,
72                                  CodeGenOpt::Level OL, bool JIT)
73     : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
74                         getEffectiveRelocModel(RM),
75                         getEffectiveCodeModel(CM, CodeModel::Small), OL),
76       TLOF(createTLOF()), Subtarget(TT, CPU, FS, *this) {
77   initAsmInfo();
78 }
79 
80 VETargetMachine::~VETargetMachine() {}
81 
82 TargetTransformInfo VETargetMachine::getTargetTransformInfo(const Function &F) {
83   return TargetTransformInfo(VETTIImpl(this, F));
84 }
85 
86 namespace {
87 /// VE Code Generator Pass Configuration Options.
88 class VEPassConfig : public TargetPassConfig {
89 public:
90   VEPassConfig(VETargetMachine &TM, PassManagerBase &PM)
91       : TargetPassConfig(TM, PM) {}
92 
93   VETargetMachine &getVETargetMachine() const {
94     return getTM<VETargetMachine>();
95   }
96 
97   bool addInstSelector() override;
98 };
99 } // namespace
100 
101 TargetPassConfig *VETargetMachine::createPassConfig(PassManagerBase &PM) {
102   return new VEPassConfig(*this, PM);
103 }
104 
105 bool VEPassConfig::addInstSelector() {
106   addPass(createVEISelDag(getVETargetMachine()));
107   return false;
108 }
109