1 //- WebAssemblyISelLowering.h - WebAssembly DAG Lowering Interface -*- C++ -*-//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file defines the interfaces that WebAssembly uses to lower LLVM
11 /// code into a selection DAG.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYISELLOWERING_H
16 #define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYISELLOWERING_H
17 
18 #include "llvm/CodeGen/TargetLowering.h"
19 
20 namespace llvm {
21 
22 namespace WebAssemblyISD {
23 
24 enum NodeType : unsigned {
25   FIRST_NUMBER = ISD::BUILTIN_OP_END,
26 #define HANDLE_NODETYPE(NODE) NODE,
27 #define HANDLE_MEM_NODETYPE(NODE)
28 #include "WebAssemblyISD.def"
29   FIRST_MEM_OPCODE = ISD::FIRST_TARGET_MEMORY_OPCODE,
30 #undef HANDLE_NODETYPE
31 #undef HANDLE_MEM_NODETYPE
32 #define HANDLE_NODETYPE(NODE)
33 #define HANDLE_MEM_NODETYPE(NODE) NODE,
34 #include "WebAssemblyISD.def"
35 #undef HANDLE_NODETYPE
36 #undef HANDLE_MEM_NODETYPE
37 };
38 
39 } // end namespace WebAssemblyISD
40 
41 class WebAssemblySubtarget;
42 
43 class WebAssemblyTargetLowering final : public TargetLowering {
44 public:
45   WebAssemblyTargetLowering(const TargetMachine &TM,
46                             const WebAssemblySubtarget &STI);
47 
48 private:
49   /// Keep a pointer to the WebAssemblySubtarget around so that we can make the
50   /// right decision when generating code for different targets.
51   const WebAssemblySubtarget *Subtarget;
52 
53   AtomicExpansionKind shouldExpandAtomicRMWInIR(AtomicRMWInst *) const override;
54   FastISel *createFastISel(FunctionLoweringInfo &FuncInfo,
55                            const TargetLibraryInfo *LibInfo) const override;
56   MVT getScalarShiftAmountTy(const DataLayout &DL, EVT) const override;
57   MachineBasicBlock *
58   EmitInstrWithCustomInserter(MachineInstr &MI,
59                               MachineBasicBlock *MBB) const override;
60   const char *getTargetNodeName(unsigned Opcode) const override;
61   std::pair<unsigned, const TargetRegisterClass *>
62   getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
63                                StringRef Constraint, MVT VT) const override;
64   bool isCheapToSpeculateCttz() const override;
65   bool isCheapToSpeculateCtlz() const override;
66   bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
67                              unsigned AS,
68                              Instruction *I = nullptr) const override;
69   bool allowsMisalignedMemoryAccesses(EVT, unsigned AddrSpace, unsigned Align,
70                                       MachineMemOperand::Flags Flags,
71                                       bool *Fast) const override;
72   bool isIntDivCheap(EVT VT, AttributeList Attr) const override;
73   bool isVectorLoadExtDesirable(SDValue ExtVal) const override;
74   EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
75                          EVT VT) const override;
76   bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
77                           MachineFunction &MF,
78                           unsigned Intrinsic) const override;
79 
80   SDValue LowerCall(CallLoweringInfo &CLI,
81                     SmallVectorImpl<SDValue> &InVals) const override;
82   bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
83                       bool isVarArg,
84                       const SmallVectorImpl<ISD::OutputArg> &Outs,
85                       LLVMContext &Context) const override;
86   SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
87                       const SmallVectorImpl<ISD::OutputArg> &Outs,
88                       const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
89                       SelectionDAG &DAG) const override;
90   SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
91                                bool IsVarArg,
92                                const SmallVectorImpl<ISD::InputArg> &Ins,
93                                const SDLoc &DL, SelectionDAG &DAG,
94                                SmallVectorImpl<SDValue> &InVals) const override;
95 
96   void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
97                           SelectionDAG &DAG) const override;
98 
99   const char *getClearCacheBuiltinName() const override {
100     report_fatal_error("llvm.clear_cache is not supported on wasm");
101   }
102 
103   // Custom lowering hooks.
104   SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
105   SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
106   SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
107   SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
108   SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
109   SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
110   SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const;
111   SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
112   SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
113   SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const;
114   SDValue LowerCopyToReg(SDValue Op, SelectionDAG &DAG) const;
115   SDValue LowerIntrinsic(SDValue Op, SelectionDAG &DAG) const;
116   SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const;
117   SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
118   SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
119   SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
120   SDValue LowerAccessVectorElement(SDValue Op, SelectionDAG &DAG) const;
121   SDValue LowerShift(SDValue Op, SelectionDAG &DAG) const;
122 
123   // Custom DAG combine hooks
124   SDValue
125   PerformDAGCombine(SDNode *N,
126                     TargetLowering::DAGCombinerInfo &DCI) const override;
127 };
128 
129 namespace WebAssembly {
130 FastISel *createFastISel(FunctionLoweringInfo &funcInfo,
131                          const TargetLibraryInfo *libInfo);
132 } // end namespace WebAssembly
133 
134 } // end namespace llvm
135 
136 #endif
137