1 //===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains the entry points for global functions defined in the x86 10 // target library, as used by the LLVM JIT. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_X86_X86_H 15 #define LLVM_LIB_TARGET_X86_X86_H 16 17 #include "llvm/Support/CodeGen.h" 18 19 namespace llvm { 20 21 class FunctionPass; 22 class InstructionSelector; 23 class PassRegistry; 24 class X86RegisterBankInfo; 25 class X86Subtarget; 26 class X86TargetMachine; 27 28 /// This pass converts a legalized DAG into a X86-specific DAG, ready for 29 /// instruction scheduling. 30 FunctionPass *createX86ISelDag(X86TargetMachine &TM, 31 CodeGenOpt::Level OptLevel); 32 33 /// This pass initializes a global base register for PIC on x86-32. 34 FunctionPass *createX86GlobalBaseRegPass(); 35 36 /// This pass combines multiple accesses to local-dynamic TLS variables so that 37 /// the TLS base address for the module is only fetched once per execution path 38 /// through the function. 39 FunctionPass *createCleanupLocalDynamicTLSPass(); 40 41 /// This function returns a pass which converts floating-point register 42 /// references and pseudo instructions into floating-point stack references and 43 /// physical instructions. 44 FunctionPass *createX86FloatingPointStackifierPass(); 45 46 /// This pass inserts AVX vzeroupper instructions before each call to avoid 47 /// transition penalty between functions encoded with AVX and SSE. 48 FunctionPass *createX86IssueVZeroUpperPass(); 49 50 /// This pass inserts ENDBR instructions before indirect jump/call 51 /// destinations as part of CET IBT mechanism. 52 FunctionPass *createX86IndirectBranchTrackingPass(); 53 54 /// Return a pass that pads short functions with NOOPs. 55 /// This will prevent a stall when returning on the Atom. 56 FunctionPass *createX86PadShortFunctions(); 57 58 /// Return a pass that selectively replaces certain instructions (like add, 59 /// sub, inc, dec, some shifts, and some multiplies) by equivalent LEA 60 /// instructions, in order to eliminate execution delays in some processors. 61 FunctionPass *createX86FixupLEAs(); 62 63 /// Return a pass that removes redundant LEA instructions and redundant address 64 /// recalculations. 65 FunctionPass *createX86OptimizeLEAs(); 66 67 /// Return a pass that transforms setcc + movzx pairs into xor + setcc. 68 FunctionPass *createX86FixupSetCC(); 69 70 /// Return a pass that avoids creating store forward block issues in the hardware. 71 FunctionPass *createX86AvoidStoreForwardingBlocks(); 72 73 /// Return a pass that lowers EFLAGS copy pseudo instructions. 74 FunctionPass *createX86FlagsCopyLoweringPass(); 75 76 /// Return a pass that expands DynAlloca pseudo-instructions. 77 FunctionPass *createX86DynAllocaExpander(); 78 79 /// Return a pass that config the tile registers. 80 FunctionPass *createX86TileConfigPass(); 81 82 /// Return a pass that preconfig the tile registers before fast reg allocation. 83 FunctionPass *createX86FastPreTileConfigPass(); 84 85 /// Return a pass that config the tile registers after fast reg allocation. 86 FunctionPass *createX86FastTileConfigPass(); 87 88 /// Return a pass that insert pseudo tile config instruction. 89 FunctionPass *createX86PreTileConfigPass(); 90 91 /// Return a pass that lower the tile copy instruction. 92 FunctionPass *createX86LowerTileCopyPass(); 93 94 /// Return a pass that inserts int3 at the end of the function if it ends with a 95 /// CALL instruction. The pass does the same for each funclet as well. This 96 /// ensures that the open interval of function start and end PCs contains all 97 /// return addresses for the benefit of the Windows x64 unwinder. 98 FunctionPass *createX86AvoidTrailingCallPass(); 99 100 /// Return a pass that optimizes the code-size of x86 call sequences. This is 101 /// done by replacing esp-relative movs with pushes. 102 FunctionPass *createX86CallFrameOptimization(); 103 104 /// Return an IR pass that inserts EH registration stack objects and explicit 105 /// EH state updates. This pass must run after EH preparation, which does 106 /// Windows-specific but architecture-neutral preparation. 107 FunctionPass *createX86WinEHStatePass(); 108 109 /// Return a Machine IR pass that expands X86-specific pseudo 110 /// instructions into a sequence of actual instructions. This pass 111 /// must run after prologue/epilogue insertion and before lowering 112 /// the MachineInstr to MC. 113 FunctionPass *createX86ExpandPseudoPass(); 114 115 /// This pass converts X86 cmov instructions into branch when profitable. 116 FunctionPass *createX86CmovConverterPass(); 117 118 /// Return a Machine IR pass that selectively replaces 119 /// certain byte and word instructions by equivalent 32 bit instructions, 120 /// in order to eliminate partial register usage, false dependences on 121 /// the upper portions of registers, and to save code size. 122 FunctionPass *createX86FixupBWInsts(); 123 124 /// Return a Machine IR pass that reassigns instruction chains from one domain 125 /// to another, when profitable. 126 FunctionPass *createX86DomainReassignmentPass(); 127 128 /// This pass replaces EVEX encoded of AVX-512 instructiosn by VEX 129 /// encoding when possible in order to reduce code size. 130 FunctionPass *createX86EvexToVexInsts(); 131 132 /// This pass creates the thunks for the retpoline feature. 133 FunctionPass *createX86IndirectThunksPass(); 134 135 /// This pass ensures instructions featuring a memory operand 136 /// have distinctive <LineNumber, Discriminator> (with respect to eachother) 137 FunctionPass *createX86DiscriminateMemOpsPass(); 138 139 /// This pass applies profiling information to insert cache prefetches. 140 FunctionPass *createX86InsertPrefetchPass(); 141 142 /// This pass insert wait instruction after X87 instructions which could raise 143 /// fp exceptions when strict-fp enabled. 144 FunctionPass *createX86InsertX87waitPass(); 145 146 /// This pass optimizes arithmetic based on knowledge that is only used by 147 /// a reduction sequence and is therefore safe to reassociate in interesting 148 /// ways. 149 FunctionPass *createX86PartialReductionPass(); 150 151 InstructionSelector *createX86InstructionSelector(const X86TargetMachine &TM, 152 X86Subtarget &, 153 X86RegisterBankInfo &); 154 155 FunctionPass *createX86LoadValueInjectionLoadHardeningPass(); 156 FunctionPass *createX86LoadValueInjectionRetHardeningPass(); 157 FunctionPass *createX86SpeculativeLoadHardeningPass(); 158 FunctionPass *createX86SpeculativeExecutionSideEffectSuppression(); 159 160 void initializeEvexToVexInstPassPass(PassRegistry &); 161 void initializeFixupBWInstPassPass(PassRegistry &); 162 void initializeFixupLEAPassPass(PassRegistry &); 163 void initializeFPSPass(PassRegistry &); 164 void initializeWinEHStatePassPass(PassRegistry &); 165 void initializeX86AvoidSFBPassPass(PassRegistry &); 166 void initializeX86AvoidTrailingCallPassPass(PassRegistry &); 167 void initializeX86CallFrameOptimizationPass(PassRegistry &); 168 void initializeX86CmovConverterPassPass(PassRegistry &); 169 void initializeX86DomainReassignmentPass(PassRegistry &); 170 void initializeX86ExecutionDomainFixPass(PassRegistry &); 171 void initializeX86ExpandPseudoPass(PassRegistry &); 172 void initializeX86FixupSetCCPassPass(PassRegistry &); 173 void initializeX86FlagsCopyLoweringPassPass(PassRegistry &); 174 void initializeX86LoadValueInjectionLoadHardeningPassPass(PassRegistry &); 175 void initializeX86LoadValueInjectionRetHardeningPassPass(PassRegistry &); 176 void initializeX86OptimizeLEAPassPass(PassRegistry &); 177 void initializeX86PartialReductionPass(PassRegistry &); 178 void initializeX86SpeculativeLoadHardeningPassPass(PassRegistry &); 179 void initializeX86SpeculativeExecutionSideEffectSuppressionPass(PassRegistry &); 180 void initializeX86PreTileConfigPass(PassRegistry &); 181 void initializeX86FastPreTileConfigPass(PassRegistry &); 182 void initializeX86FastTileConfigPass(PassRegistry &); 183 void initializeX86TileConfigPass(PassRegistry &); 184 void initializeX86LowerAMXTypeLegacyPassPass(PassRegistry &); 185 void initializeX86PreAMXConfigPassPass(PassRegistry &); 186 void initializeX86LowerTileCopyPass(PassRegistry &); 187 void initializeX86LowerAMXIntrinsicsLegacyPassPass(PassRegistry &); 188 189 namespace X86AS { 190 enum : unsigned { 191 GS = 256, 192 FS = 257, 193 SS = 258, 194 PTR32_SPTR = 270, 195 PTR32_UPTR = 271, 196 PTR64 = 272 197 }; 198 } // End X86AS namespace 199 200 } // End llvm namespace 201 202 #endif 203