1//===-- X86InstrSNP.td - SNP Instruction Set Extension -----*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file describes the instructions that make up the AMD Secure Nested
10// Paging (SNP) instruction set.
11//
12//===----------------------------------------------------------------------===//
13
14//===----------------------------------------------------------------------===//
15// SNP instructions
16
17let SchedRW = [WriteSystem] in {
18// F3 0F 01 FF
19let Uses = [RAX] in
20def PSMASH: I<0x01, MRM_FF, (outs), (ins), "psmash", []>, XS,
21            Requires<[In64BitMode]>;
22
23// F2 0F 01 FF
24let Uses = [RAX] in
25def PVALIDATE64: I<0x01, MRM_FF, (outs), (ins), "pvalidate",[]>,
26                 XD, Requires<[In64BitMode]>;
27
28let Uses = [EAX] in
29def PVALIDATE32: I<0x01, MRM_FF, (outs), (ins), "pvalidate",[]>,
30                 XD, Requires<[Not64BitMode]>;
31
32// F2 0F 01 FE
33let Uses = [RAX] in
34def RMPUPDATE: I<0x01, MRM_FE, (outs), (ins), "rmpupdate", []>, XD,
35               Requires<[In64BitMode]>;
36
37// F3 0F 01 FE
38let Uses = [RAX] in
39def RMPADJUST: I<0x01, MRM_FE, (outs), (ins), "rmpadjust", []>, XS,
40               Requires<[In64BitMode]>;
41} // SchedRW
42
43def : InstAlias<"psmash\t{%rax|rax}", (PSMASH)>, Requires<[In64BitMode]>;
44def : InstAlias<"pvalidate\t{%rax|rax}", (PVALIDATE64)>, Requires<[In64BitMode]>;
45def : InstAlias<"pvalidate\t{%eax|eax}", (PVALIDATE32)>, Requires<[Not64BitMode]>;
46def : InstAlias<"rmpupdate\t{%rax|rax}", (RMPUPDATE)>, Requires<[In64BitMode]>;
47def : InstAlias<"rmpadjust\t{%rax|rax}", (RMPADJUST)>, Requires<[In64BitMode]>;
48