1//===- X86InstrTDX.td - TDX Instruction Set Extension -*- tablegen -*===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file describes the instructions that make up the Intel TDX instruction
10// set.
11//
12//===----------------------------------------------------------------------===//
13
14//===----------------------------------------------------------------------===//
15// TDX instructions
16
17// 64-bit only instructions
18let SchedRW = [WriteSystem], Predicates = [In64BitMode] in {
19// SEAMCALL - Call to SEAM VMX-root Operation Module
20def SEAMCALL : I<0x01, MRM_CF, (outs), (ins), "seamcall", []>, TB, PD;
21
22// SEAMRET - Return to Legacy VMX-root Operation
23def SEAMRET : I<0x01, MRM_CD, (outs), (ins), "seamret", []>, TB, PD;
24
25// SEAMOPS - SEAM Operations
26def SEAMOPS : I<0x01, MRM_CE, (outs), (ins), "seamops", []>, TB, PD;
27} // SchedRW
28
29// common instructions
30let SchedRW = [WriteSystem] in {
31// TDCALL - Call SEAM Module Functions
32def TDCALL : I<0x01, MRM_CC, (outs), (ins), "tdcall", []>, TB, PD;
33} // SchedRW
34