1bdd1243dSDimitry Andric //===-- XtensaTargetMachine.h - Define TargetMachine for Xtensa -*- C++ -*-===//
2bdd1243dSDimitry Andric //
3bdd1243dSDimitry Andric //                     The LLVM Compiler Infrastructure
4bdd1243dSDimitry Andric //
5bdd1243dSDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
6bdd1243dSDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
7bdd1243dSDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
8bdd1243dSDimitry Andric //
9bdd1243dSDimitry Andric //===----------------------------------------------------------------------===//
10bdd1243dSDimitry Andric //
11bdd1243dSDimitry Andric // This file declares the Xtensa specific subclass of TargetMachine.
12bdd1243dSDimitry Andric //
13bdd1243dSDimitry Andric //===----------------------------------------------------------------------===//
14bdd1243dSDimitry Andric 
15bdd1243dSDimitry Andric #ifndef LLVM_LIB_TARGET_XTENSA_XTENSATARGETMACHINE_H
16bdd1243dSDimitry Andric #define LLVM_LIB_TARGET_XTENSA_XTENSATARGETMACHINE_H
17bdd1243dSDimitry Andric 
18bdd1243dSDimitry Andric #include "llvm/Target/TargetMachine.h"
19bdd1243dSDimitry Andric #include <optional>
20bdd1243dSDimitry Andric 
21bdd1243dSDimitry Andric namespace llvm {
22bdd1243dSDimitry Andric extern Target TheXtensaTarget;
23bdd1243dSDimitry Andric 
24bdd1243dSDimitry Andric class XtensaTargetMachine : public LLVMTargetMachine {
25bdd1243dSDimitry Andric   std::unique_ptr<TargetLoweringObjectFile> TLOF;
26bdd1243dSDimitry Andric public:
27bdd1243dSDimitry Andric   XtensaTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
28bdd1243dSDimitry Andric                       StringRef FS, const TargetOptions &Options,
29bdd1243dSDimitry Andric                       std::optional<Reloc::Model> RM,
30*5f757f3fSDimitry Andric                       std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
31bdd1243dSDimitry Andric                       bool JIT, bool isLittle);
32bdd1243dSDimitry Andric 
33bdd1243dSDimitry Andric   XtensaTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
34bdd1243dSDimitry Andric                       StringRef FS, const TargetOptions &Options,
35bdd1243dSDimitry Andric                       std::optional<Reloc::Model> RM,
36*5f757f3fSDimitry Andric                       std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
37bdd1243dSDimitry Andric                       bool JIT);
38bdd1243dSDimitry Andric 
39bdd1243dSDimitry Andric   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
getObjFileLowering()40bdd1243dSDimitry Andric   TargetLoweringObjectFile *getObjFileLowering() const override {
41bdd1243dSDimitry Andric     return TLOF.get();
42bdd1243dSDimitry Andric   }
43bdd1243dSDimitry Andric };
44bdd1243dSDimitry Andric } // end namespace llvm
45bdd1243dSDimitry Andric 
46bdd1243dSDimitry Andric #endif // LLVM_LIB_TARGET_XTENSA_XTENSATARGETMACHINE_H
47