1 //===- VPlanTransforms.h - Utility VPlan to VPlan transforms --------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 /// 9 /// \file 10 /// This file provides utility VPlan to VPlan transformations. 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_TRANSFORMS_VECTORIZE_VPLANTRANSFORMS_H 14 #define LLVM_TRANSFORMS_VECTORIZE_VPLANTRANSFORMS_H 15 16 #include "VPlan.h" 17 #include "llvm/ADT/STLFunctionalExtras.h" 18 19 namespace llvm { 20 21 class InductionDescriptor; 22 class Instruction; 23 class PHINode; 24 class ScalarEvolution; 25 class PredicatedScalarEvolution; 26 class TargetLibraryInfo; 27 class VPBuilder; 28 29 struct VPlanTransforms { 30 /// Replaces the VPInstructions in \p Plan with corresponding 31 /// widen recipes. 32 static void 33 VPInstructionsToVPRecipes(VPlanPtr &Plan, 34 function_ref<const InductionDescriptor *(PHINode *)> 35 GetIntOrFpInductionDescriptor, 36 ScalarEvolution &SE, const TargetLibraryInfo &TLI); 37 38 /// Sink users of fixed-order recurrences after the recipe defining their 39 /// previous value. Then introduce FirstOrderRecurrenceSplice VPInstructions 40 /// to combine the value from the recurrence phis and previous values. The 41 /// current implementation assumes all users can be sunk after the previous 42 /// value, which is enforced by earlier legality checks. 43 /// \returns true if all users of fixed-order recurrences could be re-arranged 44 /// as needed or false if it is not possible. In the latter case, \p Plan is 45 /// not valid. 46 static bool adjustFixedOrderRecurrences(VPlan &Plan, VPBuilder &Builder); 47 48 /// Clear NSW/NUW flags from reduction instructions if necessary. 49 static void clearReductionWrapFlags(VPlan &Plan); 50 51 /// Optimize \p Plan based on \p BestVF and \p BestUF. This may restrict the 52 /// resulting plan to \p BestVF and \p BestUF. 53 static void optimizeForVFAndUF(VPlan &Plan, ElementCount BestVF, 54 unsigned BestUF, 55 PredicatedScalarEvolution &PSE); 56 57 /// Apply VPlan-to-VPlan optimizations to \p Plan, including induction recipe 58 /// optimizations, dead recipe removal, replicate region optimizations and 59 /// block merging. 60 static void optimize(VPlan &Plan, ScalarEvolution &SE); 61 62 /// Wrap predicated VPReplicateRecipes with a mask operand in an if-then 63 /// region block and remove the mask operand. Optimize the created regions by 64 /// iteratively sinking scalar operands into the region, followed by merging 65 /// regions until no improvements are remaining. 66 static void createAndOptimizeReplicateRegions(VPlan &Plan); 67 68 /// Replace (ICMP_ULE, wide canonical IV, backedge-taken-count) checks with an 69 /// (active-lane-mask recipe, wide canonical IV, trip-count). If \p 70 /// UseActiveLaneMaskForControlFlow is true, introduce an 71 /// VPActiveLaneMaskPHIRecipe. If \p DataAndControlFlowWithoutRuntimeCheck is 72 /// true, no minimum-iteration runtime check will be created (during skeleton 73 /// creation) and instead it is handled using active-lane-mask. \p 74 /// DataAndControlFlowWithoutRuntimeCheck implies \p 75 /// UseActiveLaneMaskForControlFlow. 76 static void addActiveLaneMask(VPlan &Plan, 77 bool UseActiveLaneMaskForControlFlow, 78 bool DataAndControlFlowWithoutRuntimeCheck); 79 80 /// Insert truncates and extends for any truncated recipe. Redundant casts 81 /// will be folded later. 82 static void 83 truncateToMinimalBitwidths(VPlan &Plan, 84 const MapVector<Instruction *, uint64_t> &MinBWs, 85 LLVMContext &Ctx); 86 87 private: 88 /// Remove redundant VPBasicBlocks by merging them into their predecessor if 89 /// the predecessor has a single successor. 90 static bool mergeBlocksIntoPredecessors(VPlan &Plan); 91 92 /// Remove redundant casts of inductions. 93 /// 94 /// Such redundant casts are casts of induction variables that can be ignored, 95 /// because we already proved that the casted phi is equal to the uncasted phi 96 /// in the vectorized loop. There is no need to vectorize the cast - the same 97 /// value can be used for both the phi and casts in the vector loop. 98 static void removeRedundantInductionCasts(VPlan &Plan); 99 100 /// Try to replace VPWidenCanonicalIVRecipes with a widened canonical IV 101 /// recipe, if it exists. 102 static void removeRedundantCanonicalIVs(VPlan &Plan); 103 104 static void removeDeadRecipes(VPlan &Plan); 105 106 /// If any user of a VPWidenIntOrFpInductionRecipe needs scalar values, 107 /// provide them by building scalar steps off of the canonical scalar IV and 108 /// update the original IV's users. This is an optional optimization to reduce 109 /// the needs of vector extracts. 110 static void optimizeInductions(VPlan &Plan, ScalarEvolution &SE); 111 112 /// Remove redundant EpxandSCEVRecipes in \p Plan's entry block by replacing 113 /// them with already existing recipes expanding the same SCEV expression. 114 static void removeRedundantExpandSCEVRecipes(VPlan &Plan); 115 116 }; 117 118 } // namespace llvm 119 120 #endif // LLVM_TRANSFORMS_VECTORIZE_VPLANTRANSFORMS_H 121