1 //===- IntrinsicEmitter.cpp - Generate intrinsic information --------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This tablegen backend emits information about intrinsic functions.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "CodeGenIntrinsics.h"
14 #include "CodeGenTarget.h"
15 #include "SequenceToOffsetTable.h"
16 #include "TableGenBackends.h"
17 #include "llvm/ADT/StringExtras.h"
18 #include "llvm/Support/CommandLine.h"
19 #include "llvm/TableGen/Error.h"
20 #include "llvm/TableGen/Record.h"
21 #include "llvm/TableGen/StringMatcher.h"
22 #include "llvm/TableGen/StringToOffsetTable.h"
23 #include "llvm/TableGen/TableGenBackend.h"
24 #include <algorithm>
25 using namespace llvm;
26 
27 cl::OptionCategory GenIntrinsicCat("Options for -gen-intrinsic-enums");
28 cl::opt<std::string>
29     IntrinsicPrefix("intrinsic-prefix",
30                     cl::desc("Generate intrinsics with this target prefix"),
31                     cl::value_desc("target prefix"), cl::cat(GenIntrinsicCat));
32 
33 namespace {
34 class IntrinsicEmitter {
35   RecordKeeper &Records;
36 
37 public:
38   IntrinsicEmitter(RecordKeeper &R) : Records(R) {}
39 
40   void run(raw_ostream &OS, bool Enums);
41 
42   void EmitEnumInfo(const CodeGenIntrinsicTable &Ints, raw_ostream &OS);
43   void EmitTargetInfo(const CodeGenIntrinsicTable &Ints, raw_ostream &OS);
44   void EmitIntrinsicToNameTable(const CodeGenIntrinsicTable &Ints,
45                                 raw_ostream &OS);
46   void EmitIntrinsicToOverloadTable(const CodeGenIntrinsicTable &Ints,
47                                     raw_ostream &OS);
48   void EmitGenerator(const CodeGenIntrinsicTable &Ints, raw_ostream &OS);
49   void EmitAttributes(const CodeGenIntrinsicTable &Ints, raw_ostream &OS);
50   void EmitIntrinsicToBuiltinMap(const CodeGenIntrinsicTable &Ints, bool IsGCC,
51                                  raw_ostream &OS);
52 };
53 } // End anonymous namespace
54 
55 //===----------------------------------------------------------------------===//
56 // IntrinsicEmitter Implementation
57 //===----------------------------------------------------------------------===//
58 
59 void IntrinsicEmitter::run(raw_ostream &OS, bool Enums) {
60   emitSourceFileHeader("Intrinsic Function Source Fragment", OS);
61 
62   CodeGenIntrinsicTable Ints(Records);
63 
64   if (Enums) {
65     // Emit the enum information.
66     EmitEnumInfo(Ints, OS);
67   } else {
68     // Emit the target metadata.
69     EmitTargetInfo(Ints, OS);
70 
71     // Emit the intrinsic ID -> name table.
72     EmitIntrinsicToNameTable(Ints, OS);
73 
74     // Emit the intrinsic ID -> overload table.
75     EmitIntrinsicToOverloadTable(Ints, OS);
76 
77     // Emit the intrinsic declaration generator.
78     EmitGenerator(Ints, OS);
79 
80     // Emit the intrinsic parameter attributes.
81     EmitAttributes(Ints, OS);
82 
83     // Emit code to translate GCC builtins into LLVM intrinsics.
84     EmitIntrinsicToBuiltinMap(Ints, true, OS);
85 
86     // Emit code to translate MS builtins into LLVM intrinsics.
87     EmitIntrinsicToBuiltinMap(Ints, false, OS);
88   }
89 }
90 
91 void IntrinsicEmitter::EmitEnumInfo(const CodeGenIntrinsicTable &Ints,
92                                     raw_ostream &OS) {
93   // Find the TargetSet for which to generate enums. There will be an initial
94   // set with an empty target prefix which will include target independent
95   // intrinsics like dbg.value.
96   const CodeGenIntrinsicTable::TargetSet *Set = nullptr;
97   for (const auto &Target : Ints.Targets) {
98     if (Target.Name == IntrinsicPrefix) {
99       Set = &Target;
100       break;
101     }
102   }
103   if (!Set) {
104     std::vector<std::string> KnownTargets;
105     for (const auto &Target : Ints.Targets)
106       if (!Target.Name.empty())
107         KnownTargets.push_back(Target.Name);
108     PrintFatalError("tried to generate intrinsics for unknown target " +
109                     IntrinsicPrefix +
110                     "\nKnown targets are: " + join(KnownTargets, ", ") + "\n");
111   }
112 
113   // Generate a complete header for target specific intrinsics.
114   if (!IntrinsicPrefix.empty()) {
115     std::string UpperPrefix = StringRef(IntrinsicPrefix).upper();
116     OS << "#ifndef LLVM_IR_INTRINSIC_" << UpperPrefix << "_ENUMS_H\n";
117     OS << "#define LLVM_IR_INTRINSIC_" << UpperPrefix << "_ENUMS_H\n\n";
118     OS << "namespace llvm {\n";
119     OS << "namespace Intrinsic {\n";
120     OS << "enum " << UpperPrefix << "Intrinsics : unsigned {\n";
121   }
122 
123   OS << "// Enum values for intrinsics\n";
124   for (unsigned i = Set->Offset, e = Set->Offset + Set->Count; i != e; ++i) {
125     OS << "    " << Ints[i].EnumName;
126 
127     // Assign a value to the first intrinsic in this target set so that all
128     // intrinsic ids are distinct.
129     if (i == Set->Offset)
130       OS << " = " << (Set->Offset + 1);
131 
132     OS << ", ";
133     if (Ints[i].EnumName.size() < 40)
134       OS.indent(40 - Ints[i].EnumName.size());
135     OS << " // " << Ints[i].Name << "\n";
136   }
137 
138   // Emit num_intrinsics into the target neutral enum.
139   if (IntrinsicPrefix.empty()) {
140     OS << "    num_intrinsics = " << (Ints.size() + 1) << "\n";
141   } else {
142     OS << "}; // enum\n";
143     OS << "} // namespace Intrinsic\n";
144     OS << "} // namespace llvm\n\n";
145     OS << "#endif\n";
146   }
147 }
148 
149 void IntrinsicEmitter::EmitTargetInfo(const CodeGenIntrinsicTable &Ints,
150                                     raw_ostream &OS) {
151   OS << "// Target mapping\n";
152   OS << "#ifdef GET_INTRINSIC_TARGET_DATA\n";
153   OS << "struct IntrinsicTargetInfo {\n"
154      << "  llvm::StringLiteral Name;\n"
155      << "  size_t Offset;\n"
156      << "  size_t Count;\n"
157      << "};\n";
158   OS << "static constexpr IntrinsicTargetInfo TargetInfos[] = {\n";
159   for (auto Target : Ints.Targets)
160     OS << "  {llvm::StringLiteral(\"" << Target.Name << "\"), " << Target.Offset
161        << ", " << Target.Count << "},\n";
162   OS << "};\n";
163   OS << "#endif\n\n";
164 }
165 
166 void IntrinsicEmitter::EmitIntrinsicToNameTable(
167     const CodeGenIntrinsicTable &Ints, raw_ostream &OS) {
168   OS << "// Intrinsic ID to name table\n";
169   OS << "#ifdef GET_INTRINSIC_NAME_TABLE\n";
170   OS << "  // Note that entry #0 is the invalid intrinsic!\n";
171   for (unsigned i = 0, e = Ints.size(); i != e; ++i)
172     OS << "  \"" << Ints[i].Name << "\",\n";
173   OS << "#endif\n\n";
174 }
175 
176 void IntrinsicEmitter::EmitIntrinsicToOverloadTable(
177     const CodeGenIntrinsicTable &Ints, raw_ostream &OS) {
178   OS << "// Intrinsic ID to overload bitset\n";
179   OS << "#ifdef GET_INTRINSIC_OVERLOAD_TABLE\n";
180   OS << "static const uint8_t OTable[] = {\n";
181   OS << "  0";
182   for (unsigned i = 0, e = Ints.size(); i != e; ++i) {
183     // Add one to the index so we emit a null bit for the invalid #0 intrinsic.
184     if ((i+1)%8 == 0)
185       OS << ",\n  0";
186     if (Ints[i].isOverloaded)
187       OS << " | (1<<" << (i+1)%8 << ')';
188   }
189   OS << "\n};\n\n";
190   // OTable contains a true bit at the position if the intrinsic is overloaded.
191   OS << "return (OTable[id/8] & (1 << (id%8))) != 0;\n";
192   OS << "#endif\n\n";
193 }
194 
195 
196 // NOTE: This must be kept in synch with the copy in lib/IR/Function.cpp!
197 enum IIT_Info {
198   // Common values should be encoded with 0-15.
199   IIT_Done = 0,
200   IIT_I1   = 1,
201   IIT_I8   = 2,
202   IIT_I16  = 3,
203   IIT_I32  = 4,
204   IIT_I64  = 5,
205   IIT_F16  = 6,
206   IIT_F32  = 7,
207   IIT_F64  = 8,
208   IIT_V2   = 9,
209   IIT_V4   = 10,
210   IIT_V8   = 11,
211   IIT_V16  = 12,
212   IIT_V32  = 13,
213   IIT_PTR  = 14,
214   IIT_ARG  = 15,
215 
216   // Values from 16+ are only encodable with the inefficient encoding.
217   IIT_V64  = 16,
218   IIT_MMX  = 17,
219   IIT_TOKEN = 18,
220   IIT_METADATA = 19,
221   IIT_EMPTYSTRUCT = 20,
222   IIT_STRUCT2 = 21,
223   IIT_STRUCT3 = 22,
224   IIT_STRUCT4 = 23,
225   IIT_STRUCT5 = 24,
226   IIT_EXTEND_ARG = 25,
227   IIT_TRUNC_ARG = 26,
228   IIT_ANYPTR = 27,
229   IIT_V1   = 28,
230   IIT_VARARG = 29,
231   IIT_HALF_VEC_ARG = 30,
232   IIT_SAME_VEC_WIDTH_ARG = 31,
233   IIT_PTR_TO_ARG = 32,
234   IIT_PTR_TO_ELT = 33,
235   IIT_VEC_OF_ANYPTRS_TO_ELT = 34,
236   IIT_I128 = 35,
237   IIT_V512 = 36,
238   IIT_V1024 = 37,
239   IIT_STRUCT6 = 38,
240   IIT_STRUCT7 = 39,
241   IIT_STRUCT8 = 40,
242   IIT_F128 = 41,
243   IIT_VEC_ELEMENT = 42,
244   IIT_SCALABLE_VEC = 43,
245   IIT_SUBDIVIDE2_ARG = 44,
246   IIT_SUBDIVIDE4_ARG = 45,
247   IIT_VEC_OF_BITCASTS_TO_INT = 46,
248   IIT_V128 = 47,
249   IIT_BF16 = 48,
250   IIT_STRUCT9 = 49,
251   IIT_V256 = 50,
252   IIT_AMX  = 51
253 };
254 
255 static void EncodeFixedValueType(MVT::SimpleValueType VT,
256                                  std::vector<unsigned char> &Sig) {
257   if (MVT(VT).isInteger()) {
258     unsigned BitWidth = MVT(VT).getFixedSizeInBits();
259     switch (BitWidth) {
260     default: PrintFatalError("unhandled integer type width in intrinsic!");
261     case 1: return Sig.push_back(IIT_I1);
262     case 8: return Sig.push_back(IIT_I8);
263     case 16: return Sig.push_back(IIT_I16);
264     case 32: return Sig.push_back(IIT_I32);
265     case 64: return Sig.push_back(IIT_I64);
266     case 128: return Sig.push_back(IIT_I128);
267     }
268   }
269 
270   switch (VT) {
271   default: PrintFatalError("unhandled MVT in intrinsic!");
272   case MVT::f16: return Sig.push_back(IIT_F16);
273   case MVT::bf16: return Sig.push_back(IIT_BF16);
274   case MVT::f32: return Sig.push_back(IIT_F32);
275   case MVT::f64: return Sig.push_back(IIT_F64);
276   case MVT::f128: return Sig.push_back(IIT_F128);
277   case MVT::token: return Sig.push_back(IIT_TOKEN);
278   case MVT::Metadata: return Sig.push_back(IIT_METADATA);
279   case MVT::x86mmx: return Sig.push_back(IIT_MMX);
280   case MVT::x86amx: return Sig.push_back(IIT_AMX);
281   // MVT::OtherVT is used to mean the empty struct type here.
282   case MVT::Other: return Sig.push_back(IIT_EMPTYSTRUCT);
283   // MVT::isVoid is used to represent varargs here.
284   case MVT::isVoid: return Sig.push_back(IIT_VARARG);
285   }
286 }
287 
288 #if defined(_MSC_VER) && !defined(__clang__)
289 #pragma optimize("",off) // MSVC 2015 optimizer can't deal with this function.
290 #endif
291 
292 static void EncodeFixedType(Record *R, std::vector<unsigned char> &ArgCodes,
293                             unsigned &NextArgCode,
294                             std::vector<unsigned char> &Sig,
295                             ArrayRef<unsigned char> Mapping) {
296 
297   if (R->isSubClassOf("LLVMMatchType")) {
298     unsigned Number = Mapping[R->getValueAsInt("Number")];
299     assert(Number < ArgCodes.size() && "Invalid matching number!");
300     if (R->isSubClassOf("LLVMExtendedType"))
301       Sig.push_back(IIT_EXTEND_ARG);
302     else if (R->isSubClassOf("LLVMTruncatedType"))
303       Sig.push_back(IIT_TRUNC_ARG);
304     else if (R->isSubClassOf("LLVMHalfElementsVectorType"))
305       Sig.push_back(IIT_HALF_VEC_ARG);
306     else if (R->isSubClassOf("LLVMScalarOrSameVectorWidth")) {
307       Sig.push_back(IIT_SAME_VEC_WIDTH_ARG);
308       Sig.push_back((Number << 3) | ArgCodes[Number]);
309       MVT::SimpleValueType VT = getValueType(R->getValueAsDef("ElTy"));
310       EncodeFixedValueType(VT, Sig);
311       return;
312     }
313     else if (R->isSubClassOf("LLVMPointerTo"))
314       Sig.push_back(IIT_PTR_TO_ARG);
315     else if (R->isSubClassOf("LLVMVectorOfAnyPointersToElt")) {
316       Sig.push_back(IIT_VEC_OF_ANYPTRS_TO_ELT);
317       // Encode overloaded ArgNo
318       Sig.push_back(NextArgCode++);
319       // Encode LLVMMatchType<Number> ArgNo
320       Sig.push_back(Number);
321       return;
322     } else if (R->isSubClassOf("LLVMPointerToElt"))
323       Sig.push_back(IIT_PTR_TO_ELT);
324     else if (R->isSubClassOf("LLVMVectorElementType"))
325       Sig.push_back(IIT_VEC_ELEMENT);
326     else if (R->isSubClassOf("LLVMSubdivide2VectorType"))
327       Sig.push_back(IIT_SUBDIVIDE2_ARG);
328     else if (R->isSubClassOf("LLVMSubdivide4VectorType"))
329       Sig.push_back(IIT_SUBDIVIDE4_ARG);
330     else if (R->isSubClassOf("LLVMVectorOfBitcastsToInt"))
331       Sig.push_back(IIT_VEC_OF_BITCASTS_TO_INT);
332     else
333       Sig.push_back(IIT_ARG);
334     return Sig.push_back((Number << 3) | 7 /*IITDescriptor::AK_MatchType*/);
335   }
336 
337   MVT::SimpleValueType VT = getValueType(R->getValueAsDef("VT"));
338 
339   unsigned Tmp = 0;
340   switch (VT) {
341   default: break;
342   case MVT::iPTRAny: ++Tmp; LLVM_FALLTHROUGH;
343   case MVT::vAny: ++Tmp;    LLVM_FALLTHROUGH;
344   case MVT::fAny: ++Tmp;    LLVM_FALLTHROUGH;
345   case MVT::iAny: ++Tmp;    LLVM_FALLTHROUGH;
346   case MVT::Any: {
347     // If this is an "any" valuetype, then the type is the type of the next
348     // type in the list specified to getIntrinsic().
349     Sig.push_back(IIT_ARG);
350 
351     // Figure out what arg # this is consuming, and remember what kind it was.
352     assert(NextArgCode < ArgCodes.size() && ArgCodes[NextArgCode] == Tmp &&
353            "Invalid or no ArgCode associated with overloaded VT!");
354     unsigned ArgNo = NextArgCode++;
355 
356     // Encode what sort of argument it must be in the low 3 bits of the ArgNo.
357     return Sig.push_back((ArgNo << 3) | Tmp);
358   }
359 
360   case MVT::iPTR: {
361     unsigned AddrSpace = 0;
362     if (R->isSubClassOf("LLVMQualPointerType")) {
363       AddrSpace = R->getValueAsInt("AddrSpace");
364       assert(AddrSpace < 256 && "Address space exceeds 255");
365     }
366     if (AddrSpace) {
367       Sig.push_back(IIT_ANYPTR);
368       Sig.push_back(AddrSpace);
369     } else {
370       Sig.push_back(IIT_PTR);
371     }
372     return EncodeFixedType(R->getValueAsDef("ElTy"), ArgCodes, NextArgCode, Sig,
373                            Mapping);
374   }
375   }
376 
377   if (MVT(VT).isVector()) {
378     MVT VVT = VT;
379     if (VVT.isScalableVector())
380       Sig.push_back(IIT_SCALABLE_VEC);
381     switch (VVT.getVectorMinNumElements()) {
382     default: PrintFatalError("unhandled vector type width in intrinsic!");
383     case 1: Sig.push_back(IIT_V1); break;
384     case 2: Sig.push_back(IIT_V2); break;
385     case 4: Sig.push_back(IIT_V4); break;
386     case 8: Sig.push_back(IIT_V8); break;
387     case 16: Sig.push_back(IIT_V16); break;
388     case 32: Sig.push_back(IIT_V32); break;
389     case 64: Sig.push_back(IIT_V64); break;
390     case 128: Sig.push_back(IIT_V128); break;
391     case 256: Sig.push_back(IIT_V256); break;
392     case 512: Sig.push_back(IIT_V512); break;
393     case 1024: Sig.push_back(IIT_V1024); break;
394     }
395 
396     return EncodeFixedValueType(VVT.getVectorElementType().SimpleTy, Sig);
397   }
398 
399   EncodeFixedValueType(VT, Sig);
400 }
401 
402 static void UpdateArgCodes(Record *R, std::vector<unsigned char> &ArgCodes,
403                            unsigned int &NumInserted,
404                            SmallVectorImpl<unsigned char> &Mapping) {
405   if (R->isSubClassOf("LLVMMatchType")) {
406     if (R->isSubClassOf("LLVMVectorOfAnyPointersToElt")) {
407       ArgCodes.push_back(3 /*vAny*/);
408       ++NumInserted;
409     }
410     return;
411   }
412 
413   unsigned Tmp = 0;
414   switch (getValueType(R->getValueAsDef("VT"))) {
415   default: break;
416   case MVT::iPTR:
417     UpdateArgCodes(R->getValueAsDef("ElTy"), ArgCodes, NumInserted, Mapping);
418     break;
419   case MVT::iPTRAny:
420     ++Tmp;
421     LLVM_FALLTHROUGH;
422   case MVT::vAny:
423     ++Tmp;
424     LLVM_FALLTHROUGH;
425   case MVT::fAny:
426     ++Tmp;
427     LLVM_FALLTHROUGH;
428   case MVT::iAny:
429     ++Tmp;
430     LLVM_FALLTHROUGH;
431   case MVT::Any:
432     unsigned OriginalIdx = ArgCodes.size() - NumInserted;
433     assert(OriginalIdx >= Mapping.size());
434     Mapping.resize(OriginalIdx+1);
435     Mapping[OriginalIdx] = ArgCodes.size();
436     ArgCodes.push_back(Tmp);
437     break;
438   }
439 }
440 
441 #if defined(_MSC_VER) && !defined(__clang__)
442 #pragma optimize("",on)
443 #endif
444 
445 /// ComputeFixedEncoding - If we can encode the type signature for this
446 /// intrinsic into 32 bits, return it.  If not, return ~0U.
447 static void ComputeFixedEncoding(const CodeGenIntrinsic &Int,
448                                  std::vector<unsigned char> &TypeSig) {
449   std::vector<unsigned char> ArgCodes;
450 
451   // Add codes for any overloaded result VTs.
452   unsigned int NumInserted = 0;
453   SmallVector<unsigned char, 8> ArgMapping;
454   for (unsigned i = 0, e = Int.IS.RetVTs.size(); i != e; ++i)
455     UpdateArgCodes(Int.IS.RetTypeDefs[i], ArgCodes, NumInserted, ArgMapping);
456 
457   // Add codes for any overloaded operand VTs.
458   for (unsigned i = 0, e = Int.IS.ParamTypeDefs.size(); i != e; ++i)
459     UpdateArgCodes(Int.IS.ParamTypeDefs[i], ArgCodes, NumInserted, ArgMapping);
460 
461   unsigned NextArgCode = 0;
462   if (Int.IS.RetVTs.empty())
463     TypeSig.push_back(IIT_Done);
464   else if (Int.IS.RetVTs.size() == 1 &&
465            Int.IS.RetVTs[0] == MVT::isVoid)
466     TypeSig.push_back(IIT_Done);
467   else {
468     switch (Int.IS.RetVTs.size()) {
469       case 1: break;
470       case 2: TypeSig.push_back(IIT_STRUCT2); break;
471       case 3: TypeSig.push_back(IIT_STRUCT3); break;
472       case 4: TypeSig.push_back(IIT_STRUCT4); break;
473       case 5: TypeSig.push_back(IIT_STRUCT5); break;
474       case 6: TypeSig.push_back(IIT_STRUCT6); break;
475       case 7: TypeSig.push_back(IIT_STRUCT7); break;
476       case 8: TypeSig.push_back(IIT_STRUCT8); break;
477       case 9: TypeSig.push_back(IIT_STRUCT9); break;
478       default: llvm_unreachable("Unhandled case in struct");
479     }
480 
481     for (unsigned i = 0, e = Int.IS.RetVTs.size(); i != e; ++i)
482       EncodeFixedType(Int.IS.RetTypeDefs[i], ArgCodes, NextArgCode, TypeSig,
483                       ArgMapping);
484   }
485 
486   for (unsigned i = 0, e = Int.IS.ParamTypeDefs.size(); i != e; ++i)
487     EncodeFixedType(Int.IS.ParamTypeDefs[i], ArgCodes, NextArgCode, TypeSig,
488                     ArgMapping);
489 }
490 
491 static void printIITEntry(raw_ostream &OS, unsigned char X) {
492   OS << (unsigned)X;
493 }
494 
495 void IntrinsicEmitter::EmitGenerator(const CodeGenIntrinsicTable &Ints,
496                                      raw_ostream &OS) {
497   // If we can compute a 32-bit fixed encoding for this intrinsic, do so and
498   // capture it in this vector, otherwise store a ~0U.
499   std::vector<unsigned> FixedEncodings;
500 
501   SequenceToOffsetTable<std::vector<unsigned char> > LongEncodingTable;
502 
503   std::vector<unsigned char> TypeSig;
504 
505   // Compute the unique argument type info.
506   for (unsigned i = 0, e = Ints.size(); i != e; ++i) {
507     // Get the signature for the intrinsic.
508     TypeSig.clear();
509     ComputeFixedEncoding(Ints[i], TypeSig);
510 
511     // Check to see if we can encode it into a 32-bit word.  We can only encode
512     // 8 nibbles into a 32-bit word.
513     if (TypeSig.size() <= 8) {
514       bool Failed = false;
515       unsigned Result = 0;
516       for (unsigned i = 0, e = TypeSig.size(); i != e; ++i) {
517         // If we had an unencodable argument, bail out.
518         if (TypeSig[i] > 15) {
519           Failed = true;
520           break;
521         }
522         Result = (Result << 4) | TypeSig[e-i-1];
523       }
524 
525       // If this could be encoded into a 31-bit word, return it.
526       if (!Failed && (Result >> 31) == 0) {
527         FixedEncodings.push_back(Result);
528         continue;
529       }
530     }
531 
532     // Otherwise, we're going to unique the sequence into the
533     // LongEncodingTable, and use its offset in the 32-bit table instead.
534     LongEncodingTable.add(TypeSig);
535 
536     // This is a placehold that we'll replace after the table is laid out.
537     FixedEncodings.push_back(~0U);
538   }
539 
540   LongEncodingTable.layout();
541 
542   OS << "// Global intrinsic function declaration type table.\n";
543   OS << "#ifdef GET_INTRINSIC_GENERATOR_GLOBAL\n";
544 
545   OS << "static const unsigned IIT_Table[] = {\n  ";
546 
547   for (unsigned i = 0, e = FixedEncodings.size(); i != e; ++i) {
548     if ((i & 7) == 7)
549       OS << "\n  ";
550 
551     // If the entry fit in the table, just emit it.
552     if (FixedEncodings[i] != ~0U) {
553       OS << "0x" << Twine::utohexstr(FixedEncodings[i]) << ", ";
554       continue;
555     }
556 
557     TypeSig.clear();
558     ComputeFixedEncoding(Ints[i], TypeSig);
559 
560 
561     // Otherwise, emit the offset into the long encoding table.  We emit it this
562     // way so that it is easier to read the offset in the .def file.
563     OS << "(1U<<31) | " << LongEncodingTable.get(TypeSig) << ", ";
564   }
565 
566   OS << "0\n};\n\n";
567 
568   // Emit the shared table of register lists.
569   OS << "static const unsigned char IIT_LongEncodingTable[] = {\n";
570   if (!LongEncodingTable.empty())
571     LongEncodingTable.emit(OS, printIITEntry);
572   OS << "  255\n};\n\n";
573 
574   OS << "#endif\n\n";  // End of GET_INTRINSIC_GENERATOR_GLOBAL
575 }
576 
577 namespace {
578 struct AttributeComparator {
579   bool operator()(const CodeGenIntrinsic *L, const CodeGenIntrinsic *R) const {
580     // Sort throwing intrinsics after non-throwing intrinsics.
581     if (L->canThrow != R->canThrow)
582       return R->canThrow;
583 
584     if (L->isNoDuplicate != R->isNoDuplicate)
585       return R->isNoDuplicate;
586 
587     if (L->isNoMerge != R->isNoMerge)
588       return R->isNoMerge;
589 
590     if (L->isNoReturn != R->isNoReturn)
591       return R->isNoReturn;
592 
593     if (L->isNoSync != R->isNoSync)
594       return R->isNoSync;
595 
596     if (L->isNoFree != R->isNoFree)
597       return R->isNoFree;
598 
599     if (L->isWillReturn != R->isWillReturn)
600       return R->isWillReturn;
601 
602     if (L->isCold != R->isCold)
603       return R->isCold;
604 
605     if (L->isConvergent != R->isConvergent)
606       return R->isConvergent;
607 
608     if (L->isSpeculatable != R->isSpeculatable)
609       return R->isSpeculatable;
610 
611     if (L->hasSideEffects != R->hasSideEffects)
612       return R->hasSideEffects;
613 
614     // Try to order by readonly/readnone attribute.
615     CodeGenIntrinsic::ModRefBehavior LK = L->ModRef;
616     CodeGenIntrinsic::ModRefBehavior RK = R->ModRef;
617     if (LK != RK) return (LK > RK);
618     // Order by argument attributes.
619     // This is reliable because each side is already sorted internally.
620     return (L->ArgumentAttributes < R->ArgumentAttributes);
621   }
622 };
623 } // End anonymous namespace
624 
625 /// EmitAttributes - This emits the Intrinsic::getAttributes method.
626 void IntrinsicEmitter::EmitAttributes(const CodeGenIntrinsicTable &Ints,
627                                       raw_ostream &OS) {
628   OS << "// Add parameter attributes that are not common to all intrinsics.\n";
629   OS << "#ifdef GET_INTRINSIC_ATTRIBUTES\n";
630   OS << "AttributeList Intrinsic::getAttributes(LLVMContext &C, ID id) {\n";
631 
632   // Compute the maximum number of attribute arguments and the map
633   typedef std::map<const CodeGenIntrinsic*, unsigned,
634                    AttributeComparator> UniqAttrMapTy;
635   UniqAttrMapTy UniqAttributes;
636   unsigned maxArgAttrs = 0;
637   unsigned AttrNum = 0;
638   for (unsigned i = 0, e = Ints.size(); i != e; ++i) {
639     const CodeGenIntrinsic &intrinsic = Ints[i];
640     maxArgAttrs =
641       std::max(maxArgAttrs, unsigned(intrinsic.ArgumentAttributes.size()));
642     unsigned &N = UniqAttributes[&intrinsic];
643     if (N) continue;
644     N = ++AttrNum;
645     assert(N < 65536 && "Too many unique attributes for table!");
646   }
647 
648   // Emit an array of AttributeList.  Most intrinsics will have at least one
649   // entry, for the function itself (index ~1), which is usually nounwind.
650   OS << "  static const uint16_t IntrinsicsToAttributesMap[] = {\n";
651 
652   for (unsigned i = 0, e = Ints.size(); i != e; ++i) {
653     const CodeGenIntrinsic &intrinsic = Ints[i];
654 
655     OS << "    " << UniqAttributes[&intrinsic] << ", // "
656        << intrinsic.Name << "\n";
657   }
658   OS << "  };\n\n";
659 
660   OS << "  AttributeList AS[" << maxArgAttrs + 1 << "];\n";
661   OS << "  unsigned NumAttrs = 0;\n";
662   OS << "  if (id != 0) {\n";
663   OS << "    switch(IntrinsicsToAttributesMap[id - 1]) {\n";
664   OS << "    default: llvm_unreachable(\"Invalid attribute number\");\n";
665   for (auto UniqAttribute : UniqAttributes) {
666     OS << "    case " << UniqAttribute.second << ": {\n";
667 
668     const CodeGenIntrinsic &Intrinsic = *(UniqAttribute.first);
669 
670     // Keep track of the number of attributes we're writing out.
671     unsigned numAttrs = 0;
672 
673     // The argument attributes are alreadys sorted by argument index.
674     unsigned Ai = 0, Ae = Intrinsic.ArgumentAttributes.size();
675     if (Ae) {
676       while (Ai != Ae) {
677         unsigned AttrIdx = Intrinsic.ArgumentAttributes[Ai].Index;
678 
679         OS << "      const Attribute::AttrKind AttrParam" << AttrIdx << "[]= {";
680         ListSeparator LS(",");
681 
682         bool AllValuesAreZero = true;
683         SmallVector<uint64_t, 8> Values;
684         do {
685           switch (Intrinsic.ArgumentAttributes[Ai].Kind) {
686           case CodeGenIntrinsic::NoCapture:
687             OS << LS << "Attribute::NoCapture";
688             break;
689           case CodeGenIntrinsic::NoAlias:
690             OS << LS << "Attribute::NoAlias";
691             break;
692           case CodeGenIntrinsic::NoUndef:
693             OS << LS << "Attribute::NoUndef";
694             break;
695           case CodeGenIntrinsic::Returned:
696             OS << LS << "Attribute::Returned";
697             break;
698           case CodeGenIntrinsic::ReadOnly:
699             OS << LS << "Attribute::ReadOnly";
700             break;
701           case CodeGenIntrinsic::WriteOnly:
702             OS << LS << "Attribute::WriteOnly";
703             break;
704           case CodeGenIntrinsic::ReadNone:
705             OS << LS << "Attribute::ReadNone";
706             break;
707           case CodeGenIntrinsic::ImmArg:
708             OS << LS << "Attribute::ImmArg";
709             break;
710           case CodeGenIntrinsic::Alignment:
711             OS << LS << "Attribute::Alignment";
712             break;
713           }
714           uint64_t V = Intrinsic.ArgumentAttributes[Ai].Value;
715           Values.push_back(V);
716           AllValuesAreZero &= (V == 0);
717 
718           ++Ai;
719         } while (Ai != Ae && Intrinsic.ArgumentAttributes[Ai].Index == AttrIdx);
720         OS << "};\n";
721 
722         // Generate attribute value array if not all attribute values are zero.
723         if (!AllValuesAreZero) {
724           OS << "      const uint64_t AttrValParam" << AttrIdx << "[]= {";
725           ListSeparator LSV(",");
726           for (const auto V : Values)
727             OS << LSV << V;
728           OS << "};\n";
729         }
730 
731         OS << "      AS[" << numAttrs++ << "] = AttributeList::get(C, "
732            << AttrIdx << ", AttrParam" << AttrIdx;
733         if (!AllValuesAreZero)
734           OS << ", AttrValParam" << AttrIdx;
735         OS << ");\n";
736       }
737     }
738 
739     if (!Intrinsic.canThrow ||
740         (Intrinsic.ModRef != CodeGenIntrinsic::ReadWriteMem &&
741          !Intrinsic.hasSideEffects) ||
742         Intrinsic.isNoReturn || Intrinsic.isNoSync || Intrinsic.isNoFree ||
743         Intrinsic.isWillReturn || Intrinsic.isCold || Intrinsic.isNoDuplicate ||
744         Intrinsic.isNoMerge || Intrinsic.isConvergent ||
745         Intrinsic.isSpeculatable) {
746       OS << "      const Attribute::AttrKind Atts[] = {";
747       ListSeparator LS(",");
748       if (!Intrinsic.canThrow)
749         OS << LS << "Attribute::NoUnwind";
750       if (Intrinsic.isNoReturn)
751         OS << LS << "Attribute::NoReturn";
752       if (Intrinsic.isNoSync)
753         OS << LS << "Attribute::NoSync";
754       if (Intrinsic.isNoFree)
755         OS << LS << "Attribute::NoFree";
756       if (Intrinsic.isWillReturn)
757         OS << LS << "Attribute::WillReturn";
758       if (Intrinsic.isCold)
759         OS << LS << "Attribute::Cold";
760       if (Intrinsic.isNoDuplicate)
761         OS << LS << "Attribute::NoDuplicate";
762       if (Intrinsic.isNoMerge)
763         OS << LS << "Attribute::NoMerge";
764       if (Intrinsic.isConvergent)
765         OS << LS << "Attribute::Convergent";
766       if (Intrinsic.isSpeculatable)
767         OS << LS << "Attribute::Speculatable";
768 
769       switch (Intrinsic.ModRef) {
770       case CodeGenIntrinsic::NoMem:
771         if (Intrinsic.hasSideEffects)
772           break;
773         OS << LS;
774         OS << "Attribute::ReadNone";
775         break;
776       case CodeGenIntrinsic::ReadArgMem:
777         OS << LS;
778         OS << "Attribute::ReadOnly,";
779         OS << "Attribute::ArgMemOnly";
780         break;
781       case CodeGenIntrinsic::ReadMem:
782         OS << LS;
783         OS << "Attribute::ReadOnly";
784         break;
785       case CodeGenIntrinsic::ReadInaccessibleMem:
786         OS << LS;
787         OS << "Attribute::ReadOnly,";
788         OS << "Attribute::InaccessibleMemOnly";
789         break;
790       case CodeGenIntrinsic::ReadInaccessibleMemOrArgMem:
791         OS << LS;
792         OS << "Attribute::ReadOnly,";
793         OS << "Attribute::InaccessibleMemOrArgMemOnly";
794         break;
795       case CodeGenIntrinsic::WriteArgMem:
796         OS << LS;
797         OS << "Attribute::WriteOnly,";
798         OS << "Attribute::ArgMemOnly";
799         break;
800       case CodeGenIntrinsic::WriteMem:
801         OS << LS;
802         OS << "Attribute::WriteOnly";
803         break;
804       case CodeGenIntrinsic::WriteInaccessibleMem:
805         OS << LS;
806         OS << "Attribute::WriteOnly,";
807         OS << "Attribute::InaccessibleMemOnly";
808         break;
809       case CodeGenIntrinsic::WriteInaccessibleMemOrArgMem:
810         OS << LS;
811         OS << "Attribute::WriteOnly,";
812         OS << "Attribute::InaccessibleMemOrArgMemOnly";
813         break;
814       case CodeGenIntrinsic::ReadWriteArgMem:
815         OS << LS;
816         OS << "Attribute::ArgMemOnly";
817         break;
818       case CodeGenIntrinsic::ReadWriteInaccessibleMem:
819         OS << LS;
820         OS << "Attribute::InaccessibleMemOnly";
821         break;
822       case CodeGenIntrinsic::ReadWriteInaccessibleMemOrArgMem:
823         OS << LS;
824         OS << "Attribute::InaccessibleMemOrArgMemOnly";
825         break;
826       case CodeGenIntrinsic::ReadWriteMem:
827         break;
828       }
829       OS << "};\n";
830       OS << "      AS[" << numAttrs++ << "] = AttributeList::get(C, "
831          << "AttributeList::FunctionIndex, Atts);\n";
832     }
833 
834     if (numAttrs) {
835       OS << "      NumAttrs = " << numAttrs << ";\n";
836       OS << "      break;\n";
837       OS << "      }\n";
838     } else {
839       OS << "      return AttributeList();\n";
840       OS << "      }\n";
841     }
842   }
843 
844   OS << "    }\n";
845   OS << "  }\n";
846   OS << "  return AttributeList::get(C, makeArrayRef(AS, NumAttrs));\n";
847   OS << "}\n";
848   OS << "#endif // GET_INTRINSIC_ATTRIBUTES\n\n";
849 }
850 
851 void IntrinsicEmitter::EmitIntrinsicToBuiltinMap(
852     const CodeGenIntrinsicTable &Ints, bool IsGCC, raw_ostream &OS) {
853   StringRef CompilerName = (IsGCC ? "GCC" : "MS");
854   typedef std::map<std::string, std::map<std::string, std::string>> BIMTy;
855   BIMTy BuiltinMap;
856   StringToOffsetTable Table;
857   for (unsigned i = 0, e = Ints.size(); i != e; ++i) {
858     const std::string &BuiltinName =
859         IsGCC ? Ints[i].GCCBuiltinName : Ints[i].MSBuiltinName;
860     if (!BuiltinName.empty()) {
861       // Get the map for this target prefix.
862       std::map<std::string, std::string> &BIM =
863           BuiltinMap[Ints[i].TargetPrefix];
864 
865       if (!BIM.insert(std::make_pair(BuiltinName, Ints[i].EnumName)).second)
866         PrintFatalError(Ints[i].TheDef->getLoc(),
867                         "Intrinsic '" + Ints[i].TheDef->getName() +
868                             "': duplicate " + CompilerName + " builtin name!");
869       Table.GetOrAddStringOffset(BuiltinName);
870     }
871   }
872 
873   OS << "// Get the LLVM intrinsic that corresponds to a builtin.\n";
874   OS << "// This is used by the C front-end.  The builtin name is passed\n";
875   OS << "// in as BuiltinName, and a target prefix (e.g. 'ppc') is passed\n";
876   OS << "// in as TargetPrefix.  The result is assigned to 'IntrinsicID'.\n";
877   OS << "#ifdef GET_LLVM_INTRINSIC_FOR_" << CompilerName << "_BUILTIN\n";
878 
879   OS << "Intrinsic::ID Intrinsic::getIntrinsicFor" << CompilerName
880      << "Builtin(const char "
881      << "*TargetPrefixStr, StringRef BuiltinNameStr) {\n";
882 
883   if (Table.Empty()) {
884     OS << "  return Intrinsic::not_intrinsic;\n";
885     OS << "}\n";
886     OS << "#endif\n\n";
887     return;
888   }
889 
890   OS << "  static const char BuiltinNames[] = {\n";
891   Table.EmitCharArray(OS);
892   OS << "  };\n\n";
893 
894   OS << "  struct BuiltinEntry {\n";
895   OS << "    Intrinsic::ID IntrinID;\n";
896   OS << "    unsigned StrTabOffset;\n";
897   OS << "    const char *getName() const {\n";
898   OS << "      return &BuiltinNames[StrTabOffset];\n";
899   OS << "    }\n";
900   OS << "    bool operator<(StringRef RHS) const {\n";
901   OS << "      return strncmp(getName(), RHS.data(), RHS.size()) < 0;\n";
902   OS << "    }\n";
903   OS << "  };\n";
904 
905   OS << "  StringRef TargetPrefix(TargetPrefixStr);\n\n";
906 
907   // Note: this could emit significantly better code if we cared.
908   for (auto &I : BuiltinMap) {
909     OS << "  ";
910     if (!I.first.empty())
911       OS << "if (TargetPrefix == \"" << I.first << "\") ";
912     else
913       OS << "/* Target Independent Builtins */ ";
914     OS << "{\n";
915 
916     // Emit the comparisons for this target prefix.
917     OS << "    static const BuiltinEntry " << I.first << "Names[] = {\n";
918     for (const auto &P : I.second) {
919       OS << "      {Intrinsic::" << P.second << ", "
920          << Table.GetOrAddStringOffset(P.first) << "}, // " << P.first << "\n";
921     }
922     OS << "    };\n";
923     OS << "    auto I = std::lower_bound(std::begin(" << I.first << "Names),\n";
924     OS << "                              std::end(" << I.first << "Names),\n";
925     OS << "                              BuiltinNameStr);\n";
926     OS << "    if (I != std::end(" << I.first << "Names) &&\n";
927     OS << "        I->getName() == BuiltinNameStr)\n";
928     OS << "      return I->IntrinID;\n";
929     OS << "  }\n";
930   }
931   OS << "  return ";
932   OS << "Intrinsic::not_intrinsic;\n";
933   OS << "}\n";
934   OS << "#endif\n\n";
935 }
936 
937 void llvm::EmitIntrinsicEnums(RecordKeeper &RK, raw_ostream &OS) {
938   IntrinsicEmitter(RK).run(OS, /*Enums=*/true);
939 }
940 
941 void llvm::EmitIntrinsicImpl(RecordKeeper &RK, raw_ostream &OS) {
942   IntrinsicEmitter(RK).run(OS, /*Enums=*/false);
943 }
944