1 //===- X86DisassemblerTables.cpp - Disassembler tables ----------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file is part of the X86 Disassembler Emitter. 10 // It contains the implementation of the disassembler tables. 11 // Documentation for the disassembler emitter in general can be found in 12 // X86DisassemblerEmitter.h. 13 // 14 //===----------------------------------------------------------------------===// 15 16 #include "X86DisassemblerTables.h" 17 #include "X86DisassemblerShared.h" 18 #include "X86ModRMFilters.h" 19 #include "llvm/ADT/STLArrayExtras.h" 20 #include "llvm/ADT/SmallVector.h" 21 #include "llvm/Support/ErrorHandling.h" 22 #include "llvm/Support/Format.h" 23 #include "llvm/Support/raw_ostream.h" 24 #include <map> 25 26 using namespace llvm; 27 using namespace X86Disassembler; 28 29 /// stringForContext - Returns a string containing the name of a particular 30 /// InstructionContext, usually for diagnostic purposes. 31 /// 32 /// @param insnContext - The instruction class to transform to a string. 33 /// @return - A statically-allocated string constant that contains the 34 /// name of the instruction class. 35 static inline const char* stringForContext(InstructionContext insnContext) { 36 switch (insnContext) { 37 default: 38 llvm_unreachable("Unhandled instruction class"); 39 #define ENUM_ENTRY(n, r, d) case n: return #n; break; 40 #define ENUM_ENTRY_K_B(n, r, d) ENUM_ENTRY(n, r, d) ENUM_ENTRY(n##_K_B, r, d)\ 41 ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d)\ 42 ENUM_ENTRY(n##_KZ_B, r, d) 43 INSTRUCTION_CONTEXTS 44 #undef ENUM_ENTRY 45 #undef ENUM_ENTRY_K_B 46 } 47 } 48 49 /// stringForOperandType - Like stringForContext, but for OperandTypes. 50 static inline const char* stringForOperandType(OperandType type) { 51 switch (type) { 52 default: 53 llvm_unreachable("Unhandled type"); 54 #define ENUM_ENTRY(i, d) case i: return #i; 55 TYPES 56 #undef ENUM_ENTRY 57 } 58 } 59 60 /// stringForOperandEncoding - like stringForContext, but for 61 /// OperandEncodings. 62 static inline const char* stringForOperandEncoding(OperandEncoding encoding) { 63 switch (encoding) { 64 default: 65 llvm_unreachable("Unhandled encoding"); 66 #define ENUM_ENTRY(i, d) case i: return #i; 67 ENCODINGS 68 #undef ENUM_ENTRY 69 } 70 } 71 72 /// inheritsFrom - Indicates whether all instructions in one class also belong 73 /// to another class. 74 /// 75 /// @param child - The class that may be the subset 76 /// @param parent - The class that may be the superset 77 /// @return - True if child is a subset of parent, false otherwise. 78 static inline bool inheritsFrom(InstructionContext child, 79 InstructionContext parent, bool noPrefix = true, 80 bool VEX_LIG = false, bool VEX_WIG = false, 81 bool AdSize64 = false) { 82 if (child == parent) 83 return true; 84 85 switch (parent) { 86 case IC: 87 return(inheritsFrom(child, IC_64BIT, AdSize64) || 88 (noPrefix && inheritsFrom(child, IC_OPSIZE, noPrefix)) || 89 inheritsFrom(child, IC_ADSIZE) || 90 (noPrefix && inheritsFrom(child, IC_XD, noPrefix)) || 91 (noPrefix && inheritsFrom(child, IC_XS, noPrefix))); 92 case IC_64BIT: 93 return(inheritsFrom(child, IC_64BIT_REXW) || 94 (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE, noPrefix)) || 95 (!AdSize64 && inheritsFrom(child, IC_64BIT_ADSIZE)) || 96 (noPrefix && inheritsFrom(child, IC_64BIT_XD, noPrefix)) || 97 (noPrefix && inheritsFrom(child, IC_64BIT_XS, noPrefix))); 98 case IC_OPSIZE: 99 return inheritsFrom(child, IC_64BIT_OPSIZE) || 100 inheritsFrom(child, IC_OPSIZE_ADSIZE); 101 case IC_ADSIZE: 102 return (noPrefix && inheritsFrom(child, IC_OPSIZE_ADSIZE, noPrefix)); 103 case IC_OPSIZE_ADSIZE: 104 return false; 105 case IC_64BIT_ADSIZE: 106 return (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE, noPrefix)); 107 case IC_64BIT_OPSIZE_ADSIZE: 108 return false; 109 case IC_XD: 110 return inheritsFrom(child, IC_64BIT_XD); 111 case IC_XS: 112 return inheritsFrom(child, IC_64BIT_XS); 113 case IC_XD_OPSIZE: 114 return inheritsFrom(child, IC_64BIT_XD_OPSIZE); 115 case IC_XS_OPSIZE: 116 return inheritsFrom(child, IC_64BIT_XS_OPSIZE); 117 case IC_XD_ADSIZE: 118 return inheritsFrom(child, IC_64BIT_XD_ADSIZE); 119 case IC_XS_ADSIZE: 120 return inheritsFrom(child, IC_64BIT_XS_ADSIZE); 121 case IC_64BIT_REXW: 122 return((noPrefix && inheritsFrom(child, IC_64BIT_REXW_XS, noPrefix)) || 123 (noPrefix && inheritsFrom(child, IC_64BIT_REXW_XD, noPrefix)) || 124 (noPrefix && inheritsFrom(child, IC_64BIT_REXW_OPSIZE, noPrefix)) || 125 (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE))); 126 case IC_64BIT_OPSIZE: 127 return inheritsFrom(child, IC_64BIT_REXW_OPSIZE) || 128 (!AdSize64 && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE)) || 129 (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE)); 130 case IC_64BIT_XD: 131 return(inheritsFrom(child, IC_64BIT_REXW_XD) || 132 (!AdSize64 && inheritsFrom(child, IC_64BIT_XD_ADSIZE))); 133 case IC_64BIT_XS: 134 return(inheritsFrom(child, IC_64BIT_REXW_XS) || 135 (!AdSize64 && inheritsFrom(child, IC_64BIT_XS_ADSIZE))); 136 case IC_64BIT_XD_OPSIZE: 137 case IC_64BIT_XS_OPSIZE: 138 return false; 139 case IC_64BIT_XD_ADSIZE: 140 case IC_64BIT_XS_ADSIZE: 141 return false; 142 case IC_64BIT_REXW_XD: 143 case IC_64BIT_REXW_XS: 144 case IC_64BIT_REXW_OPSIZE: 145 case IC_64BIT_REXW_ADSIZE: 146 return false; 147 case IC_VEX: 148 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W)) || 149 (VEX_WIG && inheritsFrom(child, IC_VEX_W)) || 150 (VEX_LIG && inheritsFrom(child, IC_VEX_L)); 151 case IC_VEX_XS: 152 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XS)) || 153 (VEX_WIG && inheritsFrom(child, IC_VEX_W_XS)) || 154 (VEX_LIG && inheritsFrom(child, IC_VEX_L_XS)); 155 case IC_VEX_XD: 156 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XD)) || 157 (VEX_WIG && inheritsFrom(child, IC_VEX_W_XD)) || 158 (VEX_LIG && inheritsFrom(child, IC_VEX_L_XD)); 159 case IC_VEX_OPSIZE: 160 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE)) || 161 (VEX_WIG && inheritsFrom(child, IC_VEX_W_OPSIZE)) || 162 (VEX_LIG && inheritsFrom(child, IC_VEX_L_OPSIZE)); 163 case IC_VEX_W: 164 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W); 165 case IC_VEX_W_XS: 166 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XS); 167 case IC_VEX_W_XD: 168 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XD); 169 case IC_VEX_W_OPSIZE: 170 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE); 171 case IC_VEX_L: 172 return VEX_WIG && inheritsFrom(child, IC_VEX_L_W); 173 case IC_VEX_L_XS: 174 return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XS); 175 case IC_VEX_L_XD: 176 return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XD); 177 case IC_VEX_L_OPSIZE: 178 return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE); 179 case IC_VEX_L_W: 180 case IC_VEX_L_W_XS: 181 case IC_VEX_L_W_XD: 182 case IC_VEX_L_W_OPSIZE: 183 return false; 184 case IC_EVEX: 185 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W)) || 186 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W)) || 187 (VEX_WIG && inheritsFrom(child, IC_EVEX_W)) || 188 (VEX_LIG && inheritsFrom(child, IC_EVEX_L)) || 189 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2)); 190 case IC_EVEX_XS: 191 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS)) || 192 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS)) || 193 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS)) || 194 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS)) || 195 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS)); 196 case IC_EVEX_XD: 197 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD)) || 198 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD)) || 199 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD)) || 200 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD)) || 201 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD)); 202 case IC_EVEX_OPSIZE: 203 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) || 204 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE)) || 205 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE)) || 206 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE)) || 207 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE)); 208 case IC_EVEX_K: 209 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K)) || 210 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K)) || 211 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_K)) || 212 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K)) || 213 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K)); 214 case IC_EVEX_XS_K: 215 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) || 216 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K)) || 217 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_K)) || 218 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K)) || 219 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K)); 220 case IC_EVEX_XD_K: 221 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) || 222 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K)) || 223 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_K)) || 224 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K)) || 225 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K)); 226 case IC_EVEX_OPSIZE_K: 227 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) || 228 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K)) || 229 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K)) || 230 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K)) || 231 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K)); 232 case IC_EVEX_KZ: 233 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) || 234 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ)) || 235 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_KZ)) || 236 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ)) || 237 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ)); 238 case IC_EVEX_XS_KZ: 239 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) || 240 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ)) || 241 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ)) || 242 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ)) || 243 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ)); 244 case IC_EVEX_XD_KZ: 245 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) || 246 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ)) || 247 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ)) || 248 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ)) || 249 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ)); 250 case IC_EVEX_OPSIZE_KZ: 251 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) || 252 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ)) || 253 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ)) || 254 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ)) || 255 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ)); 256 case IC_EVEX_W: 257 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W)) || 258 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W)); 259 case IC_EVEX_W_XS: 260 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS)) || 261 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS)); 262 case IC_EVEX_W_XD: 263 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD)) || 264 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD)); 265 case IC_EVEX_W_OPSIZE: 266 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) || 267 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE)); 268 case IC_EVEX_W_K: 269 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K)) || 270 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K)); 271 case IC_EVEX_W_XS_K: 272 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) || 273 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K)); 274 case IC_EVEX_W_XD_K: 275 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) || 276 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K)); 277 case IC_EVEX_W_OPSIZE_K: 278 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) || 279 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K)); 280 case IC_EVEX_W_KZ: 281 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) || 282 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ)); 283 case IC_EVEX_W_XS_KZ: 284 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) || 285 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ)); 286 case IC_EVEX_W_XD_KZ: 287 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) || 288 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ)); 289 case IC_EVEX_W_OPSIZE_KZ: 290 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) || 291 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ)); 292 case IC_EVEX_L: 293 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W); 294 case IC_EVEX_L_XS: 295 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS); 296 case IC_EVEX_L_XD: 297 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD); 298 case IC_EVEX_L_OPSIZE: 299 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE); 300 case IC_EVEX_L_K: 301 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K); 302 case IC_EVEX_L_XS_K: 303 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K); 304 case IC_EVEX_L_XD_K: 305 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K); 306 case IC_EVEX_L_OPSIZE_K: 307 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K); 308 case IC_EVEX_L_KZ: 309 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ); 310 case IC_EVEX_L_XS_KZ: 311 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ); 312 case IC_EVEX_L_XD_KZ: 313 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ); 314 case IC_EVEX_L_OPSIZE_KZ: 315 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ); 316 case IC_EVEX_L_W: 317 case IC_EVEX_L_W_XS: 318 case IC_EVEX_L_W_XD: 319 case IC_EVEX_L_W_OPSIZE: 320 return false; 321 case IC_EVEX_L_W_K: 322 case IC_EVEX_L_W_XS_K: 323 case IC_EVEX_L_W_XD_K: 324 case IC_EVEX_L_W_OPSIZE_K: 325 return false; 326 case IC_EVEX_L_W_KZ: 327 case IC_EVEX_L_W_XS_KZ: 328 case IC_EVEX_L_W_XD_KZ: 329 case IC_EVEX_L_W_OPSIZE_KZ: 330 return false; 331 case IC_EVEX_L2: 332 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W); 333 case IC_EVEX_L2_XS: 334 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS); 335 case IC_EVEX_L2_XD: 336 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD); 337 case IC_EVEX_L2_OPSIZE: 338 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE); 339 case IC_EVEX_L2_K: 340 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K); 341 case IC_EVEX_L2_XS_K: 342 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K); 343 case IC_EVEX_L2_XD_K: 344 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K); 345 case IC_EVEX_L2_OPSIZE_K: 346 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K); 347 case IC_EVEX_L2_KZ: 348 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ); 349 case IC_EVEX_L2_XS_KZ: 350 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ); 351 case IC_EVEX_L2_XD_KZ: 352 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ); 353 case IC_EVEX_L2_OPSIZE_KZ: 354 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ); 355 case IC_EVEX_L2_W: 356 case IC_EVEX_L2_W_XS: 357 case IC_EVEX_L2_W_XD: 358 case IC_EVEX_L2_W_OPSIZE: 359 return false; 360 case IC_EVEX_L2_W_K: 361 case IC_EVEX_L2_W_XS_K: 362 case IC_EVEX_L2_W_XD_K: 363 case IC_EVEX_L2_W_OPSIZE_K: 364 return false; 365 case IC_EVEX_L2_W_KZ: 366 case IC_EVEX_L2_W_XS_KZ: 367 case IC_EVEX_L2_W_XD_KZ: 368 case IC_EVEX_L2_W_OPSIZE_KZ: 369 return false; 370 case IC_EVEX_B: 371 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_B)) || 372 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_B)) || 373 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_B)) || 374 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_B)) || 375 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_B)); 376 case IC_EVEX_XS_B: 377 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) || 378 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B)) || 379 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_B)) || 380 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_B)) || 381 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_B)); 382 case IC_EVEX_XD_B: 383 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) || 384 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B)) || 385 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_B)) || 386 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_B)) || 387 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_B)); 388 case IC_EVEX_OPSIZE_B: 389 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) || 390 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B)) || 391 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_B)) || 392 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_B)) || 393 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_B)); 394 case IC_EVEX_K_B: 395 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) || 396 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B)) || 397 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_K_B)) || 398 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K_B)) || 399 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K_B)); 400 case IC_EVEX_XS_K_B: 401 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) || 402 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B)) || 403 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_K_B)) || 404 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K_B)) || 405 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K_B)); 406 case IC_EVEX_XD_K_B: 407 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) || 408 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B)) || 409 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_K_B)) || 410 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K_B)) || 411 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K_B)); 412 case IC_EVEX_OPSIZE_K_B: 413 return (VEX_LIG && VEX_WIG && 414 inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) || 415 (VEX_LIG && VEX_WIG && 416 inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B)) || 417 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K_B)) || 418 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K_B)) || 419 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K_B)); 420 case IC_EVEX_KZ_B: 421 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) || 422 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B)) || 423 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_KZ_B)) || 424 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ_B)) || 425 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ_B)); 426 case IC_EVEX_XS_KZ_B: 427 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) || 428 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B)) || 429 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ_B)) || 430 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ_B)) || 431 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ_B)); 432 case IC_EVEX_XD_KZ_B: 433 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) || 434 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B)) || 435 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ_B)) || 436 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ_B)) || 437 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ_B)); 438 case IC_EVEX_OPSIZE_KZ_B: 439 return (VEX_LIG && VEX_WIG && 440 inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) || 441 (VEX_LIG && VEX_WIG && 442 inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B)) || 443 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ_B)) || 444 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ_B)) || 445 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ_B)); 446 case IC_EVEX_W_B: 447 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_B)) || 448 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_B)); 449 case IC_EVEX_W_XS_B: 450 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) || 451 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B)); 452 case IC_EVEX_W_XD_B: 453 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) || 454 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B)); 455 case IC_EVEX_W_OPSIZE_B: 456 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) || 457 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B)); 458 case IC_EVEX_W_K_B: 459 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) || 460 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K_B)); 461 case IC_EVEX_W_XS_K_B: 462 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) || 463 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B)); 464 case IC_EVEX_W_XD_K_B: 465 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) || 466 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B)); 467 case IC_EVEX_W_OPSIZE_K_B: 468 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) || 469 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B)); 470 case IC_EVEX_W_KZ_B: 471 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) || 472 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B)); 473 case IC_EVEX_W_XS_KZ_B: 474 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) || 475 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B)); 476 case IC_EVEX_W_XD_KZ_B: 477 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) || 478 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B)); 479 case IC_EVEX_W_OPSIZE_KZ_B: 480 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) || 481 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B)); 482 case IC_EVEX_L_B: 483 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_B); 484 case IC_EVEX_L_XS_B: 485 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B); 486 case IC_EVEX_L_XD_B: 487 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B); 488 case IC_EVEX_L_OPSIZE_B: 489 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B); 490 case IC_EVEX_L_K_B: 491 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K_B); 492 case IC_EVEX_L_XS_K_B: 493 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B); 494 case IC_EVEX_L_XD_K_B: 495 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B); 496 case IC_EVEX_L_OPSIZE_K_B: 497 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B); 498 case IC_EVEX_L_KZ_B: 499 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B); 500 case IC_EVEX_L_XS_KZ_B: 501 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B); 502 case IC_EVEX_L_XD_KZ_B: 503 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B); 504 case IC_EVEX_L_OPSIZE_KZ_B: 505 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B); 506 case IC_EVEX_L_W_B: 507 case IC_EVEX_L_W_XS_B: 508 case IC_EVEX_L_W_XD_B: 509 case IC_EVEX_L_W_OPSIZE_B: 510 return false; 511 case IC_EVEX_L_W_K_B: 512 case IC_EVEX_L_W_XS_K_B: 513 case IC_EVEX_L_W_XD_K_B: 514 case IC_EVEX_L_W_OPSIZE_K_B: 515 return false; 516 case IC_EVEX_L_W_KZ_B: 517 case IC_EVEX_L_W_XS_KZ_B: 518 case IC_EVEX_L_W_XD_KZ_B: 519 case IC_EVEX_L_W_OPSIZE_KZ_B: 520 return false; 521 case IC_EVEX_L2_B: 522 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_B); 523 case IC_EVEX_L2_XS_B: 524 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B); 525 case IC_EVEX_L2_XD_B: 526 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B); 527 case IC_EVEX_L2_OPSIZE_B: 528 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B); 529 case IC_EVEX_L2_K_B: 530 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B); 531 case IC_EVEX_L2_XS_K_B: 532 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B); 533 case IC_EVEX_L2_XD_K_B: 534 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B); 535 case IC_EVEX_L2_OPSIZE_K_B: 536 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B); 537 case IC_EVEX_L2_KZ_B: 538 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B); 539 case IC_EVEX_L2_XS_KZ_B: 540 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B); 541 case IC_EVEX_L2_XD_KZ_B: 542 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B); 543 case IC_EVEX_L2_OPSIZE_KZ_B: 544 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B); 545 case IC_EVEX_L2_W_B: 546 case IC_EVEX_L2_W_XS_B: 547 case IC_EVEX_L2_W_XD_B: 548 case IC_EVEX_L2_W_OPSIZE_B: 549 return false; 550 case IC_EVEX_L2_W_K_B: 551 case IC_EVEX_L2_W_XS_K_B: 552 case IC_EVEX_L2_W_XD_K_B: 553 case IC_EVEX_L2_W_OPSIZE_K_B: 554 return false; 555 case IC_EVEX_L2_W_KZ_B: 556 case IC_EVEX_L2_W_XS_KZ_B: 557 case IC_EVEX_L2_W_XD_KZ_B: 558 case IC_EVEX_L2_W_OPSIZE_KZ_B: 559 return false; 560 default: 561 errs() << "Unknown instruction class: " << 562 stringForContext((InstructionContext)parent) << "\n"; 563 llvm_unreachable("Unknown instruction class"); 564 } 565 } 566 567 /// outranks - Indicates whether, if an instruction has two different applicable 568 /// classes, which class should be preferred when performing decode. This 569 /// imposes a total ordering (ties are resolved toward "lower") 570 /// 571 /// @param upper - The class that may be preferable 572 /// @param lower - The class that may be less preferable 573 /// @return - True if upper is to be preferred, false otherwise. 574 static inline bool outranks(InstructionContext upper, 575 InstructionContext lower) { 576 assert(upper < IC_max); 577 assert(lower < IC_max); 578 579 #define ENUM_ENTRY(n, r, d) r, 580 #define ENUM_ENTRY_K_B(n, r, d) ENUM_ENTRY(n, r, d) \ 581 ENUM_ENTRY(n##_K_B, r, d) ENUM_ENTRY(n##_KZ_B, r, d) \ 582 ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d) 583 static int ranks[IC_max] = { 584 INSTRUCTION_CONTEXTS 585 }; 586 #undef ENUM_ENTRY 587 #undef ENUM_ENTRY_K_B 588 589 return (ranks[upper] > ranks[lower]); 590 } 591 592 /// getDecisionType - Determines whether a ModRM decision with 255 entries can 593 /// be compacted by eliminating redundant information. 594 /// 595 /// @param decision - The decision to be compacted. 596 /// @return - The compactest available representation for the decision. 597 static ModRMDecisionType getDecisionType(ModRMDecision &decision) { 598 bool satisfiesOneEntry = true; 599 bool satisfiesSplitRM = true; 600 bool satisfiesSplitReg = true; 601 bool satisfiesSplitMisc = true; 602 603 for (unsigned index = 0; index < 256; ++index) { 604 if (decision.instructionIDs[index] != decision.instructionIDs[0]) 605 satisfiesOneEntry = false; 606 607 if (((index & 0xc0) == 0xc0) && 608 (decision.instructionIDs[index] != decision.instructionIDs[0xc0])) 609 satisfiesSplitRM = false; 610 611 if (((index & 0xc0) != 0xc0) && 612 (decision.instructionIDs[index] != decision.instructionIDs[0x00])) 613 satisfiesSplitRM = false; 614 615 if (((index & 0xc0) == 0xc0) && 616 (decision.instructionIDs[index] != decision.instructionIDs[index&0xf8])) 617 satisfiesSplitReg = false; 618 619 if (((index & 0xc0) != 0xc0) && 620 (decision.instructionIDs[index] != decision.instructionIDs[index&0x38])) 621 satisfiesSplitMisc = false; 622 } 623 624 if (satisfiesOneEntry) 625 return MODRM_ONEENTRY; 626 627 if (satisfiesSplitRM) 628 return MODRM_SPLITRM; 629 630 if (satisfiesSplitReg && satisfiesSplitMisc) 631 return MODRM_SPLITREG; 632 633 if (satisfiesSplitMisc) 634 return MODRM_SPLITMISC; 635 636 return MODRM_FULL; 637 } 638 639 /// stringForDecisionType - Returns a statically-allocated string corresponding 640 /// to a particular decision type. 641 /// 642 /// @param dt - The decision type. 643 /// @return - A pointer to the statically-allocated string (e.g., 644 /// "MODRM_ONEENTRY" for MODRM_ONEENTRY). 645 static const char* stringForDecisionType(ModRMDecisionType dt) { 646 #define ENUM_ENTRY(n) case n: return #n; 647 switch (dt) { 648 default: 649 llvm_unreachable("Unknown decision type"); 650 MODRMTYPES 651 }; 652 #undef ENUM_ENTRY 653 } 654 655 DisassemblerTables::DisassemblerTables() { 656 for (unsigned i = 0; i < llvm::array_lengthof(Tables); i++) 657 Tables[i] = std::make_unique<ContextDecision>(); 658 659 HasConflicts = false; 660 } 661 662 DisassemblerTables::~DisassemblerTables() { 663 } 664 665 void DisassemblerTables::emitModRMDecision(raw_ostream &o1, raw_ostream &o2, 666 unsigned &i1, unsigned &i2, 667 unsigned &ModRMTableNum, 668 ModRMDecision &decision) const { 669 static uint32_t sEntryNumber = 1; 670 ModRMDecisionType dt = getDecisionType(decision); 671 672 if (dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0) { 673 // Empty table. 674 o2 << "{" << stringForDecisionType(dt) << ", 0}"; 675 return; 676 } 677 678 std::vector<unsigned> ModRMDecision; 679 680 switch (dt) { 681 default: 682 llvm_unreachable("Unknown decision type"); 683 case MODRM_ONEENTRY: 684 ModRMDecision.push_back(decision.instructionIDs[0]); 685 break; 686 case MODRM_SPLITRM: 687 ModRMDecision.push_back(decision.instructionIDs[0x00]); 688 ModRMDecision.push_back(decision.instructionIDs[0xc0]); 689 break; 690 case MODRM_SPLITREG: 691 for (unsigned index = 0; index < 64; index += 8) 692 ModRMDecision.push_back(decision.instructionIDs[index]); 693 for (unsigned index = 0xc0; index < 256; index += 8) 694 ModRMDecision.push_back(decision.instructionIDs[index]); 695 break; 696 case MODRM_SPLITMISC: 697 for (unsigned index = 0; index < 64; index += 8) 698 ModRMDecision.push_back(decision.instructionIDs[index]); 699 for (unsigned index = 0xc0; index < 256; ++index) 700 ModRMDecision.push_back(decision.instructionIDs[index]); 701 break; 702 case MODRM_FULL: 703 for (unsigned short InstructionID : decision.instructionIDs) 704 ModRMDecision.push_back(InstructionID); 705 break; 706 } 707 708 unsigned &EntryNumber = ModRMTable[ModRMDecision]; 709 if (EntryNumber == 0) { 710 EntryNumber = ModRMTableNum; 711 712 ModRMTableNum += ModRMDecision.size(); 713 o1 << "/*Table" << EntryNumber << "*/\n"; 714 i1++; 715 for (unsigned I : ModRMDecision) { 716 o1.indent(i1 * 2) << format("0x%hx", I) << ", /*" 717 << InstructionSpecifiers[I].name << "*/\n"; 718 } 719 i1--; 720 } 721 722 o2 << "{" << stringForDecisionType(dt) << ", " << EntryNumber << "}"; 723 724 switch (dt) { 725 default: 726 llvm_unreachable("Unknown decision type"); 727 case MODRM_ONEENTRY: 728 sEntryNumber += 1; 729 break; 730 case MODRM_SPLITRM: 731 sEntryNumber += 2; 732 break; 733 case MODRM_SPLITREG: 734 sEntryNumber += 16; 735 break; 736 case MODRM_SPLITMISC: 737 sEntryNumber += 8 + 64; 738 break; 739 case MODRM_FULL: 740 sEntryNumber += 256; 741 break; 742 } 743 744 // We assume that the index can fit into uint16_t. 745 assert(sEntryNumber < 65536U && 746 "Index into ModRMDecision is too large for uint16_t!"); 747 (void)sEntryNumber; 748 } 749 750 void DisassemblerTables::emitOpcodeDecision(raw_ostream &o1, raw_ostream &o2, 751 unsigned &i1, unsigned &i2, 752 unsigned &ModRMTableNum, 753 OpcodeDecision &opDecision) const { 754 o2 << "{"; 755 ++i2; 756 757 unsigned index; 758 for (index = 0; index < 256; ++index) { 759 auto &decision = opDecision.modRMDecisions[index]; 760 ModRMDecisionType dt = getDecisionType(decision); 761 if (!(dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0)) 762 break; 763 } 764 if (index == 256) { 765 // If all 256 entries are MODRM_ONEENTRY, omit output. 766 static_assert(MODRM_ONEENTRY == 0, ""); 767 --i2; 768 o2 << "},\n"; 769 } else { 770 o2 << " /* struct OpcodeDecision */ {\n"; 771 for (index = 0; index < 256; ++index) { 772 o2.indent(i2); 773 774 o2 << "/*0x" << format("%02hhx", index) << "*/"; 775 776 emitModRMDecision(o1, o2, i1, i2, ModRMTableNum, 777 opDecision.modRMDecisions[index]); 778 779 if (index < 255) 780 o2 << ","; 781 782 o2 << "\n"; 783 } 784 o2.indent(i2) << "}\n"; 785 --i2; 786 o2.indent(i2) << "},\n"; 787 } 788 } 789 790 void DisassemblerTables::emitContextDecision(raw_ostream &o1, raw_ostream &o2, 791 unsigned &i1, unsigned &i2, 792 unsigned &ModRMTableNum, 793 ContextDecision &decision, 794 const char* name) const { 795 o2.indent(i2) << "static const struct ContextDecision " << name << " = {{/* opcodeDecisions */\n"; 796 i2++; 797 798 for (unsigned index = 0; index < IC_max; ++index) { 799 o2.indent(i2) << "/*"; 800 o2 << stringForContext((InstructionContext)index); 801 o2 << "*/ "; 802 803 emitOpcodeDecision(o1, o2, i1, i2, ModRMTableNum, 804 decision.opcodeDecisions[index]); 805 } 806 807 i2--; 808 o2.indent(i2) << "}};" << "\n"; 809 } 810 811 void DisassemblerTables::emitInstructionInfo(raw_ostream &o, 812 unsigned &i) const { 813 unsigned NumInstructions = InstructionSpecifiers.size(); 814 815 o << "static const struct OperandSpecifier x86OperandSets[][" 816 << X86_MAX_OPERANDS << "] = {\n"; 817 818 typedef SmallVector<std::pair<OperandEncoding, OperandType>, 819 X86_MAX_OPERANDS> OperandListTy; 820 std::map<OperandListTy, unsigned> OperandSets; 821 822 unsigned OperandSetNum = 0; 823 for (unsigned Index = 0; Index < NumInstructions; ++Index) { 824 OperandListTy OperandList; 825 826 for (auto Operand : InstructionSpecifiers[Index].operands) { 827 OperandEncoding Encoding = (OperandEncoding)Operand.encoding; 828 OperandType Type = (OperandType)Operand.type; 829 OperandList.push_back(std::make_pair(Encoding, Type)); 830 } 831 unsigned &N = OperandSets[OperandList]; 832 if (N != 0) continue; 833 834 N = ++OperandSetNum; 835 836 o << " { /* " << (OperandSetNum - 1) << " */\n"; 837 for (unsigned i = 0, e = OperandList.size(); i != e; ++i) { 838 const char *Encoding = stringForOperandEncoding(OperandList[i].first); 839 const char *Type = stringForOperandType(OperandList[i].second); 840 o << " { " << Encoding << ", " << Type << " },\n"; 841 } 842 o << " },\n"; 843 } 844 o << "};" << "\n\n"; 845 846 o.indent(i * 2) << "static const struct InstructionSpecifier "; 847 o << INSTRUCTIONS_STR "[" << InstructionSpecifiers.size() << "] = {\n"; 848 849 i++; 850 851 for (unsigned index = 0; index < NumInstructions; ++index) { 852 o.indent(i * 2) << "{ /* " << index << " */\n"; 853 i++; 854 855 OperandListTy OperandList; 856 for (auto Operand : InstructionSpecifiers[index].operands) { 857 OperandEncoding Encoding = (OperandEncoding)Operand.encoding; 858 OperandType Type = (OperandType)Operand.type; 859 OperandList.push_back(std::make_pair(Encoding, Type)); 860 } 861 o.indent(i * 2) << (OperandSets[OperandList] - 1) << ",\n"; 862 863 o.indent(i * 2) << "/* " << InstructionSpecifiers[index].name << " */\n"; 864 865 i--; 866 o.indent(i * 2) << "},\n"; 867 } 868 869 i--; 870 o.indent(i * 2) << "};" << "\n"; 871 } 872 873 void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const { 874 o.indent(i * 2) << "static const uint8_t " CONTEXTS_STR 875 "[" << ATTR_max << "] = {\n"; 876 i++; 877 878 for (unsigned index = 0; index < ATTR_max; ++index) { 879 o.indent(i * 2); 880 881 if ((index & ATTR_EVEX) || (index & ATTR_VEX) || (index & ATTR_VEXL)) { 882 if (index & ATTR_EVEX) 883 o << "IC_EVEX"; 884 else 885 o << "IC_VEX"; 886 887 if ((index & ATTR_EVEX) && (index & ATTR_EVEXL2)) 888 o << "_L2"; 889 else if (index & ATTR_VEXL) 890 o << "_L"; 891 892 if (index & ATTR_REXW) 893 o << "_W"; 894 895 if (index & ATTR_OPSIZE) 896 o << "_OPSIZE"; 897 else if (index & ATTR_XD) 898 o << "_XD"; 899 else if (index & ATTR_XS) 900 o << "_XS"; 901 902 if ((index & ATTR_EVEX)) { 903 if (index & ATTR_EVEXKZ) 904 o << "_KZ"; 905 else if (index & ATTR_EVEXK) 906 o << "_K"; 907 908 if (index & ATTR_EVEXB) 909 o << "_B"; 910 } 911 } 912 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XS)) 913 o << "IC_64BIT_REXW_XS"; 914 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD)) 915 o << "IC_64BIT_REXW_XD"; 916 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && 917 (index & ATTR_OPSIZE)) 918 o << "IC_64BIT_REXW_OPSIZE"; 919 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && 920 (index & ATTR_ADSIZE)) 921 o << "IC_64BIT_REXW_ADSIZE"; 922 else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_OPSIZE)) 923 o << "IC_64BIT_XD_OPSIZE"; 924 else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_ADSIZE)) 925 o << "IC_64BIT_XD_ADSIZE"; 926 else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_OPSIZE)) 927 o << "IC_64BIT_XS_OPSIZE"; 928 else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_ADSIZE)) 929 o << "IC_64BIT_XS_ADSIZE"; 930 else if ((index & ATTR_64BIT) && (index & ATTR_XS)) 931 o << "IC_64BIT_XS"; 932 else if ((index & ATTR_64BIT) && (index & ATTR_XD)) 933 o << "IC_64BIT_XD"; 934 else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE) && 935 (index & ATTR_ADSIZE)) 936 o << "IC_64BIT_OPSIZE_ADSIZE"; 937 else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE)) 938 o << "IC_64BIT_OPSIZE"; 939 else if ((index & ATTR_64BIT) && (index & ATTR_ADSIZE)) 940 o << "IC_64BIT_ADSIZE"; 941 else if ((index & ATTR_64BIT) && (index & ATTR_REXW)) 942 o << "IC_64BIT_REXW"; 943 else if ((index & ATTR_64BIT)) 944 o << "IC_64BIT"; 945 else if ((index & ATTR_XS) && (index & ATTR_OPSIZE)) 946 o << "IC_XS_OPSIZE"; 947 else if ((index & ATTR_XD) && (index & ATTR_OPSIZE)) 948 o << "IC_XD_OPSIZE"; 949 else if ((index & ATTR_XS) && (index & ATTR_ADSIZE)) 950 o << "IC_XS_ADSIZE"; 951 else if ((index & ATTR_XD) && (index & ATTR_ADSIZE)) 952 o << "IC_XD_ADSIZE"; 953 else if (index & ATTR_XS) 954 o << "IC_XS"; 955 else if (index & ATTR_XD) 956 o << "IC_XD"; 957 else if ((index & ATTR_OPSIZE) && (index & ATTR_ADSIZE)) 958 o << "IC_OPSIZE_ADSIZE"; 959 else if (index & ATTR_OPSIZE) 960 o << "IC_OPSIZE"; 961 else if (index & ATTR_ADSIZE) 962 o << "IC_ADSIZE"; 963 else 964 o << "IC"; 965 966 o << ", // " << index << "\n"; 967 } 968 969 i--; 970 o.indent(i * 2) << "};" << "\n"; 971 } 972 973 void DisassemblerTables::emitContextDecisions(raw_ostream &o1, raw_ostream &o2, 974 unsigned &i1, unsigned &i2, 975 unsigned &ModRMTableNum) const { 976 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[0], ONEBYTE_STR); 977 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[1], TWOBYTE_STR); 978 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[2], THREEBYTE38_STR); 979 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[3], THREEBYTE3A_STR); 980 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[4], XOP8_MAP_STR); 981 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[5], XOP9_MAP_STR); 982 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[6], XOPA_MAP_STR); 983 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[7], THREEDNOW_MAP_STR); 984 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[8], MAP5_STR); 985 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[9], MAP6_STR); 986 } 987 988 void DisassemblerTables::emit(raw_ostream &o) const { 989 unsigned i1 = 0; 990 unsigned i2 = 0; 991 992 std::string s1; 993 std::string s2; 994 995 raw_string_ostream o1(s1); 996 raw_string_ostream o2(s2); 997 998 emitInstructionInfo(o, i2); 999 o << "\n"; 1000 1001 emitContextTable(o, i2); 1002 o << "\n"; 1003 1004 unsigned ModRMTableNum = 0; 1005 1006 o << "static const InstrUID modRMTable[] = {\n"; 1007 i1++; 1008 std::vector<unsigned> EmptyTable(1, 0); 1009 ModRMTable[EmptyTable] = ModRMTableNum; 1010 ModRMTableNum += EmptyTable.size(); 1011 o1 << "/*EmptyTable*/\n"; 1012 o1.indent(i1 * 2) << "0x0,\n"; 1013 i1--; 1014 emitContextDecisions(o1, o2, i1, i2, ModRMTableNum); 1015 1016 o << o1.str(); 1017 o << " 0x0\n"; 1018 o << "};\n"; 1019 o << "\n"; 1020 o << o2.str(); 1021 o << "\n"; 1022 o << "\n"; 1023 } 1024 1025 void DisassemblerTables::setTableFields(ModRMDecision &decision, 1026 const ModRMFilter &filter, 1027 InstrUID uid, 1028 uint8_t opcode) { 1029 for (unsigned index = 0; index < 256; ++index) { 1030 if (filter.accepts(index)) { 1031 if (decision.instructionIDs[index] == uid) 1032 continue; 1033 1034 if (decision.instructionIDs[index] != 0) { 1035 InstructionSpecifier &newInfo = 1036 InstructionSpecifiers[uid]; 1037 InstructionSpecifier &previousInfo = 1038 InstructionSpecifiers[decision.instructionIDs[index]]; 1039 1040 if(previousInfo.name == "NOOP" && (newInfo.name == "XCHG16ar" || 1041 newInfo.name == "XCHG32ar" || 1042 newInfo.name == "XCHG64ar")) 1043 continue; // special case for XCHG*ar and NOOP 1044 1045 if (outranks(previousInfo.insnContext, newInfo.insnContext)) 1046 continue; 1047 1048 if (previousInfo.insnContext == newInfo.insnContext) { 1049 errs() << "Error: Primary decode conflict: "; 1050 errs() << newInfo.name << " would overwrite " << previousInfo.name; 1051 errs() << "\n"; 1052 errs() << "ModRM " << index << "\n"; 1053 errs() << "Opcode " << (uint16_t)opcode << "\n"; 1054 errs() << "Context " << stringForContext(newInfo.insnContext) << "\n"; 1055 HasConflicts = true; 1056 } 1057 } 1058 1059 decision.instructionIDs[index] = uid; 1060 } 1061 } 1062 } 1063 1064 void DisassemblerTables::setTableFields(OpcodeType type, 1065 InstructionContext insnContext, 1066 uint8_t opcode, 1067 const ModRMFilter &filter, 1068 InstrUID uid, 1069 bool is32bit, 1070 bool noPrefix, 1071 bool ignoresVEX_L, 1072 bool ignoresVEX_W, 1073 unsigned addressSize) { 1074 ContextDecision &decision = *Tables[type]; 1075 1076 for (unsigned index = 0; index < IC_max; ++index) { 1077 if ((is32bit || addressSize == 16) && 1078 inheritsFrom((InstructionContext)index, IC_64BIT)) 1079 continue; 1080 1081 bool adSize64 = addressSize == 64; 1082 if (inheritsFrom((InstructionContext)index, 1083 InstructionSpecifiers[uid].insnContext, noPrefix, 1084 ignoresVEX_L, ignoresVEX_W, adSize64)) 1085 setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode], 1086 filter, 1087 uid, 1088 opcode); 1089 } 1090 } 1091