1 //===- X86DisassemblerTables.cpp - Disassembler tables ----------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file is part of the X86 Disassembler Emitter. 10 // It contains the implementation of the disassembler tables. 11 // Documentation for the disassembler emitter in general can be found in 12 // X86DisassemblerEmitter.h. 13 // 14 //===----------------------------------------------------------------------===// 15 16 #include "X86DisassemblerTables.h" 17 #include "X86DisassemblerShared.h" 18 #include "llvm/ADT/STLExtras.h" 19 #include "llvm/Support/ErrorHandling.h" 20 #include "llvm/Support/Format.h" 21 #include <map> 22 23 using namespace llvm; 24 using namespace X86Disassembler; 25 26 /// stringForContext - Returns a string containing the name of a particular 27 /// InstructionContext, usually for diagnostic purposes. 28 /// 29 /// @param insnContext - The instruction class to transform to a string. 30 /// @return - A statically-allocated string constant that contains the 31 /// name of the instruction class. 32 static inline const char* stringForContext(InstructionContext insnContext) { 33 switch (insnContext) { 34 default: 35 llvm_unreachable("Unhandled instruction class"); 36 #define ENUM_ENTRY(n, r, d) case n: return #n; break; 37 #define ENUM_ENTRY_K_B(n, r, d) ENUM_ENTRY(n, r, d) ENUM_ENTRY(n##_K_B, r, d)\ 38 ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d)\ 39 ENUM_ENTRY(n##_KZ_B, r, d) 40 INSTRUCTION_CONTEXTS 41 #undef ENUM_ENTRY 42 #undef ENUM_ENTRY_K_B 43 } 44 } 45 46 /// stringForOperandType - Like stringForContext, but for OperandTypes. 47 static inline const char* stringForOperandType(OperandType type) { 48 switch (type) { 49 default: 50 llvm_unreachable("Unhandled type"); 51 #define ENUM_ENTRY(i, d) case i: return #i; 52 TYPES 53 #undef ENUM_ENTRY 54 } 55 } 56 57 /// stringForOperandEncoding - like stringForContext, but for 58 /// OperandEncodings. 59 static inline const char* stringForOperandEncoding(OperandEncoding encoding) { 60 switch (encoding) { 61 default: 62 llvm_unreachable("Unhandled encoding"); 63 #define ENUM_ENTRY(i, d) case i: return #i; 64 ENCODINGS 65 #undef ENUM_ENTRY 66 } 67 } 68 69 /// inheritsFrom - Indicates whether all instructions in one class also belong 70 /// to another class. 71 /// 72 /// @param child - The class that may be the subset 73 /// @param parent - The class that may be the superset 74 /// @return - True if child is a subset of parent, false otherwise. 75 static inline bool inheritsFrom(InstructionContext child, 76 InstructionContext parent, bool noPrefix = true, 77 bool VEX_LIG = false, bool VEX_WIG = false, 78 bool AdSize64 = false) { 79 if (child == parent) 80 return true; 81 82 switch (parent) { 83 case IC: 84 return(inheritsFrom(child, IC_64BIT, AdSize64) || 85 (noPrefix && inheritsFrom(child, IC_OPSIZE, noPrefix)) || 86 inheritsFrom(child, IC_ADSIZE) || 87 (noPrefix && inheritsFrom(child, IC_XD, noPrefix)) || 88 (noPrefix && inheritsFrom(child, IC_XS, noPrefix))); 89 case IC_64BIT: 90 return(inheritsFrom(child, IC_64BIT_REXW) || 91 (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE, noPrefix)) || 92 (!AdSize64 && inheritsFrom(child, IC_64BIT_ADSIZE)) || 93 (noPrefix && inheritsFrom(child, IC_64BIT_XD, noPrefix)) || 94 (noPrefix && inheritsFrom(child, IC_64BIT_XS, noPrefix))); 95 case IC_OPSIZE: 96 return inheritsFrom(child, IC_64BIT_OPSIZE) || 97 inheritsFrom(child, IC_OPSIZE_ADSIZE); 98 case IC_ADSIZE: 99 return (noPrefix && inheritsFrom(child, IC_OPSIZE_ADSIZE, noPrefix)); 100 case IC_OPSIZE_ADSIZE: 101 return false; 102 case IC_64BIT_ADSIZE: 103 return (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE, noPrefix)); 104 case IC_64BIT_OPSIZE_ADSIZE: 105 return (noPrefix && 106 inheritsFrom(child, IC_64BIT_VEX_OPSIZE_ADSIZE, noPrefix)); 107 case IC_XD: 108 return inheritsFrom(child, IC_64BIT_XD); 109 case IC_XS: 110 return inheritsFrom(child, IC_64BIT_XS); 111 case IC_XD_OPSIZE: 112 return inheritsFrom(child, IC_64BIT_XD_OPSIZE); 113 case IC_XS_OPSIZE: 114 return inheritsFrom(child, IC_64BIT_XS_OPSIZE); 115 case IC_XD_ADSIZE: 116 return inheritsFrom(child, IC_64BIT_XD_ADSIZE); 117 case IC_XS_ADSIZE: 118 return inheritsFrom(child, IC_64BIT_XS_ADSIZE); 119 case IC_64BIT_REXW: 120 return((noPrefix && inheritsFrom(child, IC_64BIT_REXW_XS, noPrefix)) || 121 (noPrefix && inheritsFrom(child, IC_64BIT_REXW_XD, noPrefix)) || 122 (noPrefix && inheritsFrom(child, IC_64BIT_REXW_OPSIZE, noPrefix)) || 123 (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE))); 124 case IC_64BIT_OPSIZE: 125 return inheritsFrom(child, IC_64BIT_REXW_OPSIZE) || 126 (!AdSize64 && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE)) || 127 (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE)) || 128 (!AdSize64 && inheritsFrom(child, IC_64BIT_VEX_OPSIZE_ADSIZE)); 129 case IC_64BIT_XD: 130 return (inheritsFrom(child, IC_64BIT_REXW_XD) || 131 (!AdSize64 && inheritsFrom(child, IC_64BIT_XD_ADSIZE))); 132 case IC_64BIT_XS: 133 return(inheritsFrom(child, IC_64BIT_REXW_XS) || 134 (!AdSize64 && inheritsFrom(child, IC_64BIT_XS_ADSIZE))); 135 case IC_64BIT_XD_OPSIZE: 136 case IC_64BIT_XS_OPSIZE: 137 return false; 138 case IC_64BIT_XD_ADSIZE: 139 case IC_64BIT_XS_ADSIZE: 140 return false; 141 case IC_64BIT_REXW_XD: 142 case IC_64BIT_REXW_XS: 143 case IC_64BIT_REXW_OPSIZE: 144 case IC_64BIT_REXW_ADSIZE: 145 return false; 146 case IC_VEX: 147 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W)) || 148 (VEX_WIG && inheritsFrom(child, IC_VEX_W)) || 149 (VEX_LIG && inheritsFrom(child, IC_VEX_L)); 150 case IC_VEX_XS: 151 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XS)) || 152 (VEX_WIG && inheritsFrom(child, IC_VEX_W_XS)) || 153 (VEX_LIG && inheritsFrom(child, IC_VEX_L_XS)); 154 case IC_VEX_XD: 155 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XD)) || 156 (VEX_WIG && inheritsFrom(child, IC_VEX_W_XD)) || 157 (VEX_LIG && inheritsFrom(child, IC_VEX_L_XD)); 158 case IC_VEX_OPSIZE: 159 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE)) || 160 (VEX_WIG && inheritsFrom(child, IC_VEX_W_OPSIZE)) || 161 (VEX_LIG && inheritsFrom(child, IC_VEX_L_OPSIZE)) || 162 inheritsFrom(child, IC_64BIT_VEX_OPSIZE); 163 case IC_64BIT_VEX_OPSIZE: 164 return inheritsFrom(child, IC_64BIT_VEX_OPSIZE_ADSIZE); 165 case IC_64BIT_VEX_OPSIZE_ADSIZE: 166 return false; 167 case IC_VEX_W: 168 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W); 169 case IC_VEX_W_XS: 170 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XS); 171 case IC_VEX_W_XD: 172 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XD); 173 case IC_VEX_W_OPSIZE: 174 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE); 175 case IC_VEX_L: 176 return VEX_WIG && inheritsFrom(child, IC_VEX_L_W); 177 case IC_VEX_L_XS: 178 return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XS); 179 case IC_VEX_L_XD: 180 return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XD); 181 case IC_VEX_L_OPSIZE: 182 return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE); 183 case IC_VEX_L_W: 184 case IC_VEX_L_W_XS: 185 case IC_VEX_L_W_XD: 186 case IC_VEX_L_W_OPSIZE: 187 return false; 188 case IC_EVEX: 189 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W)) || 190 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W)) || 191 (VEX_WIG && inheritsFrom(child, IC_EVEX_W)) || 192 (VEX_LIG && inheritsFrom(child, IC_EVEX_L)) || 193 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2)); 194 case IC_EVEX_XS: 195 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS)) || 196 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS)) || 197 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS)) || 198 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS)) || 199 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS)); 200 case IC_EVEX_XD: 201 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD)) || 202 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD)) || 203 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD)) || 204 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD)) || 205 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD)); 206 case IC_EVEX_OPSIZE: 207 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) || 208 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE)) || 209 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE)) || 210 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE)) || 211 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE)); 212 case IC_EVEX_K: 213 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K)) || 214 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K)) || 215 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_K)) || 216 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K)) || 217 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K)); 218 case IC_EVEX_XS_K: 219 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) || 220 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K)) || 221 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_K)) || 222 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K)) || 223 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K)); 224 case IC_EVEX_XD_K: 225 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) || 226 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K)) || 227 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_K)) || 228 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K)) || 229 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K)); 230 case IC_EVEX_OPSIZE_K: 231 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) || 232 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K)) || 233 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K)) || 234 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K)) || 235 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K)); 236 case IC_EVEX_KZ: 237 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) || 238 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ)) || 239 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_KZ)) || 240 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ)) || 241 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ)); 242 case IC_EVEX_XS_KZ: 243 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) || 244 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ)) || 245 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ)) || 246 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ)) || 247 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ)); 248 case IC_EVEX_XD_KZ: 249 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) || 250 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ)) || 251 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ)) || 252 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ)) || 253 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ)); 254 case IC_EVEX_OPSIZE_KZ: 255 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) || 256 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ)) || 257 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ)) || 258 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ)) || 259 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ)); 260 case IC_EVEX_W: 261 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W)) || 262 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W)); 263 case IC_EVEX_W_XS: 264 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS)) || 265 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS)); 266 case IC_EVEX_W_XD: 267 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD)) || 268 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD)); 269 case IC_EVEX_W_OPSIZE: 270 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) || 271 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE)); 272 case IC_EVEX_W_K: 273 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K)) || 274 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K)); 275 case IC_EVEX_W_XS_K: 276 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) || 277 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K)); 278 case IC_EVEX_W_XD_K: 279 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) || 280 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K)); 281 case IC_EVEX_W_OPSIZE_K: 282 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) || 283 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K)); 284 case IC_EVEX_W_KZ: 285 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) || 286 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ)); 287 case IC_EVEX_W_XS_KZ: 288 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) || 289 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ)); 290 case IC_EVEX_W_XD_KZ: 291 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) || 292 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ)); 293 case IC_EVEX_W_OPSIZE_KZ: 294 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) || 295 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ)); 296 case IC_EVEX_L: 297 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W); 298 case IC_EVEX_L_XS: 299 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS); 300 case IC_EVEX_L_XD: 301 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD); 302 case IC_EVEX_L_OPSIZE: 303 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE); 304 case IC_EVEX_L_K: 305 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K); 306 case IC_EVEX_L_XS_K: 307 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K); 308 case IC_EVEX_L_XD_K: 309 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K); 310 case IC_EVEX_L_OPSIZE_K: 311 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K); 312 case IC_EVEX_L_KZ: 313 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ); 314 case IC_EVEX_L_XS_KZ: 315 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ); 316 case IC_EVEX_L_XD_KZ: 317 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ); 318 case IC_EVEX_L_OPSIZE_KZ: 319 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ); 320 case IC_EVEX_L_W: 321 case IC_EVEX_L_W_XS: 322 case IC_EVEX_L_W_XD: 323 case IC_EVEX_L_W_OPSIZE: 324 return false; 325 case IC_EVEX_L_W_K: 326 case IC_EVEX_L_W_XS_K: 327 case IC_EVEX_L_W_XD_K: 328 case IC_EVEX_L_W_OPSIZE_K: 329 return false; 330 case IC_EVEX_L_W_KZ: 331 case IC_EVEX_L_W_XS_KZ: 332 case IC_EVEX_L_W_XD_KZ: 333 case IC_EVEX_L_W_OPSIZE_KZ: 334 return false; 335 case IC_EVEX_L2: 336 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W); 337 case IC_EVEX_L2_XS: 338 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS); 339 case IC_EVEX_L2_XD: 340 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD); 341 case IC_EVEX_L2_OPSIZE: 342 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE); 343 case IC_EVEX_L2_K: 344 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K); 345 case IC_EVEX_L2_XS_K: 346 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K); 347 case IC_EVEX_L2_XD_K: 348 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K); 349 case IC_EVEX_L2_OPSIZE_K: 350 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K); 351 case IC_EVEX_L2_KZ: 352 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ); 353 case IC_EVEX_L2_XS_KZ: 354 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ); 355 case IC_EVEX_L2_XD_KZ: 356 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ); 357 case IC_EVEX_L2_OPSIZE_KZ: 358 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ); 359 case IC_EVEX_L2_W: 360 case IC_EVEX_L2_W_XS: 361 case IC_EVEX_L2_W_XD: 362 case IC_EVEX_L2_W_OPSIZE: 363 return false; 364 case IC_EVEX_L2_W_K: 365 case IC_EVEX_L2_W_XS_K: 366 case IC_EVEX_L2_W_XD_K: 367 case IC_EVEX_L2_W_OPSIZE_K: 368 return false; 369 case IC_EVEX_L2_W_KZ: 370 case IC_EVEX_L2_W_XS_KZ: 371 case IC_EVEX_L2_W_XD_KZ: 372 case IC_EVEX_L2_W_OPSIZE_KZ: 373 return false; 374 case IC_EVEX_B: 375 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_B)) || 376 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_B)) || 377 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_B)) || 378 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_B)) || 379 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_B)); 380 case IC_EVEX_XS_B: 381 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) || 382 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B)) || 383 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_B)) || 384 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_B)) || 385 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_B)); 386 case IC_EVEX_XD_B: 387 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) || 388 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B)) || 389 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_B)) || 390 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_B)) || 391 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_B)); 392 case IC_EVEX_OPSIZE_B: 393 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) || 394 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B)) || 395 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_B)) || 396 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_B)) || 397 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_B)); 398 case IC_EVEX_K_B: 399 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) || 400 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B)) || 401 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_K_B)) || 402 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K_B)) || 403 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K_B)); 404 case IC_EVEX_XS_K_B: 405 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) || 406 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B)) || 407 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_K_B)) || 408 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K_B)) || 409 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K_B)); 410 case IC_EVEX_XD_K_B: 411 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) || 412 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B)) || 413 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_K_B)) || 414 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K_B)) || 415 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K_B)); 416 case IC_EVEX_OPSIZE_K_B: 417 return (VEX_LIG && VEX_WIG && 418 inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) || 419 (VEX_LIG && VEX_WIG && 420 inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B)) || 421 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K_B)) || 422 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K_B)) || 423 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K_B)); 424 case IC_EVEX_KZ_B: 425 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) || 426 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B)) || 427 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_KZ_B)) || 428 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ_B)) || 429 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ_B)); 430 case IC_EVEX_XS_KZ_B: 431 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) || 432 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B)) || 433 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ_B)) || 434 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ_B)) || 435 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ_B)); 436 case IC_EVEX_XD_KZ_B: 437 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) || 438 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B)) || 439 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ_B)) || 440 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ_B)) || 441 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ_B)); 442 case IC_EVEX_OPSIZE_KZ_B: 443 return (VEX_LIG && VEX_WIG && 444 inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) || 445 (VEX_LIG && VEX_WIG && 446 inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B)) || 447 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ_B)) || 448 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ_B)) || 449 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ_B)); 450 case IC_EVEX_W_B: 451 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_B)) || 452 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_B)); 453 case IC_EVEX_W_XS_B: 454 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) || 455 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B)); 456 case IC_EVEX_W_XD_B: 457 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) || 458 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B)); 459 case IC_EVEX_W_OPSIZE_B: 460 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) || 461 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B)); 462 case IC_EVEX_W_K_B: 463 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) || 464 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K_B)); 465 case IC_EVEX_W_XS_K_B: 466 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) || 467 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B)); 468 case IC_EVEX_W_XD_K_B: 469 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) || 470 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B)); 471 case IC_EVEX_W_OPSIZE_K_B: 472 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) || 473 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B)); 474 case IC_EVEX_W_KZ_B: 475 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) || 476 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B)); 477 case IC_EVEX_W_XS_KZ_B: 478 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) || 479 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B)); 480 case IC_EVEX_W_XD_KZ_B: 481 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) || 482 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B)); 483 case IC_EVEX_W_OPSIZE_KZ_B: 484 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) || 485 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B)); 486 case IC_EVEX_L_B: 487 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_B); 488 case IC_EVEX_L_XS_B: 489 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B); 490 case IC_EVEX_L_XD_B: 491 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B); 492 case IC_EVEX_L_OPSIZE_B: 493 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B); 494 case IC_EVEX_L_K_B: 495 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K_B); 496 case IC_EVEX_L_XS_K_B: 497 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B); 498 case IC_EVEX_L_XD_K_B: 499 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B); 500 case IC_EVEX_L_OPSIZE_K_B: 501 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B); 502 case IC_EVEX_L_KZ_B: 503 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B); 504 case IC_EVEX_L_XS_KZ_B: 505 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B); 506 case IC_EVEX_L_XD_KZ_B: 507 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B); 508 case IC_EVEX_L_OPSIZE_KZ_B: 509 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B); 510 case IC_EVEX_L_W_B: 511 case IC_EVEX_L_W_XS_B: 512 case IC_EVEX_L_W_XD_B: 513 case IC_EVEX_L_W_OPSIZE_B: 514 return false; 515 case IC_EVEX_L_W_K_B: 516 case IC_EVEX_L_W_XS_K_B: 517 case IC_EVEX_L_W_XD_K_B: 518 case IC_EVEX_L_W_OPSIZE_K_B: 519 return false; 520 case IC_EVEX_L_W_KZ_B: 521 case IC_EVEX_L_W_XS_KZ_B: 522 case IC_EVEX_L_W_XD_KZ_B: 523 case IC_EVEX_L_W_OPSIZE_KZ_B: 524 return false; 525 case IC_EVEX_L2_B: 526 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_B); 527 case IC_EVEX_L2_XS_B: 528 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B); 529 case IC_EVEX_L2_XD_B: 530 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B); 531 case IC_EVEX_L2_OPSIZE_B: 532 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B); 533 case IC_EVEX_L2_K_B: 534 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B); 535 case IC_EVEX_L2_XS_K_B: 536 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B); 537 case IC_EVEX_L2_XD_K_B: 538 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B); 539 case IC_EVEX_L2_OPSIZE_K_B: 540 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B); 541 case IC_EVEX_L2_KZ_B: 542 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B); 543 case IC_EVEX_L2_XS_KZ_B: 544 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B); 545 case IC_EVEX_L2_XD_KZ_B: 546 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B); 547 case IC_EVEX_L2_OPSIZE_KZ_B: 548 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B); 549 case IC_EVEX_L2_W_B: 550 case IC_EVEX_L2_W_XS_B: 551 case IC_EVEX_L2_W_XD_B: 552 case IC_EVEX_L2_W_OPSIZE_B: 553 return false; 554 case IC_EVEX_L2_W_K_B: 555 case IC_EVEX_L2_W_XS_K_B: 556 case IC_EVEX_L2_W_XD_K_B: 557 case IC_EVEX_L2_W_OPSIZE_K_B: 558 return false; 559 case IC_EVEX_L2_W_KZ_B: 560 case IC_EVEX_L2_W_XS_KZ_B: 561 case IC_EVEX_L2_W_XD_KZ_B: 562 case IC_EVEX_L2_W_OPSIZE_KZ_B: 563 return false; 564 default: 565 errs() << "Unknown instruction class: " << 566 stringForContext((InstructionContext)parent) << "\n"; 567 llvm_unreachable("Unknown instruction class"); 568 } 569 } 570 571 /// outranks - Indicates whether, if an instruction has two different applicable 572 /// classes, which class should be preferred when performing decode. This 573 /// imposes a total ordering (ties are resolved toward "lower") 574 /// 575 /// @param upper - The class that may be preferable 576 /// @param lower - The class that may be less preferable 577 /// @return - True if upper is to be preferred, false otherwise. 578 static inline bool outranks(InstructionContext upper, 579 InstructionContext lower) { 580 assert(upper < IC_max); 581 assert(lower < IC_max); 582 583 #define ENUM_ENTRY(n, r, d) r, 584 #define ENUM_ENTRY_K_B(n, r, d) ENUM_ENTRY(n, r, d) \ 585 ENUM_ENTRY(n##_K_B, r, d) ENUM_ENTRY(n##_KZ_B, r, d) \ 586 ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d) 587 static int ranks[IC_max] = { 588 INSTRUCTION_CONTEXTS 589 }; 590 #undef ENUM_ENTRY 591 #undef ENUM_ENTRY_K_B 592 593 return (ranks[upper] > ranks[lower]); 594 } 595 596 /// getDecisionType - Determines whether a ModRM decision with 255 entries can 597 /// be compacted by eliminating redundant information. 598 /// 599 /// @param decision - The decision to be compacted. 600 /// @return - The compactest available representation for the decision. 601 static ModRMDecisionType getDecisionType(ModRMDecision &decision) { 602 bool satisfiesOneEntry = true; 603 bool satisfiesSplitRM = true; 604 bool satisfiesSplitReg = true; 605 bool satisfiesSplitMisc = true; 606 607 for (unsigned index = 0; index < 256; ++index) { 608 if (decision.instructionIDs[index] != decision.instructionIDs[0]) 609 satisfiesOneEntry = false; 610 611 if (((index & 0xc0) == 0xc0) && 612 (decision.instructionIDs[index] != decision.instructionIDs[0xc0])) 613 satisfiesSplitRM = false; 614 615 if (((index & 0xc0) != 0xc0) && 616 (decision.instructionIDs[index] != decision.instructionIDs[0x00])) 617 satisfiesSplitRM = false; 618 619 if (((index & 0xc0) == 0xc0) && 620 (decision.instructionIDs[index] != decision.instructionIDs[index&0xf8])) 621 satisfiesSplitReg = false; 622 623 if (((index & 0xc0) != 0xc0) && 624 (decision.instructionIDs[index] != decision.instructionIDs[index&0x38])) 625 satisfiesSplitMisc = false; 626 } 627 628 if (satisfiesOneEntry) 629 return MODRM_ONEENTRY; 630 631 if (satisfiesSplitRM) 632 return MODRM_SPLITRM; 633 634 if (satisfiesSplitReg && satisfiesSplitMisc) 635 return MODRM_SPLITREG; 636 637 if (satisfiesSplitMisc) 638 return MODRM_SPLITMISC; 639 640 return MODRM_FULL; 641 } 642 643 /// stringForDecisionType - Returns a statically-allocated string corresponding 644 /// to a particular decision type. 645 /// 646 /// @param dt - The decision type. 647 /// @return - A pointer to the statically-allocated string (e.g., 648 /// "MODRM_ONEENTRY" for MODRM_ONEENTRY). 649 static const char* stringForDecisionType(ModRMDecisionType dt) { 650 #define ENUM_ENTRY(n) case n: return #n; 651 switch (dt) { 652 default: 653 llvm_unreachable("Unknown decision type"); 654 MODRMTYPES 655 }; 656 #undef ENUM_ENTRY 657 } 658 659 DisassemblerTables::DisassemblerTables() { 660 for (unsigned i = 0; i < array_lengthof(Tables); i++) 661 Tables[i] = std::make_unique<ContextDecision>(); 662 663 HasConflicts = false; 664 } 665 666 DisassemblerTables::~DisassemblerTables() { 667 } 668 669 void DisassemblerTables::emitModRMDecision(raw_ostream &o1, raw_ostream &o2, 670 unsigned &i1, unsigned &i2, 671 unsigned &ModRMTableNum, 672 ModRMDecision &decision) const { 673 static uint32_t sTableNumber = 0; 674 static uint32_t sEntryNumber = 1; 675 ModRMDecisionType dt = getDecisionType(decision); 676 677 if (dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0) { 678 // Empty table. 679 o2 << "{" << stringForDecisionType(dt) << ", 0}"; 680 return; 681 } 682 683 std::vector<unsigned> ModRMDecision; 684 685 switch (dt) { 686 default: 687 llvm_unreachable("Unknown decision type"); 688 case MODRM_ONEENTRY: 689 ModRMDecision.push_back(decision.instructionIDs[0]); 690 break; 691 case MODRM_SPLITRM: 692 ModRMDecision.push_back(decision.instructionIDs[0x00]); 693 ModRMDecision.push_back(decision.instructionIDs[0xc0]); 694 break; 695 case MODRM_SPLITREG: 696 for (unsigned index = 0; index < 64; index += 8) 697 ModRMDecision.push_back(decision.instructionIDs[index]); 698 for (unsigned index = 0xc0; index < 256; index += 8) 699 ModRMDecision.push_back(decision.instructionIDs[index]); 700 break; 701 case MODRM_SPLITMISC: 702 for (unsigned index = 0; index < 64; index += 8) 703 ModRMDecision.push_back(decision.instructionIDs[index]); 704 for (unsigned index = 0xc0; index < 256; ++index) 705 ModRMDecision.push_back(decision.instructionIDs[index]); 706 break; 707 case MODRM_FULL: 708 for (unsigned short InstructionID : decision.instructionIDs) 709 ModRMDecision.push_back(InstructionID); 710 break; 711 } 712 713 unsigned &EntryNumber = ModRMTable[ModRMDecision]; 714 if (EntryNumber == 0) { 715 EntryNumber = ModRMTableNum; 716 717 ModRMTableNum += ModRMDecision.size(); 718 o1 << "/*Table" << EntryNumber << "*/\n"; 719 i1++; 720 for (unsigned I : ModRMDecision) { 721 o1.indent(i1 * 2) << format("0x%hx", I) << ", /*" 722 << InstructionSpecifiers[I].name << "*/\n"; 723 } 724 i1--; 725 } 726 727 o2 << "{" << stringForDecisionType(dt) << ", " << EntryNumber << "}"; 728 729 switch (dt) { 730 default: 731 llvm_unreachable("Unknown decision type"); 732 case MODRM_ONEENTRY: 733 sEntryNumber += 1; 734 break; 735 case MODRM_SPLITRM: 736 sEntryNumber += 2; 737 break; 738 case MODRM_SPLITREG: 739 sEntryNumber += 16; 740 break; 741 case MODRM_SPLITMISC: 742 sEntryNumber += 8 + 64; 743 break; 744 case MODRM_FULL: 745 sEntryNumber += 256; 746 break; 747 } 748 749 // We assume that the index can fit into uint16_t. 750 assert(sEntryNumber < 65536U && 751 "Index into ModRMDecision is too large for uint16_t!"); 752 (void)sEntryNumber; 753 754 ++sTableNumber; 755 } 756 757 void DisassemblerTables::emitOpcodeDecision(raw_ostream &o1, raw_ostream &o2, 758 unsigned &i1, unsigned &i2, 759 unsigned &ModRMTableNum, 760 OpcodeDecision &opDecision) const { 761 o2 << "{"; 762 ++i2; 763 764 unsigned index; 765 for (index = 0; index < 256; ++index) { 766 auto &decision = opDecision.modRMDecisions[index]; 767 ModRMDecisionType dt = getDecisionType(decision); 768 if (!(dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0)) 769 break; 770 } 771 if (index == 256) { 772 // If all 256 entries are MODRM_ONEENTRY, omit output. 773 static_assert(MODRM_ONEENTRY == 0, ""); 774 --i2; 775 o2 << "},\n"; 776 } else { 777 o2 << " /* struct OpcodeDecision */ {\n"; 778 for (index = 0; index < 256; ++index) { 779 o2.indent(i2); 780 781 o2 << "/*0x" << format("%02hhx", index) << "*/"; 782 783 emitModRMDecision(o1, o2, i1, i2, ModRMTableNum, 784 opDecision.modRMDecisions[index]); 785 786 if (index < 255) 787 o2 << ","; 788 789 o2 << "\n"; 790 } 791 o2.indent(i2) << "}\n"; 792 --i2; 793 o2.indent(i2) << "},\n"; 794 } 795 } 796 797 void DisassemblerTables::emitContextDecision(raw_ostream &o1, raw_ostream &o2, 798 unsigned &i1, unsigned &i2, 799 unsigned &ModRMTableNum, 800 ContextDecision &decision, 801 const char* name) const { 802 o2.indent(i2) << "static const struct ContextDecision " << name << " = {{/* opcodeDecisions */\n"; 803 i2++; 804 805 for (unsigned index = 0; index < IC_max; ++index) { 806 o2.indent(i2) << "/*"; 807 o2 << stringForContext((InstructionContext)index); 808 o2 << "*/ "; 809 810 emitOpcodeDecision(o1, o2, i1, i2, ModRMTableNum, 811 decision.opcodeDecisions[index]); 812 } 813 814 i2--; 815 o2.indent(i2) << "}};" << "\n"; 816 } 817 818 void DisassemblerTables::emitInstructionInfo(raw_ostream &o, 819 unsigned &i) const { 820 unsigned NumInstructions = InstructionSpecifiers.size(); 821 822 o << "static const struct OperandSpecifier x86OperandSets[][" 823 << X86_MAX_OPERANDS << "] = {\n"; 824 825 typedef SmallVector<std::pair<OperandEncoding, OperandType>, 826 X86_MAX_OPERANDS> OperandListTy; 827 std::map<OperandListTy, unsigned> OperandSets; 828 829 unsigned OperandSetNum = 0; 830 for (unsigned Index = 0; Index < NumInstructions; ++Index) { 831 OperandListTy OperandList; 832 833 for (auto Operand : InstructionSpecifiers[Index].operands) { 834 OperandEncoding Encoding = (OperandEncoding)Operand.encoding; 835 OperandType Type = (OperandType)Operand.type; 836 OperandList.push_back(std::make_pair(Encoding, Type)); 837 } 838 unsigned &N = OperandSets[OperandList]; 839 if (N != 0) continue; 840 841 N = ++OperandSetNum; 842 843 o << " { /* " << (OperandSetNum - 1) << " */\n"; 844 for (unsigned i = 0, e = OperandList.size(); i != e; ++i) { 845 const char *Encoding = stringForOperandEncoding(OperandList[i].first); 846 const char *Type = stringForOperandType(OperandList[i].second); 847 o << " { " << Encoding << ", " << Type << " },\n"; 848 } 849 o << " },\n"; 850 } 851 o << "};" << "\n\n"; 852 853 o.indent(i * 2) << "static const struct InstructionSpecifier "; 854 o << INSTRUCTIONS_STR "[" << InstructionSpecifiers.size() << "] = {\n"; 855 856 i++; 857 858 for (unsigned index = 0; index < NumInstructions; ++index) { 859 o.indent(i * 2) << "{ /* " << index << " */\n"; 860 i++; 861 862 OperandListTy OperandList; 863 for (auto Operand : InstructionSpecifiers[index].operands) { 864 OperandEncoding Encoding = (OperandEncoding)Operand.encoding; 865 OperandType Type = (OperandType)Operand.type; 866 OperandList.push_back(std::make_pair(Encoding, Type)); 867 } 868 o.indent(i * 2) << (OperandSets[OperandList] - 1) << ",\n"; 869 870 o.indent(i * 2) << "/* " << InstructionSpecifiers[index].name << " */\n"; 871 872 i--; 873 o.indent(i * 2) << "},\n"; 874 } 875 876 i--; 877 o.indent(i * 2) << "};" << "\n"; 878 } 879 880 void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const { 881 o.indent(i * 2) << "static const uint8_t " CONTEXTS_STR 882 "[" << ATTR_max << "] = {\n"; 883 i++; 884 885 for (unsigned index = 0; index < ATTR_max; ++index) { 886 o.indent(i * 2); 887 888 if ((index & ATTR_EVEX) || (index & ATTR_VEX) || (index & ATTR_VEXL)) { 889 if (index & ATTR_EVEX) 890 o << "IC_EVEX"; 891 else if ((index & (ATTR_64BIT | ATTR_VEXL | ATTR_REXW | ATTR_OPSIZE)) == 892 (ATTR_64BIT | ATTR_OPSIZE)) 893 o << "IC_64BIT_VEX"; 894 else 895 o << "IC_VEX"; 896 897 if ((index & ATTR_EVEX) && (index & ATTR_EVEXL2)) 898 o << "_L2"; 899 else if (index & ATTR_VEXL) 900 o << "_L"; 901 902 if (index & ATTR_REXW) 903 o << "_W"; 904 905 if (index & ATTR_OPSIZE) { 906 o << "_OPSIZE"; 907 if ((index & (ATTR_64BIT | ATTR_EVEX | ATTR_VEX | ATTR_VEXL | 908 ATTR_REXW | ATTR_ADSIZE)) == 909 (ATTR_64BIT | ATTR_VEX | ATTR_ADSIZE)) 910 o << "_ADSIZE"; 911 } else if (index & ATTR_XD) 912 o << "_XD"; 913 else if (index & ATTR_XS) 914 o << "_XS"; 915 916 if ((index & ATTR_EVEX)) { 917 if (index & ATTR_EVEXKZ) 918 o << "_KZ"; 919 else if (index & ATTR_EVEXK) 920 o << "_K"; 921 922 if (index & ATTR_EVEXB) 923 o << "_B"; 924 } 925 } else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XS)) 926 o << "IC_64BIT_REXW_XS"; 927 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD)) 928 o << "IC_64BIT_REXW_XD"; 929 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && 930 (index & ATTR_OPSIZE)) 931 o << "IC_64BIT_REXW_OPSIZE"; 932 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && 933 (index & ATTR_ADSIZE)) 934 o << "IC_64BIT_REXW_ADSIZE"; 935 else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_OPSIZE)) 936 o << "IC_64BIT_XD_OPSIZE"; 937 else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_ADSIZE)) 938 o << "IC_64BIT_XD_ADSIZE"; 939 else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_OPSIZE)) 940 o << "IC_64BIT_XS_OPSIZE"; 941 else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_ADSIZE)) 942 o << "IC_64BIT_XS_ADSIZE"; 943 else if ((index & ATTR_64BIT) && (index & ATTR_XS)) 944 o << "IC_64BIT_XS"; 945 else if ((index & ATTR_64BIT) && (index & ATTR_XD)) 946 o << "IC_64BIT_XD"; 947 else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE) && 948 (index & ATTR_ADSIZE)) 949 o << "IC_64BIT_OPSIZE_ADSIZE"; 950 else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE)) 951 o << "IC_64BIT_OPSIZE"; 952 else if ((index & ATTR_64BIT) && (index & ATTR_ADSIZE)) 953 o << "IC_64BIT_ADSIZE"; 954 else if ((index & ATTR_64BIT) && (index & ATTR_REXW)) 955 o << "IC_64BIT_REXW"; 956 else if ((index & ATTR_64BIT)) 957 o << "IC_64BIT"; 958 else if ((index & ATTR_XS) && (index & ATTR_OPSIZE)) 959 o << "IC_XS_OPSIZE"; 960 else if ((index & ATTR_XD) && (index & ATTR_OPSIZE)) 961 o << "IC_XD_OPSIZE"; 962 else if ((index & ATTR_XS) && (index & ATTR_ADSIZE)) 963 o << "IC_XS_ADSIZE"; 964 else if ((index & ATTR_XD) && (index & ATTR_ADSIZE)) 965 o << "IC_XD_ADSIZE"; 966 else if (index & ATTR_XS) 967 o << "IC_XS"; 968 else if (index & ATTR_XD) 969 o << "IC_XD"; 970 else if ((index & ATTR_OPSIZE) && (index & ATTR_ADSIZE)) 971 o << "IC_OPSIZE_ADSIZE"; 972 else if (index & ATTR_OPSIZE) 973 o << "IC_OPSIZE"; 974 else if (index & ATTR_ADSIZE) 975 o << "IC_ADSIZE"; 976 else 977 o << "IC"; 978 979 o << ", // " << index << "\n"; 980 } 981 982 i--; 983 o.indent(i * 2) << "};" << "\n"; 984 } 985 986 void DisassemblerTables::emitContextDecisions(raw_ostream &o1, raw_ostream &o2, 987 unsigned &i1, unsigned &i2, 988 unsigned &ModRMTableNum) const { 989 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[0], ONEBYTE_STR); 990 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[1], TWOBYTE_STR); 991 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[2], THREEBYTE38_STR); 992 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[3], THREEBYTE3A_STR); 993 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[4], XOP8_MAP_STR); 994 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[5], XOP9_MAP_STR); 995 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[6], XOPA_MAP_STR); 996 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[7], THREEDNOW_MAP_STR); 997 } 998 999 void DisassemblerTables::emit(raw_ostream &o) const { 1000 unsigned i1 = 0; 1001 unsigned i2 = 0; 1002 1003 std::string s1; 1004 std::string s2; 1005 1006 raw_string_ostream o1(s1); 1007 raw_string_ostream o2(s2); 1008 1009 emitInstructionInfo(o, i2); 1010 o << "\n"; 1011 1012 emitContextTable(o, i2); 1013 o << "\n"; 1014 1015 unsigned ModRMTableNum = 0; 1016 1017 o << "static const InstrUID modRMTable[] = {\n"; 1018 i1++; 1019 std::vector<unsigned> EmptyTable(1, 0); 1020 ModRMTable[EmptyTable] = ModRMTableNum; 1021 ModRMTableNum += EmptyTable.size(); 1022 o1 << "/*EmptyTable*/\n"; 1023 o1.indent(i1 * 2) << "0x0,\n"; 1024 i1--; 1025 emitContextDecisions(o1, o2, i1, i2, ModRMTableNum); 1026 1027 o << o1.str(); 1028 o << " 0x0\n"; 1029 o << "};\n"; 1030 o << "\n"; 1031 o << o2.str(); 1032 o << "\n"; 1033 o << "\n"; 1034 } 1035 1036 void DisassemblerTables::setTableFields(ModRMDecision &decision, 1037 const ModRMFilter &filter, 1038 InstrUID uid, 1039 uint8_t opcode) { 1040 for (unsigned index = 0; index < 256; ++index) { 1041 if (filter.accepts(index)) { 1042 if (decision.instructionIDs[index] == uid) 1043 continue; 1044 1045 if (decision.instructionIDs[index] != 0) { 1046 InstructionSpecifier &newInfo = 1047 InstructionSpecifiers[uid]; 1048 InstructionSpecifier &previousInfo = 1049 InstructionSpecifiers[decision.instructionIDs[index]]; 1050 1051 if(previousInfo.name == "NOOP" && (newInfo.name == "XCHG16ar" || 1052 newInfo.name == "XCHG32ar" || 1053 newInfo.name == "XCHG64ar")) 1054 continue; // special case for XCHG*ar and NOOP 1055 1056 if (outranks(previousInfo.insnContext, newInfo.insnContext)) 1057 continue; 1058 1059 if (previousInfo.insnContext == newInfo.insnContext) { 1060 errs() << "Error: Primary decode conflict: "; 1061 errs() << newInfo.name << " would overwrite " << previousInfo.name; 1062 errs() << "\n"; 1063 errs() << "ModRM " << index << "\n"; 1064 errs() << "Opcode " << (uint16_t)opcode << "\n"; 1065 errs() << "Context " << stringForContext(newInfo.insnContext) << "\n"; 1066 HasConflicts = true; 1067 } 1068 } 1069 1070 decision.instructionIDs[index] = uid; 1071 } 1072 } 1073 } 1074 1075 void DisassemblerTables::setTableFields(OpcodeType type, 1076 InstructionContext insnContext, 1077 uint8_t opcode, 1078 const ModRMFilter &filter, 1079 InstrUID uid, 1080 bool is32bit, 1081 bool noPrefix, 1082 bool ignoresVEX_L, 1083 bool ignoresVEX_W, 1084 unsigned addressSize) { 1085 ContextDecision &decision = *Tables[type]; 1086 1087 for (unsigned index = 0; index < IC_max; ++index) { 1088 if ((is32bit || addressSize == 16) && 1089 inheritsFrom((InstructionContext)index, IC_64BIT)) 1090 continue; 1091 1092 bool adSize64 = addressSize == 64; 1093 if (inheritsFrom((InstructionContext)index, 1094 InstructionSpecifiers[uid].insnContext, noPrefix, 1095 ignoresVEX_L, ignoresVEX_W, adSize64)) 1096 setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode], 1097 filter, 1098 uid, 1099 opcode); 1100 } 1101 } 1102