19c2daa00SOllivier Robert /*********************************************************************** 29c2daa00SOllivier Robert * 39c2daa00SOllivier Robert * Module: ttime_api.h 49c2daa00SOllivier Robert * 59c2daa00SOllivier Robert * Author: SIS 1998 69c2daa00SOllivier Robert * LM NE&SS 2001 79c2daa00SOllivier Robert * 89c2daa00SOllivier Robert * Description 99c2daa00SOllivier Robert * 109c2daa00SOllivier Robert * This header file contains data necessary for the API to the 119c2daa00SOllivier Robert * True Time board. This contains all of the structure definitions 129c2daa00SOllivier Robert * for the individual registers. 139c2daa00SOllivier Robert * 149c2daa00SOllivier Robert ***********************************************************************/ 159c2daa00SOllivier Robert #ifndef TTIME_API_H 169c2daa00SOllivier Robert #define TTIME_API_H 179c2daa00SOllivier Robert 189c2daa00SOllivier Robert #ifdef CPP 199c2daa00SOllivier Robert extern "C" { 209c2daa00SOllivier Robert #endif 219c2daa00SOllivier Robert 229c2daa00SOllivier Robert #include <time.h> 239c2daa00SOllivier Robert 249c2daa00SOllivier Robert typedef struct 259c2daa00SOllivier Robert { 269c2daa00SOllivier Robert unsigned int micro_sec; 279c2daa00SOllivier Robert unsigned int milli_sec; 289c2daa00SOllivier Robert struct tm gps_tm; 299c2daa00SOllivier Robert } gps_time_t; 309c2daa00SOllivier Robert 319c2daa00SOllivier Robert typedef struct 329c2daa00SOllivier Robert { 339c2daa00SOllivier Robert unsigned char reserved_1; 349c2daa00SOllivier Robert unsigned unit_ms : 4; 359c2daa00SOllivier Robert unsigned filler_0 : 4; 369c2daa00SOllivier Robert unsigned hun_ms : 4; 379c2daa00SOllivier Robert unsigned tens_ms : 4; 389c2daa00SOllivier Robert unsigned tens_sec : 4; 399c2daa00SOllivier Robert unsigned unit_sec : 4; 409c2daa00SOllivier Robert 419c2daa00SOllivier Robert unsigned tens_min : 4; 429c2daa00SOllivier Robert unsigned unit_min : 4; 439c2daa00SOllivier Robert unsigned tens_hour : 4; 449c2daa00SOllivier Robert unsigned unit_hour : 4; 459c2daa00SOllivier Robert unsigned tens_day : 4; 469c2daa00SOllivier Robert unsigned unit_day : 4; 479c2daa00SOllivier Robert unsigned filler_1 : 4; 489c2daa00SOllivier Robert unsigned hun_day : 4; 499c2daa00SOllivier Robert 509c2daa00SOllivier Robert unsigned tens_year : 4; 519c2daa00SOllivier Robert unsigned unit_year : 4; 529c2daa00SOllivier Robert unsigned thou_year : 4; 539c2daa00SOllivier Robert unsigned hun_year : 4; 549c2daa00SOllivier Robert unsigned char reserved_2[2]; 559c2daa00SOllivier Robert } preset_time_reg_t; 569c2daa00SOllivier Robert 579c2daa00SOllivier Robert typedef struct 589c2daa00SOllivier Robert { 599c2daa00SOllivier Robert unsigned n_d0 : 2; 609c2daa00SOllivier Robert unsigned antenna_short_stat : 1; /* 0 = fault */ 619c2daa00SOllivier Robert unsigned antenna_open_stat : 1; /* 0 = fault */ 629c2daa00SOllivier Robert unsigned n_d1 : 1; 639c2daa00SOllivier Robert unsigned rate_gen_pulse_stat : 1; 649c2daa00SOllivier Robert unsigned time_cmp_pulse_stat : 1; 659c2daa00SOllivier Robert unsigned ext_event_stat : 1; 669c2daa00SOllivier Robert 679c2daa00SOllivier Robert } hw_stat_reg_t; 689c2daa00SOllivier Robert 699c2daa00SOllivier Robert typedef struct 709c2daa00SOllivier Robert { 719c2daa00SOllivier Robert unsigned tens_us : 4; 729c2daa00SOllivier Robert unsigned unit_us : 4; 739c2daa00SOllivier Robert unsigned unit_ms : 4; 749c2daa00SOllivier Robert unsigned hun_us : 4; 759c2daa00SOllivier Robert unsigned char hw_stat; /* hw_stat_reg_t hw_stat; */ 769c2daa00SOllivier Robert unsigned char reserved_3; 779c2daa00SOllivier Robert 789c2daa00SOllivier Robert unsigned hun_ms : 4; 799c2daa00SOllivier Robert unsigned tens_ms : 4; 809c2daa00SOllivier Robert unsigned tens_sec : 4; 819c2daa00SOllivier Robert unsigned unit_sec : 4; 829c2daa00SOllivier Robert unsigned tens_min : 4; 839c2daa00SOllivier Robert unsigned unit_min : 4; 849c2daa00SOllivier Robert unsigned tens_hour : 4; 859c2daa00SOllivier Robert unsigned unit_hour : 4; 869c2daa00SOllivier Robert 879c2daa00SOllivier Robert unsigned tens_day : 4; 889c2daa00SOllivier Robert unsigned unit_day : 4; 899c2daa00SOllivier Robert unsigned status : 4; 909c2daa00SOllivier Robert unsigned hun_day : 4; 919c2daa00SOllivier Robert unsigned tens_year : 4; 929c2daa00SOllivier Robert unsigned unit_year : 4; 939c2daa00SOllivier Robert unsigned thou_year : 4; 949c2daa00SOllivier Robert unsigned hun_year : 4; 959c2daa00SOllivier Robert } time_freeze_reg_t; 969c2daa00SOllivier Robert 979c2daa00SOllivier Robert typedef struct 989c2daa00SOllivier Robert { 999c2daa00SOllivier Robert unsigned char off_low; 1009c2daa00SOllivier Robert unsigned char off_high; 1019c2daa00SOllivier Robert unsigned char reserved_4[2]; 1029c2daa00SOllivier Robert } sync_gen_off_reg_t; 1039c2daa00SOllivier Robert 1049c2daa00SOllivier Robert typedef struct 1059c2daa00SOllivier Robert { 1069c2daa00SOllivier Robert unsigned tens_min : 4; 1079c2daa00SOllivier Robert unsigned unit_min : 4; 1089c2daa00SOllivier Robert unsigned tens_hour : 4; 1099c2daa00SOllivier Robert unsigned unit_hour : 4; 1109c2daa00SOllivier Robert unsigned char sign_ascii; /* '+' or '-' */ 1119c2daa00SOllivier Robert unsigned char reserved_5; 1129c2daa00SOllivier Robert } local_off_t; 1139c2daa00SOllivier Robert 1149c2daa00SOllivier Robert /* 1159c2daa00SOllivier Robert * This structure can be used for both the position freeze 1169c2daa00SOllivier Robert * and position preset registers. 1179c2daa00SOllivier Robert */ 1189c2daa00SOllivier Robert typedef struct 1199c2daa00SOllivier Robert { 1209c2daa00SOllivier Robert unsigned lat_tens_degee : 4; 1219c2daa00SOllivier Robert unsigned lat_unit_degee : 4; 1229c2daa00SOllivier Robert unsigned filler_0 : 4; 1239c2daa00SOllivier Robert unsigned lat_hun_degree : 4; 1249c2daa00SOllivier Robert unsigned lat_tens_min : 4; 1259c2daa00SOllivier Robert unsigned lat_unit_min : 4; 1269c2daa00SOllivier Robert unsigned char lat_north_south; /* 'N' or 'S' */ 1279c2daa00SOllivier Robert 1289c2daa00SOllivier Robert unsigned filler_1 : 4; 1299c2daa00SOllivier Robert unsigned lat_tenth_sec : 4; 1309c2daa00SOllivier Robert unsigned lat_tens_sec : 4; 1319c2daa00SOllivier Robert unsigned lat_unit_sec : 4; 1329c2daa00SOllivier Robert unsigned long_tens_degree : 4; 1339c2daa00SOllivier Robert unsigned long_unit_degree : 4; 1349c2daa00SOllivier Robert unsigned filler_2 : 4; 1359c2daa00SOllivier Robert unsigned long_hun_degree : 4; 1369c2daa00SOllivier Robert 1379c2daa00SOllivier Robert unsigned long_tens_min : 4; 1389c2daa00SOllivier Robert unsigned long_unit_min : 4; 1399c2daa00SOllivier Robert unsigned char long_east_west; /* 'E' or 'W' */ 1409c2daa00SOllivier Robert unsigned filler_3 : 4; 1419c2daa00SOllivier Robert unsigned long_tenth_sec : 4; 1429c2daa00SOllivier Robert unsigned long_tens_sec : 4; 1439c2daa00SOllivier Robert unsigned long_unit_sec : 4; 1449c2daa00SOllivier Robert 1459c2daa00SOllivier Robert unsigned elv_tens_km : 4; 1469c2daa00SOllivier Robert unsigned elv_unit_km : 4; 1479c2daa00SOllivier Robert unsigned char elv_sign; /* '+' or '-' */ 1489c2daa00SOllivier Robert unsigned elv_unit_m : 4; 1499c2daa00SOllivier Robert unsigned elv_tenth_m : 4; 1509c2daa00SOllivier Robert unsigned elv_hun_m : 4; 1519c2daa00SOllivier Robert unsigned elv_tens_m : 4; 1529c2daa00SOllivier Robert } pos_reg_t; 1539c2daa00SOllivier Robert 1549c2daa00SOllivier Robert typedef struct 1559c2daa00SOllivier Robert { 1569c2daa00SOllivier Robert unsigned char prn1_tens_units; 1579c2daa00SOllivier Robert unsigned char prn1_reserved; 1589c2daa00SOllivier Robert unsigned char lvl1_tenths_hundredths; 1599c2daa00SOllivier Robert unsigned char lvl1_tens_units; 1609c2daa00SOllivier Robert 1619c2daa00SOllivier Robert unsigned char prn2_tens_units; 1629c2daa00SOllivier Robert unsigned char prn2_reserved; 1639c2daa00SOllivier Robert unsigned char lvl2_tenths_hundredths; 1649c2daa00SOllivier Robert unsigned char lvl2_tens_units; 1659c2daa00SOllivier Robert 1669c2daa00SOllivier Robert unsigned char prn3_tens_units; 1679c2daa00SOllivier Robert unsigned char prn3_reserved; 1689c2daa00SOllivier Robert unsigned char lvl3_tenths_hundredths; 1699c2daa00SOllivier Robert unsigned char lvl3_tens_units; 1709c2daa00SOllivier Robert 1719c2daa00SOllivier Robert unsigned char prn4_tens_units; 1729c2daa00SOllivier Robert unsigned char prn4_reserved; 1739c2daa00SOllivier Robert unsigned char lvl4_tenths_hundredths; 1749c2daa00SOllivier Robert unsigned char lvl4_tens_units; 1759c2daa00SOllivier Robert 1769c2daa00SOllivier Robert unsigned char prn5_tens_units; 1779c2daa00SOllivier Robert unsigned char prn5_reserved; 1789c2daa00SOllivier Robert unsigned char lvl5_tenths_hundredths; 1799c2daa00SOllivier Robert unsigned char lvl5_tens_units; 1809c2daa00SOllivier Robert 1819c2daa00SOllivier Robert unsigned char prn6_tens_units; 1829c2daa00SOllivier Robert unsigned char prn6_reserved; 1839c2daa00SOllivier Robert unsigned char lvl6_tenths_hundredths; 1849c2daa00SOllivier Robert unsigned char lvl6_tens_units; 1859c2daa00SOllivier Robert 1869c2daa00SOllivier Robert unsigned char flag; 1879c2daa00SOllivier Robert unsigned char reserved[3]; 1889c2daa00SOllivier Robert } sig_levels_t; 1899c2daa00SOllivier Robert 1909c2daa00SOllivier Robert typedef struct 1919c2daa00SOllivier Robert { 1929c2daa00SOllivier Robert unsigned tens_us : 4; 1939c2daa00SOllivier Robert unsigned unit_us : 4; 1949c2daa00SOllivier Robert unsigned unit_ms : 4; 1959c2daa00SOllivier Robert unsigned hun_us : 4; 1969c2daa00SOllivier Robert unsigned hun_ms : 4; 1979c2daa00SOllivier Robert unsigned tens_ms : 4; 1989c2daa00SOllivier Robert unsigned tens_sec : 4; 1999c2daa00SOllivier Robert unsigned unit_sec : 4; 2009c2daa00SOllivier Robert 2019c2daa00SOllivier Robert unsigned tens_min : 4; 2029c2daa00SOllivier Robert unsigned unit_min : 4; 2039c2daa00SOllivier Robert unsigned tens_hour : 4; 2049c2daa00SOllivier Robert unsigned unit_hour : 4; 2059c2daa00SOllivier Robert unsigned tens_day : 4; 2069c2daa00SOllivier Robert unsigned unit_day : 4; 2079c2daa00SOllivier Robert unsigned stat : 4; 2089c2daa00SOllivier Robert unsigned hun_day : 4; 2099c2daa00SOllivier Robert 2109c2daa00SOllivier Robert unsigned tens_year : 4; 2119c2daa00SOllivier Robert unsigned unit_year : 4; 2129c2daa00SOllivier Robert unsigned thou_year : 4; 2139c2daa00SOllivier Robert unsigned hun_year : 4; 2149c2daa00SOllivier Robert unsigned char reserved_5[2]; 2159c2daa00SOllivier Robert } ext_time_event_reg_t; 2169c2daa00SOllivier Robert 2179c2daa00SOllivier Robert typedef struct 2189c2daa00SOllivier Robert { 2199c2daa00SOllivier Robert unsigned tens_us : 4; 2209c2daa00SOllivier Robert unsigned unit_us : 4; 2219c2daa00SOllivier Robert unsigned unit_ms : 4; 2229c2daa00SOllivier Robert unsigned hun_us : 4; 2239c2daa00SOllivier Robert unsigned hun_ms : 4; 2249c2daa00SOllivier Robert unsigned tens_ms : 4; 2259c2daa00SOllivier Robert unsigned tens_sec : 4; 2269c2daa00SOllivier Robert unsigned unit_sec : 4; 2279c2daa00SOllivier Robert 2289c2daa00SOllivier Robert unsigned tens_min : 4; 2299c2daa00SOllivier Robert unsigned unit_min : 4; 2309c2daa00SOllivier Robert unsigned tens_hour : 4; 2319c2daa00SOllivier Robert unsigned unit_hour : 4; 2329c2daa00SOllivier Robert unsigned tens_day : 4; 2339c2daa00SOllivier Robert unsigned unit_day : 4; 2349c2daa00SOllivier Robert unsigned mask : 4; 2359c2daa00SOllivier Robert unsigned hun_day : 4; 2369c2daa00SOllivier Robert } time_cmp_reg_t; 2379c2daa00SOllivier Robert 2389c2daa00SOllivier Robert typedef struct 2399c2daa00SOllivier Robert { 2409c2daa00SOllivier Robert unsigned char err_stat; 2419c2daa00SOllivier Robert unsigned char no_def; 2429c2daa00SOllivier Robert unsigned char oscillator_stat[2]; 2439c2daa00SOllivier Robert } diag_reg_t; 2449c2daa00SOllivier Robert 2459c2daa00SOllivier Robert typedef struct 2469c2daa00SOllivier Robert { 2479c2daa00SOllivier Robert unsigned res :2; 2489c2daa00SOllivier Robert unsigned rate_int_mask :1; 2499c2daa00SOllivier Robert unsigned cmp_int_mask :1; 2509c2daa00SOllivier Robert unsigned ext_int_mask :1; 2519c2daa00SOllivier Robert unsigned rate_stat_clr :1; 2529c2daa00SOllivier Robert unsigned cmp_stat_clr :1; 2539c2daa00SOllivier Robert unsigned ext_stat_clr :1; 2549c2daa00SOllivier Robert unsigned char reserved[3]; 2559c2daa00SOllivier Robert } hw_ctl_reg_t; 2569c2daa00SOllivier Robert 2579c2daa00SOllivier Robert typedef struct 2589c2daa00SOllivier Robert { 2599c2daa00SOllivier Robert unsigned preset_pos_rdy :1; 2609c2daa00SOllivier Robert unsigned sel_pps_ref :1; 2619c2daa00SOllivier Robert unsigned sel_gps_ref :1; 2629c2daa00SOllivier Robert unsigned sel_time_code :1; 2639c2daa00SOllivier Robert unsigned gen_stp_run :1; 2649c2daa00SOllivier Robert unsigned preset_time_rdy :1; 2659c2daa00SOllivier Robert unsigned dst :1; 2669c2daa00SOllivier Robert unsigned mode_sel :1; 2679c2daa00SOllivier Robert 2689c2daa00SOllivier Robert unsigned ctl_am_dc :1; 2699c2daa00SOllivier Robert unsigned reserved :3; 2709c2daa00SOllivier Robert unsigned input_code :4; 2719c2daa00SOllivier Robert 2729c2daa00SOllivier Robert unsigned char rate_reserved; 2739c2daa00SOllivier Robert 2749c2daa00SOllivier Robert unsigned rate_flag :4; 2759c2daa00SOllivier Robert unsigned rate_reserved1 :4; 2769c2daa00SOllivier Robert } conf_reg_t; 2779c2daa00SOllivier Robert 2789c2daa00SOllivier Robert typedef struct 2799c2daa00SOllivier Robert { 2809c2daa00SOllivier Robert unsigned char mem_reserved[0xf8]; 2819c2daa00SOllivier Robert 2829c2daa00SOllivier Robert hw_ctl_reg_t hw_ctl_reg; 2839c2daa00SOllivier Robert 2849c2daa00SOllivier Robert time_freeze_reg_t time_freeze_reg; 2859c2daa00SOllivier Robert 2869c2daa00SOllivier Robert pos_reg_t pos_freeze_reg; 2879c2daa00SOllivier Robert 2889c2daa00SOllivier Robert conf_reg_t conf_reg; 2899c2daa00SOllivier Robert 2909c2daa00SOllivier Robert diag_reg_t diag_reg; 2919c2daa00SOllivier Robert 2929c2daa00SOllivier Robert local_off_t local_offset; 2939c2daa00SOllivier Robert 2949c2daa00SOllivier Robert sync_gen_off_reg_t sync_gen_offset; 2959c2daa00SOllivier Robert 2969c2daa00SOllivier Robert unsigned char reserved[4]; 2979c2daa00SOllivier Robert 2989c2daa00SOllivier Robert unsigned char config_reg2_ctl; 2999c2daa00SOllivier Robert 3009c2daa00SOllivier Robert unsigned char reserved2[11]; 3019c2daa00SOllivier Robert 3029c2daa00SOllivier Robert time_cmp_reg_t time_compare_reg; 3039c2daa00SOllivier Robert 3049c2daa00SOllivier Robert unsigned char reserved3[24]; 3059c2daa00SOllivier Robert 3069c2daa00SOllivier Robert preset_time_reg_t preset_time_reg; 3079c2daa00SOllivier Robert 3089c2daa00SOllivier Robert pos_reg_t preset_pos_reg; 3099c2daa00SOllivier Robert 3109c2daa00SOllivier Robert ext_time_event_reg_t extern_time_event_reg; 3119c2daa00SOllivier Robert 3129c2daa00SOllivier Robert unsigned char reserved4[24]; 3139c2daa00SOllivier Robert 3149c2daa00SOllivier Robert sig_levels_t signal_levels_reg; 3159c2daa00SOllivier Robert 3169c2daa00SOllivier Robert unsigned char reserved5[12]; 3179c2daa00SOllivier Robert } tt_mem_space_t; 3189c2daa00SOllivier Robert 3199c2daa00SOllivier Robert #define TTIME_MEMORY_SIZE 0x200 3209c2daa00SOllivier Robert 3219c2daa00SOllivier Robert /* 3229c2daa00SOllivier Robert * Defines for register offsets 3239c2daa00SOllivier Robert */ 3249c2daa00SOllivier Robert #define HW_CTL_REG 0x0f8 3259c2daa00SOllivier Robert #define TIME_FREEZE_REG 0x0fc 3269c2daa00SOllivier Robert #define HW_STAT_REG 0x0fe 3279c2daa00SOllivier Robert #define POS_FREEZE_REG 0x108 3289c2daa00SOllivier Robert #define CONFIG_REG_1 0x118 3299c2daa00SOllivier Robert #define DIAG_REG 0x11c 3309c2daa00SOllivier Robert #define LOCAL_OFF_REG 0x120 3319c2daa00SOllivier Robert #define SYNC_GEN_OFF_REG 0x124 3329c2daa00SOllivier Robert #define CONFIG_REG_2 0x12c 3339c2daa00SOllivier Robert #define TIME_CMP_REG 0x138 3349c2daa00SOllivier Robert #define PRESET_TIME_REG 0x158 3359c2daa00SOllivier Robert #define PRESET_POS_REG 0x164 3369c2daa00SOllivier Robert #define EXT_EVENT_REG 0x174 3379c2daa00SOllivier Robert #define SIG_LVL_PRN1 0x198 3389c2daa00SOllivier Robert #define SIG_LVL_PRN2 0x19c 3399c2daa00SOllivier Robert #define SIG_LVL_PRN3 0x1a0 3409c2daa00SOllivier Robert #define SIG_LVL_PRN4 0x1a4 3419c2daa00SOllivier Robert #define SIG_LVL_PRN5 0x1a8 3429c2daa00SOllivier Robert #define SIG_LVL_PRN6 0x1ac 3439c2daa00SOllivier Robert #define SIG_LVL_FLAG 0x1b0 3449c2daa00SOllivier Robert 3459c2daa00SOllivier Robert /* 3469c2daa00SOllivier Robert * Defines for accessing the hardware status register. 3479c2daa00SOllivier Robert */ 3489c2daa00SOllivier Robert #define HW_STAT_ANTENNA_SHORT 0 /* access the antenna short bit */ 3499c2daa00SOllivier Robert #define HW_STAT_ANTENNA_OPEN 1 /* access the antenna open bit */ 3509c2daa00SOllivier Robert #define HW_STAT_RATE_GEN_PULSE_STAT 2 /* access the rate gen pulse bit */ 3519c2daa00SOllivier Robert #define HW_STAT_TIME_CMP_PULSE_STAT 3 /* access the time cmp bit */ 3529c2daa00SOllivier Robert #define HW_STAT_EXT_EVENT_STAT 4 /* access the external event bit */ 3539c2daa00SOllivier Robert 3549c2daa00SOllivier Robert /* 3559c2daa00SOllivier Robert * Defines for accessing the hardware control register 3569c2daa00SOllivier Robert */ 3579c2daa00SOllivier Robert 3589c2daa00SOllivier Robert #define HW_CTL_RATE_INT_MASK 0 /* access rate generator int mask */ 3599c2daa00SOllivier Robert #define HW_CTL_CMP_INT_MASK 1 /* access compare interrupt mask */ 3609c2daa00SOllivier Robert #define HW_CTL_EXT_INT_MASK 2 /* access external event interrupt mask */ 3619c2daa00SOllivier Robert #define HW_CTL_RATE_GEN_INT_CLEAR 3 /* access rate gen. interrupt clear field */ 3629c2daa00SOllivier Robert #define HW_CTL_TIME_CMP_INT_CLEAR 4 /* access time cmp interrupt clear field */ 3639c2daa00SOllivier Robert #define HW_CTL_EXT_EVENT_INT_CLEAR 5 /* access external event int clear field */ 3649c2daa00SOllivier Robert 3659c2daa00SOllivier Robert /* 3669c2daa00SOllivier Robert * Defines for configuration register bit fields. 3679c2daa00SOllivier Robert */ 3689c2daa00SOllivier Robert #define PRESET_POS_RDY_BIT 0 /* access the preset pos. rdy. bit */ 3699c2daa00SOllivier Robert #define SEL_1_PPS_REF_BIT 1 /* access the select 1 pps reference bit */ 3709c2daa00SOllivier Robert #define SEL_GPS_REF_BIT 2 /* access the select gps reference bit */ 3719c2daa00SOllivier Robert #define SEL_TIME_CODE_REF_BIT 3 /* access the select time code reference bit */ 3729c2daa00SOllivier Robert #define GEN_STOP_BIT 4 /* access the generator start/stop bit */ 3739c2daa00SOllivier Robert #define PRESET_TIME_RDY_BIT 5 /* access the preset time ready bit */ 3749c2daa00SOllivier Robert #define DST_BIT 6 /* access the DST bit */ 3759c2daa00SOllivier Robert #define MODE_SEL_BIT 7 /* access the mode select bit */ 3769c2daa00SOllivier Robert #define AM_DC_BIT 8 /* access the code bits AM/DC bit */ 3779c2daa00SOllivier Robert #define IN_CODE_SEL_BIT 9 /* access the input code select bit */ 3789c2daa00SOllivier Robert #define FLAG_BIT 10 /* access the flag bit */ 3799c2daa00SOllivier Robert 3809c2daa00SOllivier Robert /* 3819c2daa00SOllivier Robert * The following defines are used to set modes in the 3829c2daa00SOllivier Robert * configuration register. 3839c2daa00SOllivier Robert */ 3849c2daa00SOllivier Robert 3859c2daa00SOllivier Robert #define CONF_SET_AM 0 /* Set code to AM */ 3869c2daa00SOllivier Robert #define CONF_SET_DC 1 /* Set code to DC */ 3879c2daa00SOllivier Robert #define CONF_SET_IRIG_B 0 /* Set code IRIG B */ 3889c2daa00SOllivier Robert #define CONF_SET_IRIG_A 1 /* Set code IRIG A */ 3899c2daa00SOllivier Robert 3909c2daa00SOllivier Robert #define CONF_FLAG_DISABLE 0 /* Disable pulse */ 3919c2daa00SOllivier Robert #define CONF_FLAG_10K_PPS 1 /* Set rate to 10k PPS */ 3929c2daa00SOllivier Robert #define CONF_FLAG_1K_PPS 2 /* Set rate to 1k PPS */ 3939c2daa00SOllivier Robert #define CONF_FLAG_100_PPS 3 /* Set rate to 100 PPS */ 3949c2daa00SOllivier Robert #define CONF_FLAG_10_PPS 4 /* Set rate to 10 PPS */ 3959c2daa00SOllivier Robert #define CONF_FLAG_1_PPS 5 /* Set rate to 1 PPS */ 3969c2daa00SOllivier Robert 3979c2daa00SOllivier Robert /* 3989c2daa00SOllivier Robert * Defines for read commands 3999c2daa00SOllivier Robert */ 4009c2daa00SOllivier Robert 4019c2daa00SOllivier Robert #define TT_RD_FREEZE_REG 0x01 4029c2daa00SOllivier Robert #define TT_RD_HW_CTL_REG 0x02 4039c2daa00SOllivier Robert #define TT_RD_CNFG_REG 0x03 4049c2daa00SOllivier Robert #define TT_RD_DIAG_REG 0x04 4059c2daa00SOllivier Robert #define TT_RD_LCL_OFFSET 0x05 4069c2daa00SOllivier Robert #define TT_RD_SYNC_GEN_OFF 0x06 4079c2daa00SOllivier Robert #define TT_RD_CNFG_REG_2 0x07 4089c2daa00SOllivier Robert #define TT_RD_TIME_CMP_REG 0x08 4099c2daa00SOllivier Robert #define TT_RD_PRESET_REG 0x09 4109c2daa00SOllivier Robert #define TT_RD_EXT_EVNT_REG 0x0a 4119c2daa00SOllivier Robert #define TT_RD_SIG_LVL_REG 0x0b 4129c2daa00SOllivier Robert 4139c2daa00SOllivier Robert /* 4149c2daa00SOllivier Robert * Defines for write commands 4159c2daa00SOllivier Robert */ 4169c2daa00SOllivier Robert #define TT_WRT_FREEZE_REG 0x0c 4179c2daa00SOllivier Robert #define TT_WRT_HW_CTL_REG 0x0d 4189c2daa00SOllivier Robert #define TT_WRT_CNFG_REG 0x0e 4199c2daa00SOllivier Robert #define TT_WRT_DIAG_REG 0x0f 4209c2daa00SOllivier Robert #define TT_WRT_LCL_OFFSET 0x10 4219c2daa00SOllivier Robert #define TT_WRT_SYNC_GEN_OFF 0x11 4229c2daa00SOllivier Robert #define TT_WRT_CNFG_REG_2 0x12 4239c2daa00SOllivier Robert #define TT_WRT_TIME_CMP_REG 0x13 4249c2daa00SOllivier Robert #define TT_WRT_PRESET_REG 0x14 4259c2daa00SOllivier Robert #define TT_WRT_EXT_EVNT_REG 0x15 4269c2daa00SOllivier Robert #define TT_WRT_SIG_LVL_REG 0x16 4279c2daa00SOllivier Robert 4289c2daa00SOllivier Robert /* 4299c2daa00SOllivier Robert * Define the length of the buffers to move (in 32 bit words). 4309c2daa00SOllivier Robert */ 4319c2daa00SOllivier Robert 4329c2daa00SOllivier Robert #define HW_CTL_REG_LEN 1 4339c2daa00SOllivier Robert #define CNFG_REG_1_LEN 1 4349c2daa00SOllivier Robert #define DIAG_REG_LEN 1 4359c2daa00SOllivier Robert #define LCL_OFFSET_LEN 1 4369c2daa00SOllivier Robert #define SYNC_GEN_OFF_LEN 1 4379c2daa00SOllivier Robert #define CNFG_REG_2_LEN 1 4389c2daa00SOllivier Robert 4399c2daa00SOllivier Robert #define TIME_CMP_REG_LEN 2 4409c2daa00SOllivier Robert #define PRESET_TIME_REG_LEN 3 4419c2daa00SOllivier Robert #define PRESET_POS_REG_LEN 4 4429c2daa00SOllivier Robert #define PRESET_REG_LEN (PRESET_TIME_REG_LEN+PRESET_POS_REG_LEN) 4439c2daa00SOllivier Robert #define TIME_FREEZE_REG_LEN 3 4449c2daa00SOllivier Robert #define POSN_FREEZE_REG_LEN 4 4459c2daa00SOllivier Robert #define FREEZE_REG_LEN (TIME_FREEZE_REG_LEN+POSN_FREEZE_REG_LEN) 4469c2daa00SOllivier Robert #define EXT_EVNT_REG_LEN 3 4479c2daa00SOllivier Robert #define SIG_LVL_REG_LEN 7 4489c2daa00SOllivier Robert #define GPS_TIME_LEN 7 4499c2daa00SOllivier Robert 4509c2daa00SOllivier Robert /* 4519c2daa00SOllivier Robert * Define BCD - INT - BCD macros. 4529c2daa00SOllivier Robert */ 4539c2daa00SOllivier Robert 4549c2daa00SOllivier Robert #define BCDTOI(a) ( ( ( ( (a) & 0xf0 ) >> 4 ) * 10 ) + ( (a) & 0x0f ) ) 4559c2daa00SOllivier Robert #define ITOBCD(a) ( ( ( ( (a) ) / 10) << 4 ) + ( ( (a) ) % 10) ) 4569c2daa00SOllivier Robert #define LTOBCD(a) ( ( ( ( (uint64_t)(a) ) / 10) << 4 ) + ( ( (uint64_t)(a) ) % 10) ) 4579c2daa00SOllivier Robert 4589c2daa00SOllivier Robert extern int init_560 ( ); 4599c2daa00SOllivier Robert extern void close_560 ( ); 4609c2daa00SOllivier Robert extern int write_hw_ctl_reg (hw_ctl_reg_t *); 4619c2daa00SOllivier Robert extern int write_hw_ctl_reg_bitfield (int, int ); 4629c2daa00SOllivier Robert extern int read_conf_reg (conf_reg_t *); 4639c2daa00SOllivier Robert extern int read_conf_reg_bitfield (int ); 4649c2daa00SOllivier Robert extern int write_conf_reg (conf_reg_t *); 4659c2daa00SOllivier Robert extern int write_conf_reg_bitfield (int, unsigned char ); 4669c2daa00SOllivier Robert extern int read_hw_stat_reg_bitfield (int ); 4679c2daa00SOllivier Robert extern int read_local_offset_reg (local_off_t *); 4689c2daa00SOllivier Robert extern int write_local_offset_reg (local_off_t *); 4699c2daa00SOllivier Robert extern int read_sync_offset_reg (sync_gen_off_reg_t *); 4709c2daa00SOllivier Robert extern int write_sync_offset_reg (sync_gen_off_reg_t *); 4719c2daa00SOllivier Robert extern int read_time_cmp_reg (time_cmp_reg_t *); 4729c2daa00SOllivier Robert extern int write_time_cmp_reg (time_cmp_reg_t *); 4739c2daa00SOllivier Robert extern int read_preset_time_reg (preset_time_reg_t *); 4749c2daa00SOllivier Robert extern int write_preset_time_reg (preset_time_reg_t *); 4759c2daa00SOllivier Robert extern int reset_time ( ); 4769c2daa00SOllivier Robert extern int set_new_time (preset_time_reg_t *); 4779c2daa00SOllivier Robert extern int read_preset_position_reg (pos_reg_t *); 4789c2daa00SOllivier Robert extern int write_preset_position_reg (pos_reg_t *); 4799c2daa00SOllivier Robert extern int read_external_event_reg (ext_time_event_reg_t *); 4809c2daa00SOllivier Robert extern int read_signal_level_reg (sig_levels_t *); 4819c2daa00SOllivier Robert extern int freeze_time ( ); 4829c2daa00SOllivier Robert extern int snapshot_time (time_freeze_reg_t *); 4839c2daa00SOllivier Robert extern int read_position_freeze_reg (pos_reg_t *); 4849c2daa00SOllivier Robert extern int read_diag_reg (diag_reg_t *); 4859c2daa00SOllivier Robert 4869c2daa00SOllivier Robert #ifdef CPP 4879c2daa00SOllivier Robert } 4889c2daa00SOllivier Robert #endif 4899c2daa00SOllivier Robert #endif 490