1 /*- 2 * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB 3 * 4 * Copyright (c) 2021 - 2022 Intel Corporation 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenFabrics.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 /*$FreeBSD$*/ 35 36 #ifndef _ICRDMA_OSDEP_H_ 37 #define _ICRDMA_OSDEP_H_ 38 39 #include <stdatomic.h> 40 #include <stdbool.h> 41 #include <stdio.h> 42 #include <infiniband/types.h> 43 #include <infiniband/verbs.h> 44 #include <infiniband/udma_barrier.h> 45 #include <sys/bus.h> 46 #include <sys/bus_dma.h> 47 #include <sys/endian.h> 48 49 #define ATOMIC atomic_t 50 #define IOMEM 51 #define IRDMA_NTOHL(a) ntohl(a) 52 #define IRDMA_NTOHS(a) ntohs(a) 53 #define MAKEMASK(m, s) ((m) << (s)) 54 #define OS_TIMER timer_list 55 #define OS_LIST_HEAD list_head 56 #define OS_LIST_ENTRY list_head 57 #define DECLARE_HASHTABLE(n, b) struct hlist_head (n)[1 << (b)] 58 #define HASH_MIN(v, b) (sizeof(v) <= 4 ? hash_32(v, b) : hash_long(v, b)) 59 #define HASH_FOR_EACH_RCU(n, b, o, m) for ((b) = 0, o = NULL; o == NULL && (b) < ARRAY_SIZE(n);\ 60 (b)++)\ 61 hlist_for_each_entry_rcu(o, &n[(b)], m) 62 #define HASH_FOR_EACH_POSSIBLE_RCU(n, o, m, k) \ 63 hlist_for_each_entry_rcu(o, &n[jhash(&k, sizeof(k), 0) >> (32 - ilog2(ARRAY_SIZE(n)))],\ 64 m) 65 #define HASH_FOR_EACH_POSSIBLE(n, o, m, k) \ 66 hlist_for_each_entry(o, &n[jhash(&k, sizeof(k), 0) >> (32 - ilog2(ARRAY_SIZE(n)))],\ 67 m) 68 #define HASH_ADD_RCU(h, n, k) \ 69 hlist_add_head_rcu(n, &h[jhash(&k, sizeof(k), 0) >> (32 - ilog2(ARRAY_SIZE(h)))]) 70 #define HASH_DEL_RCU(tbl, node) hlist_del_rcu(node) 71 #define HASH_ADD(h, n, k) \ 72 hlist_add_head(n, &h[jhash(&k, sizeof(k), 0) >> (32 - ilog2(ARRAY_SIZE(h)))]) 73 #define HASH_DEL(tbl, node) hlist_del(node) 74 75 #define WQ_UNBOUND_MAX_ACTIVE max_t(int, 512, num_possible_cpus() * 4) 76 #define if_addr_rlock(x) 77 #define if_addr_runlock(x) 78 79 /* constants */ 80 #define STATS_TIMER_DELAY 60000 81 82 /* a couple of linux size defines */ 83 #define SZ_128 128 84 #define SZ_2K SZ_128 * 16 85 #define SZ_1G (SZ_1K * SZ_1K * SZ_1K) 86 #define SPEED_1000 1000 87 #define SPEED_10000 10000 88 #define SPEED_20000 20000 89 #define SPEED_25000 25000 90 #define SPEED_40000 40000 91 #define SPEED_100000 100000 92 93 #define BIT_ULL(a) (1ULL << (a)) 94 #define min(a, b) ((a) > (b) ? (b) : (a)) 95 #ifndef likely 96 #define likely(x) __builtin_expect((x), 1) 97 #endif 98 #ifndef unlikely 99 #define unlikely(x) __builtin_expect((x), 0) 100 #endif 101 102 #define __aligned_u64 uint64_t __aligned(8) 103 104 #define VLAN_PRIO_SHIFT 13 105 #if __FreeBSD_version < 1400000 106 #define IB_USER_VERBS_EX_CMD_MODIFY_QP IB_USER_VERBS_CMD_MODIFY_QP 107 #endif 108 109 /* 110 * debug definition section 111 */ 112 #define irdma_print(S, ...) printf("%s:%d "S, __FUNCTION__, __LINE__, ##__VA_ARGS__) 113 #define irdma_debug_buf(dev, mask, desc, buf, size) \ 114 do { \ 115 u32 i; \ 116 if (!((mask) & (dev)->debug_mask)) { \ 117 break; \ 118 } \ 119 irdma_debug(dev, mask, "%s\n", desc); \ 120 irdma_debug(dev, mask, "starting address virt=%p phy=%lxh\n", buf, irdma_get_virt_to_phy(buf)); \ 121 for (i = 0; i < size ; i += 8) \ 122 irdma_debug(dev, mask, "index %03d val: %016lx\n", i, ((unsigned long *)buf)[i / 8]); \ 123 } while(0) 124 125 #define irdma_debug(h, m, s, ...) \ 126 do { \ 127 if (!(h)) { \ 128 if ((m) == IRDMA_DEBUG_INIT) \ 129 printf("irdma INIT " s, ##__VA_ARGS__); \ 130 } else if (((m) & (h)->debug_mask)) { \ 131 printf("irdma " s, ##__VA_ARGS__); \ 132 } \ 133 } while (0) 134 extern unsigned int irdma_dbg; 135 #define libirdma_debug(fmt, args...) \ 136 do { \ 137 if (irdma_dbg) \ 138 printf("libirdma-%s: " fmt, __func__, ##args); \ 139 } while (0) 140 #define irdma_dev_err(a, b, ...) printf(b, ##__VA_ARGS__) 141 #define irdma_dev_warn(a, b, ...) printf(b, ##__VA_ARGS__) /*dev_warn(a, b)*/ 142 #define irdma_dev_info(a, b, ...) printf(b, ##__VA_ARGS__) 143 #define irdma_pr_warn printf 144 #define ibdev_err(ibdev, fmt, ...) printf("%s:"fmt, (ibdev)->name, ##__VA_ARGS__) 145 146 #define dump_struct(s, sz, name) \ 147 do { \ 148 unsigned char *a; \ 149 printf("%s %u", (name), (unsigned int)(sz)); \ 150 for (a = (unsigned char*)(s); a < (unsigned char *)(s) + (sz) ; a ++) { \ 151 if ((u64)a % 8 == 0) \ 152 printf("\n%p ", a); \ 153 printf("%2x ", *a); \ 154 } \ 155 printf("\n"); \ 156 }while(0) 157 158 /* 159 * debug definition end 160 */ 161 162 typedef __be16 BE16; 163 typedef __be32 BE32; 164 typedef uintptr_t irdma_uintptr; 165 166 struct irdma_hw; 167 struct irdma_pci_f; 168 struct irdma_sc_dev; 169 struct irdma_sc_qp; 170 struct irdma_sc_vsi; 171 172 #define irdma_pr_info(fmt, args ...) printf("%s: WARN "fmt, __func__, ## args) 173 #define irdma_pr_err(fmt, args ...) printf("%s: ERR "fmt, __func__, ## args) 174 #define irdma_memcpy(a, b, c) memcpy((a), (b), (c)) 175 #define irdma_memset(a, b, c) memset((a), (b), (c)) 176 #define irdma_usec_delay(x) DELAY(x) 177 #define mdelay(x) DELAY((x) * 1000) 178 179 #define rt_tos2priority(tos) (tos >> 5) 180 #define ah_attr_to_dmac(attr) ((attr).dmac) 181 #define kc_ib_modify_qp_is_ok(cur_state, next_state, type, mask, ll) \ 182 ib_modify_qp_is_ok(cur_state, next_state, type, mask) 183 #define kc_typeq_ib_wr const 184 #define kc_ifp_find ip_ifp_find 185 #define kc_ifp6_find ip6_ifp_find 186 #define kc_rdma_gid_attr_network_type(sgid_attr, gid_type, gid) \ 187 ib_gid_to_network_type(gid_type, gid) 188 #define irdma_del_timer_compat(tt) del_timer((tt)) 189 #define IRDMA_TAILQ_FOREACH CK_STAILQ_FOREACH 190 #define IRDMA_TAILQ_FOREACH_SAFE CK_STAILQ_FOREACH_SAFE 191 #define between(a, b, c) (bool)(c-a >= b-a) 192 193 static inline void db_wr32(__u32 val, __u32 *wqe_word) 194 { 195 *wqe_word = val; 196 } 197 198 void *hw_to_dev(struct irdma_hw *hw); 199 200 struct irdma_dma_mem { 201 void *va; 202 u64 pa; 203 bus_dma_tag_t tag; 204 bus_dmamap_t map; 205 bus_dma_segment_t seg; 206 bus_size_t size; 207 int nseg; 208 int flags; 209 }; 210 211 struct irdma_virt_mem { 212 void *va; 213 u32 size; 214 }; 215 216 #ifndef verbs_mr 217 enum ibv_mr_type { 218 IBV_MR_TYPE_MR, 219 IBV_MR_TYPE_NULL_MR, 220 }; 221 222 struct verbs_mr { 223 struct ibv_mr ibv_mr; 224 enum ibv_mr_type mr_type; 225 int access; 226 }; 227 #define verbs_get_mr(mr) container_of((mr), struct verbs_mr, ibv_mr) 228 #endif 229 #endif /* _ICRDMA_OSDEP_H_ */ 230