1 /*
2  * \file       trc_cmp_cfg_etmv4.h
3  * \brief      OpenCSD :
4  *
5  * \copyright  Copyright (c) 2015, ARM Limited. All Rights Reserved.
6  */
7 
8 
9 /*
10  * Redistribution and use in source and binary forms, with or without modification,
11  * are permitted provided that the following conditions are met:
12  *
13  * 1. Redistributions of source code must retain the above copyright notice,
14  * this list of conditions and the following disclaimer.
15  *
16  * 2. Redistributions in binary form must reproduce the above copyright notice,
17  * this list of conditions and the following disclaimer in the documentation
18  * and/or other materials provided with the distribution.
19  *
20  * 3. Neither the name of the copyright holder nor the names of its contributors
21  * may be used to endorse or promote products derived from this software without
22  * specific prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND
25  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27  * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
28  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34  */
35 
36 #ifndef ARM_TRC_CMP_CFG_ETMV4_H_INCLUDED
37 #define ARM_TRC_CMP_CFG_ETMV4_H_INCLUDED
38 
39 #include "trc_pkt_types_etmv4.h"
40 #include "common/trc_cs_config.h"
41 
42 
43 /** @addtogroup ocsd_protocol_cfg
44 @{*/
45 
46 /** @name ETMv4 configuration
47 @{*/
48 
49 /*!
50  * @class EtmV4Config
51  * @brief Interpreter class for etm v4 config structure.
52  *
53  * Provides quick value interpretation methods for the ETMv4 config register values.
54  * Primarily inlined for efficient code.
55  */
56 class EtmV4Config : public CSConfig // public ocsd_etmv4_cfg
57 {
58 public:
59     EtmV4Config();  /**< Default constructor */
60     EtmV4Config(const ocsd_etmv4_cfg *cfg_regs);
61     ~EtmV4Config() {}; /**< Default destructor */
62 
63 // operations to convert to and from C-API structure
64 
65     //! copy assignment operator for base structure into class.
66     EtmV4Config & operator=(const ocsd_etmv4_cfg *p_cfg);
67 
68     //! cast operator returning struct const reference
69     operator const ocsd_etmv4_cfg &() const { return m_cfg; };
70     //! cast operator returning struct const pointer
71     operator const ocsd_etmv4_cfg *() const { return &m_cfg; };
72 
73     const ocsd_core_profile_t &coreProfile() const { return m_cfg.core_prof; };
74     const ocsd_arch_version_t &archVersion() const { return m_cfg.arch_ver; };
75 
76     /* idr 0 */
77     const bool LSasInstP0() const;
78     const bool hasDataTrace() const;
79     const bool hasBranchBroadcast() const;
80     const bool hasCondTrace() const;
81     const bool hasCycleCountI() const;
82     const bool hasRetStack() const;
83     const uint8_t numEvents() const;
84 
85     typedef enum _condType {
86         COND_PASS_FAIL,
87         COND_HAS_ASPR
88     } condType;
89 
90     const condType hasCondType() const;
91 
92     typedef enum _QSuppType {
93         Q_NONE,
94         Q_ICOUNT_ONLY,
95         Q_NO_ICOUNT_ONLY,
96         Q_FULL
97     } QSuppType;
98 
99     const QSuppType getQSuppType();
100     const bool hasQElem();
101     const bool hasQFilter();
102 
103     const bool hasTrcExcpData() const;
104     const uint32_t TimeStampSize() const;
105 
106     const bool commitOpt1() const;
107 
108     /* idr 1 */
109     const uint8_t MajVersion() const;
110     const uint8_t MinVersion() const;
111     const uint8_t FullVersion() const;
112 
113     /* idr 2 */
114     const uint32_t iaSizeMax() const;
115     const uint32_t cidSize() const;
116     const uint32_t vmidSize();
117     const uint32_t daSize() const;
118     const uint32_t dvSize() const;
119     const uint32_t ccSize() const;
120     const bool vmidOpt() const;
121     const bool wfiwfeBranch() const;
122 
123     /* id regs 8-13*/
124     const uint32_t MaxSpecDepth() const;
125     const uint32_t P0_Key_Max() const;
126     const uint32_t P1_Key_Max() const;
127     const uint32_t P1_Spcl_Key_Max() const;
128     const uint32_t CondKeyMax() const;
129     const uint32_t CondSpecKeyMax() const;
130     const uint32_t CondKeyMaxIncr() const;
131 
132     /* trace idr */
133     virtual const uint8_t getTraceID() const; //!< CoreSight Trace ID for this device.
134 
135     /* config R */
136     const bool enabledDVTrace() const;
137     const bool enabledDATrace() const;
138     const bool enabledDataTrace() const;
139 
140     typedef enum {
141         LSP0_NONE,
142         LSP0_L,
143         LSP0_S,
144         LSP0_LS
145     } LSP0_t;
146 
147     const bool enabledLSP0Trace() const;
148     const LSP0_t LSP0Type() const;
149 
150     const bool enabledBrBroad() const;
151     const bool enabledCCI() const;
152     const bool enabledCID() const;
153     const bool enabledVMID() const;
154 
155     typedef enum {
156         COND_TR_DIS,
157         COND_TR_LD,
158         COND_TR_ST,
159         COND_TR_LDST,
160         COND_TR_ALL
161     } CondITrace_t;
162 
163     const CondITrace_t enabledCondITrace();
164 
165     const bool enabledTS() const;
166     const bool enabledRetStack() const;
167 
168     const bool enabledQE() const;
169 
170 private:
171     void PrivateInit();
172     void CalcQSupp();
173     void CalcVMIDSize();
174 
175     bool m_QSuppCalc;
176     bool m_QSuppFilter;
177     QSuppType m_QSuppType;
178 
179     bool m_VMIDSzCalc;
180     uint32_t m_VMIDSize;
181 
182     bool m_condTraceCalc;
183     CondITrace_t m_CondTrace;
184 
185 protected:
186     ocsd_etmv4_cfg m_cfg;
187     uint8_t m_MajVer;
188     uint8_t m_MinVer;
189 
190 };
191 
192 /* idr 0 */
193 inline const bool EtmV4Config::LSasInstP0() const
194 {
195     return (bool)((m_cfg.reg_idr0 & 0x6) == 0x6);
196 }
197 
198 inline const bool EtmV4Config::hasDataTrace() const
199 {
200     return (bool)((m_cfg.reg_idr0 & 0x18) == 0x18);
201 }
202 
203 inline const bool EtmV4Config::hasBranchBroadcast() const
204 {
205     return (bool)((m_cfg.reg_idr0 & 0x20) == 0x20);
206 }
207 
208 inline const bool EtmV4Config::hasCondTrace() const
209 {
210     return (bool)((m_cfg.reg_idr0 & 0x40) == 0x40);
211 }
212 
213 inline const bool EtmV4Config::hasCycleCountI() const
214 {
215     return (bool)((m_cfg.reg_idr0 & 0x80) == 0x80);
216 }
217 
218 inline const bool EtmV4Config::hasRetStack() const
219 {
220     return (bool)((m_cfg.reg_idr0 & 0x200) == 0x200);
221 }
222 
223 inline const uint8_t EtmV4Config::numEvents() const
224 {
225     return ((m_cfg.reg_idr0 >> 10) & 0x3) + 1;
226 }
227 
228 inline const EtmV4Config::condType EtmV4Config::hasCondType() const
229 {
230     return ((m_cfg.reg_idr0 & 0x3000) == 0x1000) ? EtmV4Config::COND_HAS_ASPR : EtmV4Config::COND_PASS_FAIL;
231 }
232 
233 inline const EtmV4Config::QSuppType EtmV4Config::getQSuppType()
234 {
235     if(!m_QSuppCalc) CalcQSupp();
236     return m_QSuppType;
237 }
238 
239 inline const bool EtmV4Config::hasQElem()
240 {
241     if(!m_QSuppCalc) CalcQSupp();
242     return (bool)(m_QSuppType != Q_NONE);
243 }
244 
245 inline const bool EtmV4Config::hasQFilter()
246 {
247     if(!m_QSuppCalc) CalcQSupp();
248     return m_QSuppFilter;
249 }
250 
251 inline const bool EtmV4Config::hasTrcExcpData() const
252 {
253     return (bool)((m_cfg.reg_idr0 & 0x20000) == 0x20000);
254 }
255 
256 inline const uint32_t EtmV4Config::TimeStampSize() const
257 {
258     uint32_t tsSizeF = (m_cfg.reg_idr0 >> 24) & 0x1F;
259     if(tsSizeF == 0x6)
260         return 48;
261     if(tsSizeF == 0x8)
262         return 64;
263     return 0;
264 }
265 
266 inline const bool EtmV4Config::commitOpt1() const
267 {
268     return (bool)((m_cfg.reg_idr0 & 0x20000000) == 0x20000000) && hasCycleCountI();
269 }
270 
271     /* idr 1 */
272 inline const uint8_t EtmV4Config::MajVersion() const
273 {
274     return m_MajVer;
275 }
276 
277 inline const uint8_t EtmV4Config::MinVersion() const
278 {
279     return m_MinVer;
280 }
281 
282 inline const uint8_t EtmV4Config::FullVersion() const
283 {
284     return (m_MajVer << 4) | m_MinVer;
285 }
286 
287 /* idr 2 */
288 inline const uint32_t EtmV4Config::iaSizeMax() const
289 {
290     return ((m_cfg.reg_idr2 & 0x1F) == 0x8) ? 64 : 32;
291 }
292 
293 inline const uint32_t EtmV4Config::cidSize() const
294 {
295     return (((m_cfg.reg_idr2 >> 5) & 0x1F) == 0x4) ? 32 : 0;
296 }
297 
298 inline const uint32_t EtmV4Config::vmidSize()
299 {
300     if(!m_VMIDSzCalc)
301     {
302         CalcVMIDSize();
303     }
304     return m_VMIDSize;
305 }
306 
307 inline const uint32_t EtmV4Config::daSize() const
308 {
309     uint32_t daSizeF = ((m_cfg.reg_idr2 >> 15) & 0x1F);
310     if(daSizeF)
311         return (((m_cfg.reg_idr2 >> 15) & 0x1F) == 0x8) ? 64 : 32;
312     return 0;
313 }
314 
315 inline const uint32_t EtmV4Config::dvSize() const
316 {
317     uint32_t dvSizeF = ((m_cfg.reg_idr2 >> 20) & 0x1F);
318     if(dvSizeF)
319         return (((m_cfg.reg_idr2 >> 20) & 0x1F) == 0x8) ? 64 : 32;
320     return 0;
321 }
322 
323 inline const uint32_t EtmV4Config::ccSize() const
324 {
325     return ((m_cfg.reg_idr2 >> 25) & 0xF) + 12;
326 }
327 
328 inline const bool EtmV4Config::vmidOpt() const
329 {
330     return (bool)((m_cfg.reg_idr2 & 0x20000000) == 0x20000000) && (MinVersion() > 0);
331 }
332 
333 inline const bool EtmV4Config::wfiwfeBranch() const
334 {
335     return (bool)((m_cfg.reg_idr2 & 0x80000000) && (FullVersion() >= 0x43));
336 }
337 
338 
339 /* id regs 8-13*/
340 
341 inline const uint32_t EtmV4Config::MaxSpecDepth() const
342 {
343     return m_cfg.reg_idr8;
344 }
345 
346 inline const uint32_t EtmV4Config::P0_Key_Max() const
347 {
348     return (m_cfg.reg_idr9 == 0) ? 1 : m_cfg.reg_idr9;
349 }
350 
351 inline const uint32_t EtmV4Config::P1_Key_Max() const
352 {
353     return m_cfg.reg_idr10;
354 }
355 
356 inline const uint32_t  EtmV4Config::P1_Spcl_Key_Max() const
357 {
358     return m_cfg.reg_idr11;
359 }
360 
361 inline const uint32_t EtmV4Config::CondKeyMax() const
362 {
363     return m_cfg.reg_idr12;
364 }
365 
366 inline const uint32_t EtmV4Config::CondSpecKeyMax() const
367 {
368     return m_cfg.reg_idr13;
369 }
370 
371 inline const uint32_t EtmV4Config::CondKeyMaxIncr() const
372 {
373     return m_cfg.reg_idr12 - m_cfg.reg_idr13;
374 }
375 
376 inline const uint8_t EtmV4Config::getTraceID() const
377 {
378     return (uint8_t)(m_cfg.reg_traceidr & 0x7F);
379 }
380 
381     /* config R */
382 inline const bool EtmV4Config::enabledDVTrace() const
383 {
384     return hasDataTrace() && enabledLSP0Trace() && ((m_cfg.reg_configr & (0x1 << 17)) != 0);
385 }
386 
387 inline const bool EtmV4Config::enabledDATrace() const
388 {
389     return hasDataTrace() && enabledLSP0Trace() && ((m_cfg.reg_configr & (0x1 << 16)) != 0);
390 }
391 
392 inline const bool EtmV4Config::enabledDataTrace() const
393 {
394     return enabledDATrace() || enabledDVTrace();
395 }
396 
397 inline const bool EtmV4Config::enabledLSP0Trace() const
398 {
399     return ((m_cfg.reg_configr & 0x6) != 0);
400 }
401 
402 inline const EtmV4Config::LSP0_t EtmV4Config::LSP0Type() const
403 {
404     return (LSP0_t)((m_cfg.reg_configr & 0x6) >> 1);
405 }
406 
407 inline const bool EtmV4Config::enabledBrBroad() const
408 {
409     return ((m_cfg.reg_configr & (0x1 << 3)) != 0);
410 }
411 
412 inline const bool EtmV4Config::enabledCCI() const
413 {
414     return ((m_cfg.reg_configr & (0x1 << 4)) != 0);
415 }
416 
417 inline const bool EtmV4Config::enabledCID() const
418 {
419     return ((m_cfg.reg_configr & (0x1 << 6)) != 0);
420 }
421 
422 inline const bool EtmV4Config::enabledVMID() const
423 {
424     return ((m_cfg.reg_configr & (0x1 << 7)) != 0);
425 }
426 
427 inline const EtmV4Config::CondITrace_t EtmV4Config::enabledCondITrace()
428 {
429     if(!m_condTraceCalc)
430     {
431         switch((m_cfg.reg_configr >> 8) & 0x7)
432         {
433         default:
434         case 0: m_CondTrace = COND_TR_DIS; break;
435         case 1: m_CondTrace = COND_TR_LD; break;
436         case 2: m_CondTrace = COND_TR_ST; break;
437         case 3: m_CondTrace = COND_TR_LDST; break;
438         case 7: m_CondTrace = COND_TR_ALL; break;
439         }
440         m_condTraceCalc = true;
441     }
442     return m_CondTrace;
443 }
444 
445 inline const bool EtmV4Config::enabledTS() const
446 {
447     return ((m_cfg.reg_configr & (0x1 << 11)) != 0);
448 }
449 
450 inline const bool EtmV4Config::enabledRetStack() const
451 {
452     return ((m_cfg.reg_configr & (0x1 << 12)) != 0);
453 }
454 
455 inline const bool EtmV4Config::enabledQE() const
456 {
457        return ((m_cfg.reg_configr & (0x3 << 13)) != 0);
458 }
459 
460 /** @}*/
461 /** @}*/
462 
463 #endif // ARM_TRC_CMP_CFG_ETMV4_H_INCLUDED
464 
465 /* End of File trc_cmp_cfg_etmv4.h */
466