1 /* 2 * \file trc_pkt_decode_etmv4i.h 3 * \brief OpenCSD : ETMv4 instruction decoder 4 * 5 * \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved. 6 */ 7 8 /* 9 * Redistribution and use in source and binary forms, with or without modification, 10 * are permitted provided that the following conditions are met: 11 * 12 * 1. Redistributions of source code must retain the above copyright notice, 13 * this list of conditions and the following disclaimer. 14 * 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * 3. Neither the name of the copyright holder nor the names of its contributors 20 * may be used to endorse or promote products derived from this software without 21 * specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #ifndef ARM_TRC_PKT_DECODE_ETMV4I_H_INCLUDED 36 #define ARM_TRC_PKT_DECODE_ETMV4I_H_INCLUDED 37 38 #include "common/trc_pkt_decode_base.h" 39 #include "opencsd/etmv4/trc_pkt_elem_etmv4i.h" 40 #include "opencsd/etmv4/trc_cmp_cfg_etmv4.h" 41 #include "common/trc_gen_elem.h" 42 #include "common/trc_ret_stack.h" 43 #include "common/ocsd_gen_elem_stack.h" 44 #include "opencsd/etmv4/trc_etmv4_stack_elem.h" 45 46 class TrcStackElem; 47 class TrcStackElemParam; 48 class TrcStackElemCtxt; 49 50 class TrcPktDecodeEtmV4I : public TrcPktDecodeBase<EtmV4ITrcPacket, EtmV4Config> 51 { 52 public: 53 TrcPktDecodeEtmV4I(); 54 TrcPktDecodeEtmV4I(int instIDNum); 55 virtual ~TrcPktDecodeEtmV4I(); 56 57 protected: 58 /* implementation packet decoding interface */ 59 virtual ocsd_datapath_resp_t processPacket(); 60 virtual ocsd_datapath_resp_t onEOT(); 61 virtual ocsd_datapath_resp_t onReset(); 62 virtual ocsd_datapath_resp_t onFlush(); 63 virtual ocsd_err_t onProtocolConfig(); 64 virtual const uint8_t getCoreSightTraceID() { return m_CSID; }; 65 66 /* local decode methods */ 67 void initDecoder(); // initial state on creation (zeros all config) 68 void resetDecoder(); // reset state to start of decode. (moves state, retains config) 69 virtual void onFirstInitOK(); // override to set init related info. 70 71 ocsd_err_t decodePacket(); // decode packet into trace elements. return true to indicate decode complete - can change FSM to commit state - return is false. 72 ocsd_datapath_resp_t resolveElements(); // commit/cancel trace elements generated from latest / prior packets & send to output - may get wait response, or flag completion. 73 ocsd_err_t commitElements(); // commit elements - process element stack to generate output packets. 74 ocsd_err_t commitElemOnEOT(); 75 ocsd_err_t cancelElements(); // cancel elements. These not output 76 ocsd_err_t mispredictAtom(); // mispredict an atom 77 ocsd_err_t discardElements(); // discard elements and flush 78 79 void doTraceInfoPacket(); 80 void updateContext(TrcStackElemCtxt *pCtxtElem, OcsdTraceElement &elem); 81 82 // process atom will create instruction trace, or no memory access trace output elements. 83 ocsd_err_t processAtom(const ocsd_atm_val atom); 84 85 // process an exception element - output instruction trace + exception generic type. 86 ocsd_err_t processException(); 87 88 // process Q element 89 ocsd_err_t processQElement(); 90 91 // process a source address element 92 ocsd_err_t processSourceAddress(); 93 94 // process an element that cannot be cancelled / discarded 95 ocsd_err_t processTS_CC_EventElem(TrcStackElem *pElem); 96 97 // process marker elements 98 ocsd_err_t processMarkerElem(TrcStackElem *pElem); 99 100 // process a transaction element 101 ocsd_err_t processTransElem(TrcStackElem *pElem); 102 103 // process an Instrumentation element 104 ocsd_err_t processITEElem(TrcStackElem *pElem); 105 106 // process a bad packet 107 ocsd_err_t handleBadPacket(const char *reason, ocsd_trc_index_t index = OCSD_BAD_TRC_INDEX); 108 109 // sequencing error on packet processing - optionally continue 110 ocsd_err_t handlePacketSeqErr(ocsd_err_t err, ocsd_trc_index_t index, const char *reason); 111 112 // common packet error routine 113 ocsd_err_t handlePacketErr(ocsd_err_t err, ocsd_err_severity_t sev, ocsd_trc_index_t index, const char *reason); 114 115 ocsd_err_t addElemCC(TrcStackElemParam *pParamElem); 116 ocsd_err_t addElemTS(TrcStackElemParam *pParamElem, bool withCC); 117 ocsd_err_t addElemEvent(TrcStackElemParam *pParamElem); 118 119 private: 120 void SetInstrInfoInAddrISA(const ocsd_vaddr_t addr_val, const uint8_t isa); 121 const ocsd_isa calcISA(const bool SF, const uint8_t IS) const 122 { 123 if (SF) 124 return ocsd_isa_aarch64; 125 return (IS == 0) ? ocsd_isa_arm : ocsd_isa_thumb2; 126 } 127 typedef enum { 128 WP_NOT_FOUND, 129 WP_FOUND, 130 WP_NACC 131 } WP_res_t; 132 133 typedef struct { 134 ocsd_vaddr_t st_addr; 135 ocsd_vaddr_t en_addr; 136 uint32_t num_instr; 137 } instr_range_t; 138 139 //!< follow instructions from the current address to a WP. true if good, false if memory cannot be accessed. 140 ocsd_err_t traceInstrToWP(instr_range_t &instr_range, WP_res_t &WPRes, const bool traceToAddrNext = false, const ocsd_vaddr_t nextAddrMatch = 0); 141 142 inline const bool WPFound(WP_res_t res) const { return (res == WP_FOUND); }; 143 inline const bool WPNacc(WP_res_t res) const { return (res == WP_NACC); }; 144 145 ocsd_err_t returnStackPop(); // pop return stack and update instruction address. 146 147 void setElemTraceRange(OcsdTraceElement &elemIn, const instr_range_t &addr_range, const bool executed, ocsd_trc_index_t index); 148 void setElemTraceRangeInstr(OcsdTraceElement &elemIn, const instr_range_t &addr_range, 149 const bool executed, ocsd_trc_index_t index, ocsd_instr_info &instr); 150 151 // true if we are ETE configured. 152 inline bool isETEConfig() { 153 return (m_config->MajVersion() >= ETE_ARCH_VERSION); 154 } 155 156 ocsd_mem_space_acc_t getCurrMemSpace(); 157 158 //** intra packet state (see ETMv4 spec 6.2.1); 159 160 // timestamping 161 uint64_t m_timestamp; // last broadcast global Timestamp. 162 bool m_ete_first_ts_marker; 163 164 // state and context 165 uint32_t m_context_id; // most recent context ID 166 uint32_t m_vmid_id; // most recent VMID 167 bool m_is_secure; // true if Secure 168 bool m_is_64bit; // true if 64 bit 169 uint8_t m_last_IS; // last instruction set value from address packet. 170 171 // cycle counts 172 int m_cc_threshold; 173 174 // speculative trace 175 int m_curr_spec_depth; 176 int m_max_spec_depth; // nax depth - from ID reg, beyond which auto-commit occurs 177 int m_unseen_spec_elem; // speculative elements at decode start 178 179 /** Remove elements that are associated with data trace */ 180 #ifdef DATA_TRACE_SUPPORTED 181 // data trace associative elements (unsupported at present in the decoder). 182 int m_p0_key; 183 int m_p0_key_max; 184 185 // conditional non-branch trace - when data trace active (unsupported at present in the decoder) 186 int m_cond_c_key; 187 int m_cond_r_key; 188 int m_cond_key_max_incr; 189 #endif 190 191 uint8_t m_CSID; //!< Coresight trace ID for this decoder. 192 193 bool m_IASize64; //!< True if 64 bit instruction addresses supported. 194 195 //** Other processor state; 196 197 // trace decode FSM 198 typedef enum { 199 NO_SYNC, //!< pre start trace - init state or after reset or overflow, loss of sync. 200 WAIT_SYNC, //!< waiting for sync packet. 201 WAIT_TINFO, //!< waiting for trace info packet. 202 DECODE_PKTS, //!< processing packets - creating decode elements on stack 203 RESOLVE_ELEM, //!< analyze / resolve decode elements - create generic trace elements and pass on. 204 } processor_state_t; 205 206 processor_state_t m_curr_state; 207 unsync_info_t m_unsync_eot_info; //!< addition info when / why unsync / eot 208 209 //** P0 element stack 210 EtmV4P0Stack m_P0_stack; //!< P0 decode element stack 211 212 // element resolution 213 struct { 214 int P0_commit; //!< number of elements to commit 215 int P0_cancel; //!< elements to cancel 216 bool mispredict; //!< mispredict latest atom 217 bool discard; //!< discard elements 218 } m_elem_res; 219 220 //! true if any of the element resolution fields are non-zero 221 const bool isElemForRes() const { 222 return (m_elem_res.P0_commit || m_elem_res.P0_cancel || 223 m_elem_res.mispredict || m_elem_res.discard); 224 } 225 226 void clearElemRes() { 227 m_elem_res.P0_commit = 0; 228 m_elem_res.P0_cancel = 0; 229 m_elem_res.mispredict = false; 230 m_elem_res.discard = false; 231 } 232 233 // packet decode state 234 bool m_need_ctxt; //!< need context to continue 235 bool m_need_addr; //!< need an address to continue 236 bool m_elem_pending_addr; //!< next address packet is needed for prev element. 237 238 ocsd_instr_info m_instr_info; //!< instruction info for code follower - in address is the next to be decoded. 239 240 etmv4_trace_info_t m_trace_info; //!< trace info for this trace run. 241 242 bool m_prev_overflow; 243 244 TrcAddrReturnStack m_return_stack; //!< the address return stack. 245 246 //** output element handling 247 OcsdGenElemStack m_out_elem; //!< output element stack. 248 OcsdTraceElement &outElem() { return m_out_elem.getCurrElem(); }; //!< current out element 249 }; 250 251 #endif // ARM_TRC_PKT_DECODE_ETMV4I_H_INCLUDED 252 253 /* End of File trc_pkt_decode_etmv4i.h */ 254