1 /* 2 * \file trc_pkt_types_etmv4.h 3 * \brief OpenCSD : ETMv4 / ETE packet info 4 * 5 * \copyright Copyright (c) 2015,2019,2022 ARM Limited. All Rights Reserved. 6 */ 7 8 9 /* 10 * Redistribution and use in source and binary forms, with or without modification, 11 * are permitted provided that the following conditions are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright notice, 17 * this list of conditions and the following disclaimer in the documentation 18 * and/or other materials provided with the distribution. 19 * 20 * 3. Neither the name of the copyright holder nor the names of its contributors 21 * may be used to endorse or promote products derived from this software without 22 * specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 30 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 31 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 33 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 #ifndef ARM_TRC_PKT_TYPES_ETMV4_H_INCLUDED 37 #define ARM_TRC_PKT_TYPES_ETMV4_H_INCLUDED 38 39 #include "opencsd/trc_pkt_types.h" 40 41 /** @addtogroup trc_pkts 42 @{*/ 43 44 /** @name ETMv4 Packet Types, ETE packet Types 45 @{*/ 46 47 /** I stream packets. */ 48 typedef enum _ocsd_etmv4_i_pkt_type 49 { 50 /* state of decode markers */ 51 ETM4_PKT_I_NOTSYNC = 0x200, /*!< no sync found yet. */ 52 ETM4_PKT_I_INCOMPLETE_EOT, /*!< flushing incomplete/empty packet at end of trace.*/ 53 ETM4_PKT_I_NO_ERR_TYPE, /*!< error type not set for packet. */ 54 55 /* markers for unknown/bad packets */ 56 ETM4_PKT_I_BAD_SEQUENCE = 0x300, /*!< invalid sequence for packet type. */ 57 ETM4_PKT_I_BAD_TRACEMODE, /*!< invalid packet type for this trace mode. */ 58 ETM4_PKT_I_RESERVED, /*!< packet type reserved. */ 59 ETM4_PKT_I_RESERVED_CFG, /*!< packet type reserved for current configuration */ 60 61 /* I stream packet types. */ 62 /* extension header. */ 63 ETM4_PKT_I_EXTENSION = 0x00, /*!< b00000000 */ 64 65 /* sync */ 66 ETM4_PKT_I_TRACE_INFO = 0x01, /*!< b00000001 */ 67 // timestamp 68 ETM4_PKT_I_TIMESTAMP = 0x02, /*!< b0000001x */ 69 ETM4_PKT_I_TRACE_ON = 0x04, /*!< b00000100 */ 70 ETM4_PKT_I_FUNC_RET = 0x05, /*!< b00000101 (V8M only) */ 71 // Exceptions 72 ETM4_PKT_I_EXCEPT = 0x06, /*!< b00000110 */ 73 ETM4_PKT_I_EXCEPT_RTN = 0x07, /*!< b00000111 (ETE invalid) */ 74 75 /* unused encoding 0x08 b00001000 */ 76 ETE_PKT_I_ITE = 0x09, /*! b00001001 (ETE only) */ 77 ETE_PKT_I_TRANS_ST = 0x0A, /*! b00001010 (ETE only) */ 78 ETE_PKT_I_TRANS_COMMIT = 0x0B, /*! b00001011 (ETE only) */ 79 80 /* cycle count packets */ 81 ETM4_PKT_I_CCNT_F2 = 0x0C, /*!< b0000110x */ 82 ETM4_PKT_I_CCNT_F1 = 0x0E, /*!< b0000111x */ 83 ETM4_PKT_I_CCNT_F3 = 0x10, /*!< b0001xxxx */ 84 85 // data synchronisation markers 86 ETM4_PKT_I_NUM_DS_MKR = 0x20, /*!< b00100xxx */ 87 ETM4_PKT_I_UNNUM_DS_MKR = 0x28, /*!< b00101000 to b00101100 0x2C */ 88 89 // speculation 90 ETM4_PKT_I_COMMIT = 0x2D, /*!< b00101101 */ 91 ETM4_PKT_I_CANCEL_F1 = 0x2E, /*!< b00101110 */ 92 ETM4_PKT_I_CANCEL_F1_MISPRED = 0x2F, /*!< b00101111 */ 93 ETM4_PKT_I_MISPREDICT = 0x30, /*!< b001100xx */ 94 ETM4_PKT_I_CANCEL_F2 = 0x34, /*!< b001101xx */ 95 ETM4_PKT_I_CANCEL_F3 = 0x38, /*!< b00111xxx */ 96 97 /* conditional instruction tracing - (reserved encodings ETE) */ 98 ETM4_PKT_I_COND_I_F2 = 0x40, /*!< b01000000 - b01000010 */ 99 ETM4_PKT_I_COND_FLUSH = 0x43, /*!< b01000011 */ 100 ETM4_PKT_I_COND_RES_F4 = 0x44, /*!< b0100010x, b01000110 */ 101 /* unused encoding 0x47 b01000111 */ 102 ETM4_PKT_I_COND_RES_F2 = 0x48, /*!< b0100100x, b01001010, b0100110x, b01001110 */ 103 /* unused encodings 0x4B,0x4F b01001011, b01001111 */ 104 ETM4_PKT_I_COND_RES_F3 = 0x50, /*!< b0101xxxx */ 105 /* unused encodings 0x60-0x67 b01100xxx */ 106 ETM4_PKT_I_COND_RES_F1 = 0x68, /*!< b011010xx, b0110111x 0x68-0x6B, 0x6e-0x6F */ 107 ETM4_PKT_I_COND_I_F1 = 0x6C, /*!< b01101100 */ 108 ETM4_PKT_I_COND_I_F3 = 0x6D, /*!< b01101101 */ 109 110 // event trace 111 ETM4_PKT_I_IGNORE = 0x70, /*!< b01110000 */ 112 ETM4_PKT_I_EVENT = 0x71, /*!< b01110001 to 0x01111111 0x7F */ 113 114 /* address and context */ 115 ETM4_PKT_I_CTXT = 0x80, /*!< b1000000x */ 116 ETM4_PKT_I_ADDR_CTXT_L_32IS0 = 0x82, /*!< b10000010 */ 117 ETM4_PKT_I_ADDR_CTXT_L_32IS1, /*!< b10000011 */ 118 /* unused encoding 0x84 b10000100 */ 119 ETM4_PKT_I_ADDR_CTXT_L_64IS0 = 0x85, /*!< b10000101 */ 120 ETM4_PKT_I_ADDR_CTXT_L_64IS1, /*!< b10000110 */ 121 /* unused encoding 0x87 b10000111 */ 122 ETE_PKT_I_TS_MARKER = 0x88, /*!< b10001000 */ 123 /* unused encodings 0x89-0x8F b10001001 to b10001111 */ 124 ETM4_PKT_I_ADDR_MATCH = 0x90, /*!< b10010000 to b10010010 0x92 */ 125 /* unused encodings 0x93-0x94 b10010011 to b10010010 */ 126 ETM4_PKT_I_ADDR_S_IS0 = 0x95, /*!< b10010101 */ 127 ETM4_PKT_I_ADDR_S_IS1, /*!< b10010110 */ 128 /* unused encodings 0x97 b10010111 to b10011001 0x99 */ 129 ETM4_PKT_I_ADDR_L_32IS0 = 0x9A, /*!< b10011010 */ 130 ETM4_PKT_I_ADDR_L_32IS1, /*!< b10011011 */ 131 /* unused encoding 0x9C b10011100 */ 132 ETM4_PKT_I_ADDR_L_64IS0 = 0x9D, /*!< b10011101 */ 133 ETM4_PKT_I_ADDR_L_64IS1, /*!< b10011110 */ 134 /* unused encoding 0x9F b10011111 */ 135 136 /* Q packets */ 137 ETM4_PKT_I_Q = 0xA0, /*!< b1010xxxx */ 138 139 /* ETE source address packets, unused ETMv4 */ 140 ETE_PKT_I_SRC_ADDR_MATCH = 0xB0, /*!< b101100xx */ 141 ETE_PKT_I_SRC_ADDR_S_IS0 = 0xB4, /*!< b10110100 */ 142 ETE_PKT_I_SRC_ADDR_S_IS1 = 0xB5, /*!< b10110101 */ 143 ETE_PKT_I_SRC_ADDR_L_32IS0 = 0xB6, /*!< b10110110 */ 144 ETE_PKT_I_SRC_ADDR_L_32IS1 = 0xB7, /*!< b10110111 */ 145 ETE_PKT_I_SRC_ADDR_L_64IS0 = 0xB8, /*!< b10111000 */ 146 ETE_PKT_I_SRC_ADDR_L_64IS1 = 0xB9, /*!< b10111001 */ 147 /* unused encodings 0xBA-0xBF b10111010 - b10111111 */ 148 149 /* Atom packets */ 150 ETM4_PKT_I_ATOM_F6 = 0xC0, /*!< b11000000 - b11010100 0xC0 - 0xD4, b11100000 - b11110100 0xE0 - 0xF4 */ 151 ETM4_PKT_I_ATOM_F5 = 0xD5, /*!< b11010101 - b11010111 0xD5 - 0xD7, b11110101 0xF5 */ 152 ETM4_PKT_I_ATOM_F2 = 0xD8, /*!< b110110xx to 0xDB */ 153 ETM4_PKT_I_ATOM_F4 = 0xDC, /*!< b110111xx to 0xDF */ 154 ETM4_PKT_I_ATOM_F1 = 0xF6, /*!< b1111011x to 0xF7 */ 155 ETM4_PKT_I_ATOM_F3 = 0xF8, /*!< b11111xxx to 0xFF */ 156 157 // extension packets - follow 0x00 header 158 ETM4_PKT_I_ASYNC = 0x100, //!< b00000000 159 ETM4_PKT_I_DISCARD = 0x103, //!< b00000011 160 ETM4_PKT_I_OVERFLOW = 0x105, //!< b00000101 161 162 // ETE extended types 163 ETE_PKT_I_PE_RESET = 0x400, // base type is exception packet. 164 ETE_PKT_I_TRANS_FAIL = 0x401, // base type is exception packet. 165 166 } ocsd_etmv4_i_pkt_type; 167 168 typedef union _etmv4_trace_info_t { 169 uint32_t val; //!< trace info full value. 170 struct { 171 uint32_t cc_enabled:1; //!< 1 if cycle count enabled 172 uint32_t cond_enabled:3; //!< conditional trace enabled type. 173 uint32_t p0_load:1; //!< 1 if tracing with P0 load elements (for data trace) 174 uint32_t p0_store:1; //!< 1 if tracing with P0 store elements (for data trace) 175 uint32_t in_trans_state:1; //!< 1 if starting trace when in a transactional state (ETE trace). 176 } bits; //!< bitfields for trace info value. 177 } etmv4_trace_info_t; 178 179 typedef struct _etmv4_context_t { 180 struct { 181 uint32_t EL:2; //!< exception level. 182 uint32_t SF:1; //!< sixty four bit 183 uint32_t NS:1; //!< none secure 184 uint32_t updated:1; //!< updated this context packet (otherwise same as last time) 185 uint32_t updated_c:1; //!< updated CtxtID 186 uint32_t updated_v:1; //!< updated VMID 187 uint32_t NSE:1; //!< PE FEAT_RME: root / realm indicator 188 }; 189 uint32_t ctxtID; //!< Current ctxtID 190 uint32_t VMID; //!< current VMID 191 } etmv4_context_t; 192 193 /** a broadcast address value. */ 194 typedef struct _etmv4_addr_val_t { 195 ocsd_vaddr_t val; //!< Address value. 196 uint8_t isa; //!< instruction set. 197 } etmv4_addr_val_t; 198 199 typedef struct _ocsd_etmv4_i_pkt 200 { 201 ocsd_etmv4_i_pkt_type type; /**< Trace packet type derived from header byte */ 202 203 //** intra-packet data - valid across packets. 204 205 ocsd_pkt_vaddr v_addr; //!< most recently broadcast address packet 206 uint8_t v_addr_ISA; //!< ISA for the address packet. (0 = IS0 / 1 = IS1) 207 208 etmv4_context_t context; //!< current context for PE 209 210 struct { 211 uint64_t timestamp; //!< current timestamp value 212 uint8_t bits_changed; //!< bits updated in this timestamp packet. 213 } ts; 214 215 uint32_t cc_threshold; //!< cycle count threshold - from trace info. 216 217 // single packet data - only valid for specific packet types on packet instance. 218 ocsd_pkt_atom atom; //!< atom elements - number of atoms indicates validity of packet 219 uint32_t cycle_count; //!< cycle count 220 221 uint32_t curr_spec_depth; //!< current speculation depth 222 uint32_t p0_key; //!< current P0 key value for data packet synchronisation 223 224 uint32_t commit_elements; //<! commit elements indicated by this packet - valid dependent on the packet type. 225 uint32_t cancel_elements; //<! cancel elements indicated by this packet - valid dependent on the packet type. 226 227 etmv4_trace_info_t trace_info; //!< trace info structure - programmed configuration of trace capture. 228 229 struct { 230 uint32_t exceptionType:10; //!< exception number 231 uint32_t addr_interp:2; //!< address value interpretation 232 uint32_t m_fault_pending:1; //!< M class fault pending. 233 uint32_t m_type:1; //!< 1 if M class exception. 234 } exception_info; 235 236 237 uint8_t addr_exact_match_idx; //!< address match index in this packet. 238 uint8_t dsm_val; //!< Data Sync Marker number, or unnumbered atom count - packet type determines. 239 uint8_t event_val; //!< Event value on event packet. 240 241 struct { 242 uint32_t cond_c_key; 243 uint8_t num_c_elem; 244 struct { 245 uint32_t cond_key_set:1; 246 uint32_t f3_final_elem:1; 247 uint32_t f2_cond_incr:1; 248 }; 249 } cond_instr; 250 251 struct { 252 uint32_t cond_r_key_0; 253 uint32_t cond_r_key_1; 254 struct { 255 uint32_t res_0:4; 256 uint32_t res_1:4; 257 uint32_t ci_0:1; 258 uint32_t ci_1:1; 259 uint32_t key_res_0_set:1; 260 uint32_t key_res_1_set:1; 261 uint32_t f2_key_incr:2; 262 uint32_t f2f4_token:2; 263 uint32_t f3_tokens:12; 264 }; 265 } cond_result; 266 267 struct { 268 uint32_t q_count; 269 struct { 270 uint32_t addr_present:1; 271 uint32_t addr_match:1; 272 uint32_t count_present:1; 273 uint32_t q_type:4; 274 }; 275 } Q_pkt; 276 277 struct { 278 uint8_t el; 279 uint64_t value; 280 } ite_pkt; 281 282 //! valid bits for packet elements (addresses have their own valid bits). 283 union { 284 uint32_t val; 285 struct { 286 uint32_t context_valid:1; 287 uint32_t ts_valid:1; 288 uint32_t spec_depth_valid:1; 289 uint32_t p0_key_valid:1; 290 uint32_t cond_c_key_valid:1; 291 uint32_t cond_r_key_valid:1; 292 uint32_t trace_info_valid:1; 293 uint32_t cc_thresh_valid:1; 294 uint32_t cc_valid:1; 295 uint32_t commit_elem_valid:1; 296 } bits; 297 } pkt_valid; 298 299 // original header type when packet type changed to error on decode error. 300 ocsd_etmv4_i_pkt_type err_type; 301 uint8_t err_hdr_val; 302 303 // protocol version - validity of ETE specific fields 0xMm == v Major.minor 304 uint8_t protocol_version; 305 306 } ocsd_etmv4_i_pkt; 307 308 309 // D stream packets 310 typedef enum _ocsd_etmv4_d_pkt_type 311 { 312 // markers for unknown/bad packets 313 ETM4_PKT_D_NOTSYNC = 0x200, //!< no sync found yet 314 ETM4_PKT_D_BAD_SEQUENCE, //!< invalid sequence for packet type 315 ETM4_PKT_D_BAD_TRACEMODE, //!< invalid packet type for this trace mode. 316 ETM4_PKT_D_RESERVED, //!< packet type reserved. 317 ETM4_PKT_D_INCOMPLETE_EOT, //!< flushing incomplete packet at end of trace. 318 ETM4_PKT_D_NO_HEADER, //!< waiting for a header byte 319 ETM4_PKT_D_NO_ERR_TYPE, //!< error packet has no header based type. Use with unknown/res packet types. 320 321 // data sync markers 322 ETM4_PKT_DNUM_DS_MKR = 0x111, // ext packet, b0001xxx1 323 // extension header 324 ETM4_PKT_D_EXTENSION = 0x00, //!< b00000000 325 326 ETM4_PKT_DUNNUM_DS_MKR = 0x01, //!< b00000001 327 // event trace 328 ETM4_PKT_DEVENT = 0x04, //!< b00000100 329 // timestamp 330 ETM4_PKT_DTIMESTAMP = 0x02, //!< b00000010 331 // P1 Data address 332 ETM4_PKT_DADDR_P1_F1 = 0x70, //!< b0111xxxx 333 ETM4_PKT_DADDR_P1_F2 = 0x80, //!< b10xxxxxx 334 ETM4_PKT_DADDR_P1_F3 = 0x14, //!< b000101xx 335 ETM4_PKT_DADDR_P1_F4 = 0x60, //!< b0110xxxx 336 ETM4_PKT_DADDR_P1_F5 = 0xF8, //!< b11111xxx 337 ETM4_PKT_DADDR_P1_F6 = 0xF6, //!< b1111011x 338 ETM4_PKT_DADDR_P1_F7 = 0xF5, //!< b11110101 339 // P2 Data value 340 ETM4_PKT_DVAL_P2_F1 = 0x20, //!< b0010xxxx 341 ETM4_PKT_DVAL_P2_F2 = 0x30, //!< b00110xxx 342 ETM4_PKT_DVAL_P2_F3 = 0x40, //!< b010xxxxx 343 ETM4_PKT_DVAL_P2_F4 = 0x10, //!< b000100xx 344 ETM4_PKT_DVAL_P2_F5 = 0x18, //!< b00011xxx 345 ETM4_PKT_DVAL_P2_F6 = 0x38, //!< b00111xxx 346 // suppression 347 ETM4_PKT_DSUPPRESSION = 0x03, //!< b00000011 348 // synchronisation- extension packets - follow 0x00 header 349 ETM4_PKT_DTRACE_INFO = 0x101, //!< b00000001 350 351 // extension packets - follow 0x00 header 352 ETM4_PKT_D_ASYNC = 0x100, //!< b00000000 353 ETM4_PKT_D_DISCARD = 0x103, //!< b00000011 354 ETM4_PKT_D_OVERFLOW = 0x105 //!< b00000101 355 356 } ocsd_etmv4_d_pkt_type; 357 358 359 typedef struct _ocsd_etmv4_d_pkt 360 { 361 ocsd_etmv4_d_pkt_type type; 362 363 ocsd_pkt_vaddr d_addr; 364 365 uint64_t pkt_val; /**< Packet value -> data value, timestamp value, event value */ 366 367 ocsd_etmv4_d_pkt_type err_type; 368 369 } ocsd_etmv4_d_pkt; 370 371 typedef struct _ocsd_etmv4_cfg 372 { 373 uint32_t reg_idr0; /**< ID0 register */ 374 uint32_t reg_idr1; /**< ID1 register */ 375 uint32_t reg_idr2; /**< ID2 register */ 376 uint32_t reg_idr8; 377 uint32_t reg_idr9; 378 uint32_t reg_idr10; 379 uint32_t reg_idr11; 380 uint32_t reg_idr12; 381 uint32_t reg_idr13; 382 uint32_t reg_configr; /**< Config Register */ 383 uint32_t reg_traceidr; /**< Trace Stream ID register */ 384 ocsd_arch_version_t arch_ver; /**< Architecture version */ 385 ocsd_core_profile_t core_prof; /**< Core Profile */ 386 } ocsd_etmv4_cfg; 387 388 #define ETE_ARCH_VERSION 0x5 389 390 #define ETE_OPFLG_PKTDEC_SRCADDR_N_ATOMS 0x00010000 /**< Split source address output ranges for N-atoms */ 391 392 /** @}*/ 393 /** @}*/ 394 #endif // ARM_TRC_PKT_TYPES_ETMV4_H_INCLUDED 395 396 /* End of File trc_pkt_types_etmv4.h */ 397 398