1 /* 2 * \file trc_pkt_types_etmv4.h 3 * \brief OpenCSD : ETMv4 packet info 4 * 5 * \copyright Copyright (c) 2015,2019 ARM Limited. All Rights Reserved. 6 */ 7 8 9 /* 10 * Redistribution and use in source and binary forms, with or without modification, 11 * are permitted provided that the following conditions are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright notice, 17 * this list of conditions and the following disclaimer in the documentation 18 * and/or other materials provided with the distribution. 19 * 20 * 3. Neither the name of the copyright holder nor the names of its contributors 21 * may be used to endorse or promote products derived from this software without 22 * specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 30 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 31 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 33 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 #ifndef ARM_TRC_PKT_TYPES_ETMV4_H_INCLUDED 37 #define ARM_TRC_PKT_TYPES_ETMV4_H_INCLUDED 38 39 #include "opencsd/trc_pkt_types.h" 40 41 /** @addtogroup trc_pkts 42 @{*/ 43 44 /** @name ETMv4 Packet Types 45 @{*/ 46 47 /** I stream packets. */ 48 typedef enum _ocsd_etmv4_i_pkt_type 49 { 50 /* state of decode markers */ 51 ETM4_PKT_I_NOTSYNC = 0x200, /*!< no sync found yet. */ 52 ETM4_PKT_I_INCOMPLETE_EOT, /*!< flushing incomplete/empty packet at end of trace.*/ 53 ETM4_PKT_I_NO_ERR_TYPE, /*!< error type not set for packet. */ 54 55 /* markers for unknown/bad packets */ 56 ETM4_PKT_I_BAD_SEQUENCE = 0x300, /*!< invalid sequence for packet type. */ 57 ETM4_PKT_I_BAD_TRACEMODE, /*!< invalid packet type for this trace mode. */ 58 ETM4_PKT_I_RESERVED, /*!< packet type reserved. */ 59 ETM4_PKT_I_RESERVED_CFG, /*!< packet type reserved for current configuration */ 60 61 /* I stream packet types. */ 62 /* extension header. */ 63 ETM4_PKT_I_EXTENSION = 0x00, /*!< b00000000 */ 64 65 /* sync */ 66 ETM4_PKT_I_TRACE_INFO = 0x01, /*!< b00000001 */ 67 // timestamp 68 ETM4_PKT_I_TIMESTAMP = 0x02, /*!< b0000001x */ 69 ETM4_PKT_I_TRACE_ON = 0x04, /*!< b00000100 */ 70 ETM4_PKT_I_FUNC_RET = 0x05, /*!< b00000101 (V8M only) */ 71 // Exceptions 72 ETM4_PKT_I_EXCEPT = 0x06, /*!< b00000110 */ 73 ETM4_PKT_I_EXCEPT_RTN = 0x07, /*!< b00000111 */ 74 75 /* unused encodings 0x08-0xB b00001000 to b00001011 */ 76 77 /* cycle count packets */ 78 ETM4_PKT_I_CCNT_F2 = 0x0C, /*!< b0000110x */ 79 ETM4_PKT_I_CCNT_F1 = 0x0E, /*!< b0000111x */ 80 ETM4_PKT_I_CCNT_F3 = 0x10, /*!< b0001xxxx */ 81 82 // data synchronisation markers 83 ETM4_PKT_I_NUM_DS_MKR = 0x20, /*!< b00100xxx */ 84 ETM4_PKT_I_UNNUM_DS_MKR = 0x28, /*!< b00101000 to b00101100 0x2C */ 85 86 // speculation 87 ETM4_PKT_I_COMMIT = 0x2D, /*!< b00101101 */ 88 ETM4_PKT_I_CANCEL_F1 = 0x2E, /*!< b00101110 */ 89 ETM4_PKT_I_CANCEL_F1_MISPRED = 0x2F, /*!< b00101111 */ 90 ETM4_PKT_I_MISPREDICT = 0x30, /*!< b001100xx */ 91 ETM4_PKT_I_CANCEL_F2 = 0x34, /*!< b001101xx */ 92 ETM4_PKT_I_CANCEL_F3 = 0x38, /*!< b00111xxx */ 93 94 /* conditional instruction tracing */ 95 ETM4_PKT_I_COND_I_F2 = 0x40, /*!< b01000000 - b01000010 */ 96 ETM4_PKT_I_COND_FLUSH = 0x43, /*!< b01000011 */ 97 ETM4_PKT_I_COND_RES_F4 = 0x44, /*!< b0100010x, b01000110 */ 98 /* unused encoding 0x47 b01000111 */ 99 ETM4_PKT_I_COND_RES_F2 = 0x48, /*!< b0100100x, b01001010, b0100110x, b01001110 */ 100 /* unused encodings 0x4B,0x4F b01001011, b01001111 */ 101 ETM4_PKT_I_COND_RES_F3 = 0x50, /*!< b0101xxxx */ 102 /* unused encodings 0x60-0x67 b01100xxx */ 103 ETM4_PKT_I_COND_RES_F1 = 0x68, /*!< b011010xx, b0110111x 0x68-0x6B, 0x6e-0x6F */ 104 ETM4_PKT_I_COND_I_F1 = 0x6C, /*!< b01101100 */ 105 ETM4_PKT_I_COND_I_F3 = 0x6D, /*!< b01101101 */ 106 107 // event trace 108 ETM4_PKT_I_IGNORE = 0x70, /*!< b01110000 */ 109 ETM4_PKT_I_EVENT = 0x71, /*!< b01110001 to 0x01111111 0x7F */ 110 111 /* address and context */ 112 ETM4_PKT_I_CTXT = 0x80, /*!< b1000000x */ 113 ETM4_PKT_I_ADDR_CTXT_L_32IS0 = 0x82, /*!< b10000010 */ 114 ETM4_PKT_I_ADDR_CTXT_L_32IS1, /*!< b10000011 */ 115 /* unused encoding 0x84 b10000100 */ 116 ETM4_PKT_I_ADDR_CTXT_L_64IS0 = 0x85, /*!< b10000101 */ 117 ETM4_PKT_I_ADDR_CTXT_L_64IS1, /*!< b10000110 */ 118 /* unused encoding 0x87 b10000111 */ 119 /* unused encodings 0x88-0x8F b10001xxx */ 120 ETM4_PKT_I_ADDR_MATCH = 0x90, /*!< b10010000 to b10010010 0x92 */ 121 /* unused encodings 0x93-0x94 b10010011 to b10010010 */ 122 ETM4_PKT_I_ADDR_S_IS0 = 0x95, /*!< b10010101 */ 123 ETM4_PKT_I_ADDR_S_IS1, /*!< b10010110 */ 124 /* unused encodings 0x97 b10010111 to b10011001 0x99 */ 125 ETM4_PKT_I_ADDR_L_32IS0 = 0x9A, /*!< b10011010 */ 126 ETM4_PKT_I_ADDR_L_32IS1, /*!< b10011011 */ 127 /* unused encoding 0x9C b10011100 */ 128 ETM4_PKT_I_ADDR_L_64IS0 = 0x9D, /*!< b10011101 */ 129 ETM4_PKT_I_ADDR_L_64IS1, /*!< b10011110 */ 130 /* unused encoding 0x9F b10011111 */ 131 132 /* Q packets */ 133 ETM4_PKT_I_Q = 0xA0, /*!< b1010xxxx */ 134 135 /* unused encodings 0xB0-0xBF b1011xxxx */ 136 137 /* Atom packets */ 138 ETM4_PKT_I_ATOM_F6 = 0xC0, /*!< b11000000 - b11010100 0xC0 - 0xD4, b11100000 - b11110100 0xE0 - 0xF4 */ 139 ETM4_PKT_I_ATOM_F5 = 0xD5, /*!< b11010101 - b11010111 0xD5 - 0xD7, b11110101 0xF5 */ 140 ETM4_PKT_I_ATOM_F2 = 0xD8, /*!< b110110xx to 0xDB */ 141 ETM4_PKT_I_ATOM_F4 = 0xDC, /*!< b110111xx to 0xDF */ 142 ETM4_PKT_I_ATOM_F1 = 0xF6, /*!< b1111011x to 0xF7 */ 143 ETM4_PKT_I_ATOM_F3 = 0xF8, /*!< b11111xxx to 0xFF */ 144 145 // extension packets - follow 0x00 header 146 ETM4_PKT_I_ASYNC = 0x100, //!< b00000000 147 ETM4_PKT_I_DISCARD = 0x103, //!< b00000011 148 ETM4_PKT_I_OVERFLOW = 0x105, //!< b00000101 149 150 } ocsd_etmv4_i_pkt_type; 151 152 typedef union _etmv4_trace_info_t { 153 uint32_t val; //!< trace info full value. 154 struct { 155 uint32_t cc_enabled:1; //!< 1 if cycle count enabled 156 uint32_t cond_enabled:3; //!< conditional trace enabeld type 157 uint32_t p0_load:1; //!< 1 if tracing with P0 load elements (for data trace) 158 uint32_t p0_store:1; //!< 1 if tracing with P0 store elements (for data trace) 159 } bits; //!< bitfields for trace info value. 160 } etmv4_trace_info_t; 161 162 typedef struct _etmv4_context_t { 163 struct { 164 uint32_t EL:2; //!< exception level. 165 uint32_t SF:1; //!< sixty four bit 166 uint32_t NS:1; //!< none secure 167 uint32_t updated:1; //!< updated this context packet (otherwise same as last time) 168 uint32_t updated_c:1; //!< updated CtxtID 169 uint32_t updated_v:1; //!< updated VMID 170 }; 171 uint32_t ctxtID; //!< Current ctxtID 172 uint32_t VMID; //!< current VMID 173 } etmv4_context_t; 174 175 /** a broadcast address value. */ 176 typedef struct _etmv4_addr_val_t { 177 ocsd_vaddr_t val; //!< Address value. 178 uint8_t isa; //!< instruction set. 179 } etmv4_addr_val_t; 180 181 typedef struct _ocsd_etmv4_i_pkt 182 { 183 ocsd_etmv4_i_pkt_type type; /**< Trace packet type derived from header byte */ 184 185 //** intra-packet data - valid across packets. 186 187 ocsd_pkt_vaddr v_addr; //!< most recently broadcast address packet 188 uint8_t v_addr_ISA; //!< ISA for the address packet. (0 = IS0 / 1 = IS1) 189 190 etmv4_context_t context; //!< current context for PE 191 192 struct { 193 uint64_t timestamp; //!< current timestamp value 194 uint8_t bits_changed; //!< bits updated in this timestamp packet. 195 } ts; 196 197 uint32_t cc_threshold; //!< cycle count threshold - from trace info. 198 199 // single packet data - only valid for specific packet types on packet instance. 200 ocsd_pkt_atom atom; //!< atom elements - number of atoms indicates validity of packet 201 uint32_t cycle_count; //!< cycle count 202 203 uint32_t curr_spec_depth; //!< current speculation depth 204 uint32_t p0_key; //!< current P0 key value for data packet synchronisation 205 206 uint32_t commit_elements; //<! commit elements indicated by this packet - valid dependent on the packet type. 207 uint32_t cancel_elements; //<! cancel elements indicated by this packet - valid dependent on the packet type. 208 209 etmv4_trace_info_t trace_info; //!< trace info structure - programmed configuration of trace capture. 210 211 struct { 212 uint32_t exceptionType:10; //!< exception number 213 uint32_t addr_interp:2; //!< address value interpretation 214 uint32_t m_fault_pending:1; //!< M class fault pending. 215 uint32_t m_type:1; //!< 1 if M class exception. 216 } exception_info; 217 218 219 uint8_t addr_exact_match_idx; //!< address match index in this packet. 220 uint8_t dsm_val; //!< Data Sync Marker number, or unnumbered atom count - packet type determines. 221 uint8_t event_val; //!< Event value on event packet. 222 223 struct { 224 uint32_t cond_c_key; 225 uint8_t num_c_elem; 226 struct { 227 uint32_t cond_key_set:1; 228 uint32_t f3_final_elem:1; 229 uint32_t f2_cond_incr:1; 230 }; 231 } cond_instr; 232 233 struct { 234 uint32_t cond_r_key_0; 235 uint32_t cond_r_key_1; 236 struct { 237 uint32_t res_0:4; 238 uint32_t res_1:4; 239 uint32_t ci_0:1; 240 uint32_t ci_1:1; 241 uint32_t key_res_0_set:1; 242 uint32_t key_res_1_set:1; 243 uint32_t f2_key_incr:2; 244 uint32_t f2f4_token:2; 245 uint32_t f3_tokens:12; 246 }; 247 } cond_result; 248 249 struct { 250 uint32_t q_count; 251 struct { 252 uint32_t addr_present:1; 253 uint32_t addr_match:1; 254 uint32_t count_present:1; 255 uint32_t q_type:4; 256 }; 257 } Q_pkt; 258 259 //! valid bits for packet elements (addresses have their own valid bits). 260 union { 261 uint32_t val; 262 struct { 263 uint32_t context_valid:1; 264 uint32_t ts_valid:1; 265 uint32_t spec_depth_valid:1; 266 uint32_t p0_key_valid:1; 267 uint32_t cond_c_key_valid:1; 268 uint32_t cond_r_key_valid:1; 269 uint32_t trace_info_valid:1; 270 uint32_t cc_thresh_valid:1; 271 uint32_t cc_valid:1; 272 uint32_t commit_elem_valid:1; 273 } bits; 274 } pkt_valid; 275 276 // original header type when packet type changed to error on decode error. 277 ocsd_etmv4_i_pkt_type err_type; 278 uint8_t err_hdr_val; 279 280 } ocsd_etmv4_i_pkt; 281 282 283 // D stream packets 284 typedef enum _ocsd_etmv4_d_pkt_type 285 { 286 // markers for unknown/bad packets 287 ETM4_PKT_D_NOTSYNC = 0x200, //!< no sync found yet 288 ETM4_PKT_D_BAD_SEQUENCE, //!< invalid sequence for packet type 289 ETM4_PKT_D_BAD_TRACEMODE, //!< invalid packet type for this trace mode. 290 ETM4_PKT_D_RESERVED, //!< packet type reserved. 291 ETM4_PKT_D_INCOMPLETE_EOT, //!< flushing incomplete packet at end of trace. 292 ETM4_PKT_D_NO_HEADER, //!< waiting for a header byte 293 ETM4_PKT_D_NO_ERR_TYPE, //!< error packet has no header based type. Use with unknown/res packet types. 294 295 // data sync markers 296 ETM4_PKT_DNUM_DS_MKR = 0x111, // ext packet, b0001xxx1 297 // extension header 298 ETM4_PKT_D_EXTENSION = 0x00, //!< b00000000 299 300 ETM4_PKT_DUNNUM_DS_MKR = 0x01, //!< b00000001 301 // event trace 302 ETM4_PKT_DEVENT = 0x04, //!< b00000100 303 // timestamp 304 ETM4_PKT_DTIMESTAMP = 0x02, //!< b00000010 305 // P1 Data address 306 ETM4_PKT_DADDR_P1_F1 = 0x70, //!< b0111xxxx 307 ETM4_PKT_DADDR_P1_F2 = 0x80, //!< b10xxxxxx 308 ETM4_PKT_DADDR_P1_F3 = 0x14, //!< b000101xx 309 ETM4_PKT_DADDR_P1_F4 = 0x60, //!< b0110xxxx 310 ETM4_PKT_DADDR_P1_F5 = 0xF8, //!< b11111xxx 311 ETM4_PKT_DADDR_P1_F6 = 0xF6, //!< b1111011x 312 ETM4_PKT_DADDR_P1_F7 = 0xF5, //!< b11110101 313 // P2 Data value 314 ETM4_PKT_DVAL_P2_F1 = 0x20, //!< b0010xxxx 315 ETM4_PKT_DVAL_P2_F2 = 0x30, //!< b00110xxx 316 ETM4_PKT_DVAL_P2_F3 = 0x40, //!< b010xxxxx 317 ETM4_PKT_DVAL_P2_F4 = 0x10, //!< b000100xx 318 ETM4_PKT_DVAL_P2_F5 = 0x18, //!< b00011xxx 319 ETM4_PKT_DVAL_P2_F6 = 0x38, //!< b00111xxx 320 // suppression 321 ETM4_PKT_DSUPPRESSION = 0x03, //!< b00000011 322 // synchronisation- extension packets - follow 0x00 header 323 ETM4_PKT_DTRACE_INFO = 0x101, //!< b00000001 324 325 // extension packets - follow 0x00 header 326 ETM4_PKT_D_ASYNC = 0x100, //!< b00000000 327 ETM4_PKT_D_DISCARD = 0x103, //!< b00000011 328 ETM4_PKT_D_OVERFLOW = 0x105 //!< b00000101 329 330 } ocsd_etmv4_d_pkt_type; 331 332 333 typedef struct _ocsd_etmv4_d_pkt 334 { 335 ocsd_etmv4_d_pkt_type type; 336 337 ocsd_pkt_vaddr d_addr; 338 339 uint64_t pkt_val; /**< Packet value -> data value, timestamp value, event value */ 340 341 ocsd_etmv4_d_pkt_type err_type; 342 343 } ocsd_etmv4_d_pkt; 344 345 typedef struct _ocsd_etmv4_cfg 346 { 347 uint32_t reg_idr0; /**< ID0 register */ 348 uint32_t reg_idr1; /**< ID1 register */ 349 uint32_t reg_idr2; /**< ID2 register */ 350 uint32_t reg_idr8; 351 uint32_t reg_idr9; 352 uint32_t reg_idr10; 353 uint32_t reg_idr11; 354 uint32_t reg_idr12; 355 uint32_t reg_idr13; 356 uint32_t reg_configr; /**< Config Register */ 357 uint32_t reg_traceidr; /**< Trace Stream ID register */ 358 ocsd_arch_version_t arch_ver; /**< Architecture version */ 359 ocsd_core_profile_t core_prof; /**< Core Profile */ 360 } ocsd_etmv4_cfg; 361 362 363 /** @}*/ 364 /** @}*/ 365 #endif // ARM_TRC_PKT_TYPES_ETMV4_H_INCLUDED 366 367 /* End of File trc_pkt_types_etmv4.h */ 368 369