1# $FreeBSD$ 2 3CRTARCH= ${MACHINE_CPUARCH:C/amd64/x86_64/} 4 5CRTSRC= ${SRCTOP}/contrib/llvm-project/compiler-rt/lib/builtins 6 7.PATH: ${CRTSRC}/${CRTARCH} 8.PATH: ${CRTSRC} 9 10SRCF+= absvdi2 11SRCF+= absvsi2 12SRCF+= absvti2 13SRCF+= addvdi3 14SRCF+= addvsi3 15SRCF+= addvti3 16SRCF+= apple_versioning 17SRCF+= ashldi3 18SRCF+= ashlti3 19SRCF+= ashrdi3 20SRCF+= ashrti3 21SRCF+= clear_cache 22SRCF+= clzdi2 23SRCF+= clzsi2 24SRCF+= clzti2 25SRCF+= cmpdi2 26SRCF+= cmpti2 27SRCF+= ctzdi2 28SRCF+= ctzsi2 29SRCF+= ctzti2 30SRCF+= divdc3 31SRCF+= divdi3 32SRCF+= divmoddi4 33SRCF+= divmodsi4 34SRCF+= divsc3 35SRCF+= divsi3 36SRCF+= divtc3 37SRCF+= divti3 38SRCF+= divxc3 39SRCF+= enable_execute_stack 40SRCF+= eprintf 41SRCF+= extendhfsf2 42SRCF+= ffsdi2 43SRCF+= ffssi2 44SRCF+= ffsti2 45SRCF+= fixdfdi 46SRCF+= fixdfti 47SRCF+= fixsfdi 48SRCF+= fixsfti 49SRCF+= fixunsdfdi 50SRCF+= fixunsdfsi 51SRCF+= fixunsdfti 52SRCF+= fixunssfdi 53SRCF+= fixunssfsi 54SRCF+= fixunssfti 55SRCF+= fixunsxfdi 56SRCF+= fixunsxfsi 57SRCF+= fixunsxfti 58SRCF+= fixxfdi 59SRCF+= fixxfti 60SRCF+= floatditf 61SRCF+= floattidf 62SRCF+= floattisf 63SRCF+= floattixf 64SRCF+= floatunditf 65SRCF+= floatunsidf 66SRCF+= floatunsisf 67SRCF+= floatuntidf 68SRCF+= floatuntisf 69SRCF+= floatuntixf 70SRCF+= gcc_personality_v0 # not in upstream 71SRCF+= int_util 72SRCF+= lshrdi3 73SRCF+= lshrti3 74SRCF+= moddi3 75SRCF+= modsi3 76SRCF+= modti3 77SRCF+= muldc3 78SRCF+= muldi3 79SRCF+= mulodi4 80SRCF+= mulosi4 81SRCF+= muloti4 82SRCF+= mulsc3 83SRCF+= multc3 84SRCF+= multi3 85SRCF+= mulvdi3 86SRCF+= mulvsi3 87SRCF+= mulvti3 88SRCF+= mulxc3 89SRCF+= negdf2 90SRCF+= negdi2 91SRCF+= negsf2 92SRCF+= negti2 93SRCF+= negvdi2 94SRCF+= negvsi2 95SRCF+= negvti2 96SRCF+= paritydi2 97SRCF+= paritysi2 98SRCF+= parityti2 99SRCF+= popcountdi2 100SRCF+= popcountsi2 101SRCF+= popcountti2 102SRCF+= powidf2 103SRCF+= powisf2 104SRCF+= powitf2 105SRCF+= powixf2 106SRCF+= subvdi3 107SRCF+= subvsi3 108SRCF+= subvti3 109SRCF+= trampoline_setup 110SRCF+= truncdfhf2 111SRCF+= truncsfhf2 112SRCF+= ucmpdi2 113SRCF+= ucmpti2 114SRCF+= udivdi3 115SRCF+= udivmoddi4 116SRCF+= udivmodsi4 117SRCF+= udivmodti4 118SRCF+= udivsi3 119SRCF+= udivti3 120SRCF+= umoddi3 121SRCF+= umodsi3 122SRCF+= umodti3 123 124# Avoid using SSE2 instructions on i386, if unsupported. 125.if ${MACHINE_CPUARCH} == "i386" && empty(MACHINE_CPU:Msse2) 126SRCS+= floatdidf.c 127SRCS+= floatdisf.c 128SRCS+= floatdixf.c 129SRCS+= floatundidf.c 130SRCS+= floatundisf.c 131SRCS+= floatundixf.c 132.else 133SRCF+= floatdidf 134SRCF+= floatdisf 135SRCF+= floatdixf 136SRCF+= floatundidf 137SRCF+= floatundisf 138SRCF+= floatundixf 139.endif 140 141# __cpu_model support, only used on x86 142.if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" 143SRCF+= cpu_model 144.endif 145 146# The fp_mode implementation for amd64 and i386 is shared, while other 147# architectures use the regular approach. 148.if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" 149SRCS+= i386/fp_mode.c 150.else 151SRCF+= fp_mode 152.endif 153 154# 155# 128-bit quad precision long double support, 156# only used on some architectures. 157# 158.if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "riscv" 159SRCF+= addtf3 160SRCF+= comparetf2 161SRCF+= divtf3 162SRCF+= extenddftf2 163SRCF+= extendsftf2 164SRCF+= fixtfdi 165SRCF+= fixtfsi 166SRCF+= fixtfti 167SRCF+= fixunstfdi 168SRCF+= fixunstfsi 169SRCF+= fixunstfti 170SRCF+= floatsitf 171SRCF+= floattitf 172SRCF+= floatunsitf 173SRCF+= floatuntitf 174SRCF+= multf3 175SRCF+= subtf3 176SRCF+= trunctfdf2 177SRCF+= trunctfsf2 178.endif 179 180# These are already shipped by libc.a on some architectures. 181.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips" && \ 182 ${MACHINE_CPUARCH} != "riscv" 183SRCF+= adddf3 184SRCF+= addsf3 185SRCF+= divdf3 186SRCF+= divsf3 187SRCF+= extendsfdf2 188SRCF+= fixdfsi 189SRCF+= fixsfsi 190SRCF+= floatsidf 191SRCF+= floatsisf 192SRCF+= muldf3 193SRCF+= mulsf3 194SRCF+= subdf3 195SRCF+= subsf3 196SRCF+= truncdfsf2 197.endif 198 199.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips" 200SRCF+= comparedf2 201SRCF+= comparesf2 202.endif 203 204# FreeBSD-specific atomic intrinsics. 205.if ${MACHINE_CPUARCH} == "arm" 206.PATH: ${SRCTOP}/sys/arm/arm 207 208SRCF+= stdatomic 209CFLAGS+= -DEMIT_SYNC_ATOMICS 210.elif ${MACHINE_CPUARCH} == "mips" 211.PATH: ${SRCTOP}/sys/mips/mips 212 213SRCF+= stdatomic 214.endif 215 216.if "${COMPILER_TYPE}" == "clang" && \ 217 (${MACHINE_ARCH} == "powerpc" || ${MACHINE_ARCH} == "powerpcspe") 218SRCS+= atomic.c 219CFLAGS.atomic.c+= -Wno-atomic-alignment 220.endif 221 222.for file in ${SRCF} 223.if ${MACHINE_ARCH:Marmv[67]*} && (!defined(CPUTYPE) || ${CPUTYPE:M*soft*} == "") \ 224 && exists(${CRTSRC}/${CRTARCH}/${file}vfp.S) 225SRCS+= ${file}vfp.S 226. elif exists(${CRTSRC}/${CRTARCH}/${file}.S) 227SRCS+= ${file}.S 228. else 229SRCS+= ${file}.c 230. endif 231.endfor 232 233.if ${MACHINE_CPUARCH} == "arm" 234SRCS+= aeabi_div0.c 235SRCS+= aeabi_idivmod.S 236SRCS+= aeabi_ldivmod.S 237SRCS+= aeabi_memcmp.S 238SRCS+= aeabi_memcpy.S 239SRCS+= aeabi_memmove.S 240SRCS+= aeabi_memset.S 241SRCS+= aeabi_uidivmod.S 242SRCS+= aeabi_uldivmod.S 243SRCS+= bswapdi2.S 244SRCS+= bswapsi2.S 245SRCS+= switch16.S 246SRCS+= switch32.S 247SRCS+= switch8.S 248SRCS+= switchu8.S 249SRCS+= sync_synchronize.S 250.endif 251 252# On some archs GCC-6.3 requires bswap32 built-in. 253.if ${MACHINE_CPUARCH} == "mips" || ${MACHINE_CPUARCH} == "riscv" 254SRCS+= bswapdi2.c 255SRCS+= bswapsi2.c 256.endif 257 258.if ${MACHINE_ARCH:Mriscv*sf} 259CFLAGS+= -D__SOFT_FP__ 260.endif 261