1[ 2 { 3 "BriefDescription": "Local INVITOE requests (exclusive ownership of a cache line without receiving data) that miss the SF/LLC and are sent to the CHA's home agent", 4 "Counter": "0,1,2,3", 5 "CounterType": "PGMABLE", 6 "EventCode": "0x50", 7 "EventName": "UNC_CHA_REQUESTS.INVITOE_LOCAL", 8 "PerPkg": "1", 9 "UMask": "0x10", 10 "Unit": "CHA" 11 }, 12 { 13 "BriefDescription": "Remote INVITOE requests (exclusive ownership of a cache line without receiving data) sent to the CHA's home agent", 14 "Counter": "0,1,2,3", 15 "CounterType": "PGMABLE", 16 "EventCode": "0x50", 17 "EventName": "UNC_CHA_REQUESTS.INVITOE_REMOTE", 18 "PerPkg": "1", 19 "UMask": "0x20", 20 "Unit": "CHA" 21 }, 22 { 23 "BriefDescription": "Local read requests that miss the SF/LLC and are sent to the CHA's home agent", 24 "Counter": "0,1,2,3", 25 "CounterType": "PGMABLE", 26 "EventCode": "0x50", 27 "EventName": "UNC_CHA_REQUESTS.READS_LOCAL", 28 "PerPkg": "1", 29 "UMask": "0x01", 30 "Unit": "CHA" 31 }, 32 { 33 "BriefDescription": "Remote read requests sent to the CHA's home agent", 34 "Counter": "0,1,2,3", 35 "CounterType": "PGMABLE", 36 "EventCode": "0x50", 37 "EventName": "UNC_CHA_REQUESTS.READS_REMOTE", 38 "PerPkg": "1", 39 "UMask": "0x02", 40 "Unit": "CHA" 41 }, 42 { 43 "BriefDescription": "Local write requests that miss the SF/LLC and are sent to the CHA's home agent", 44 "Counter": "0,1,2,3", 45 "CounterType": "PGMABLE", 46 "EventCode": "0x50", 47 "EventName": "UNC_CHA_REQUESTS.WRITES_LOCAL", 48 "PerPkg": "1", 49 "UMask": "0x04", 50 "Unit": "CHA" 51 }, 52 { 53 "BriefDescription": "Remote write requests sent to the CHA's home agent", 54 "Counter": "0,1,2,3", 55 "CounterType": "PGMABLE", 56 "EventCode": "0x50", 57 "EventName": "UNC_CHA_REQUESTS.WRITES_REMOTE", 58 "PerPkg": "1", 59 "UMask": "0x08", 60 "Unit": "CHA" 61 }, 62 { 63 "BriefDescription": "Clockticks of the uncore caching and home agent (CHA)", 64 "Counter": "0,1,2,3", 65 "CounterType": "PGMABLE", 66 "EventName": "UNC_CHA_CLOCKTICKS", 67 "PerPkg": "1", 68 "Unit": "CHA" 69 }, 70 { 71 "BriefDescription": "Normal priority reads issued to the memory controller from the CHA", 72 "Counter": "0,1,2,3", 73 "CounterType": "PGMABLE", 74 "EventCode": "0x59", 75 "EventName": "UNC_CHA_IMC_READS_COUNT.NORMAL", 76 "PerPkg": "1", 77 "UMask": "0x01", 78 "Unit": "CHA" 79 }, 80 { 81 "BriefDescription": "CHA to iMC Full Line Writes Issued : Full Line Non-ISOCH", 82 "Counter": "0,1,2,3", 83 "CounterType": "PGMABLE", 84 "EventCode": "0x5B", 85 "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL", 86 "PerPkg": "1", 87 "UMask": "0x01", 88 "Unit": "CHA" 89 }, 90 { 91 "BriefDescription": "Lines Victimized : All Lines Victimized", 92 "Counter": "0,1,2,3", 93 "CounterType": "PGMABLE", 94 "EventCode": "0x37", 95 "EventName": "UNC_CHA_LLC_VICTIMS.ALL", 96 "PerPkg": "1", 97 "UMask": "0x0F", 98 "Unit": "CHA" 99 }, 100 { 101 "BriefDescription": "Local read requests that miss the SF/LLC and remote read requests sent to the CHA's home agent", 102 "Counter": "0,1,2,3", 103 "CounterType": "PGMABLE", 104 "EventCode": "0x50", 105 "EventName": "UNC_CHA_REQUESTS.READS", 106 "PerPkg": "1", 107 "UMask": "0x03", 108 "Unit": "CHA" 109 }, 110 { 111 "BriefDescription": "Local write requests that miss the SF/LLC and remote write requests sent to the CHA's home agent", 112 "Counter": "0,1,2,3", 113 "CounterType": "PGMABLE", 114 "EventCode": "0x50", 115 "EventName": "UNC_CHA_REQUESTS.WRITES", 116 "PerPkg": "1", 117 "UMask": "0x0c", 118 "Unit": "CHA" 119 }, 120 { 121 "BriefDescription": "Snoop filter capacity evictions for E-state entries", 122 "Counter": "0,1,2,3", 123 "CounterType": "PGMABLE", 124 "EventCode": "0x3D", 125 "EventName": "UNC_CHA_SF_EVICTION.E_STATE", 126 "PerPkg": "1", 127 "UMask": "0x02", 128 "Unit": "CHA" 129 }, 130 { 131 "BriefDescription": "Snoop filter capacity evictions for M-state entries", 132 "Counter": "0,1,2,3", 133 "CounterType": "PGMABLE", 134 "EventCode": "0x3D", 135 "EventName": "UNC_CHA_SF_EVICTION.M_STATE", 136 "PerPkg": "1", 137 "UMask": "0x01", 138 "Unit": "CHA" 139 }, 140 { 141 "BriefDescription": "Snoop filter capacity evictions for S-state entries", 142 "Counter": "0,1,2,3", 143 "CounterType": "PGMABLE", 144 "EventCode": "0x3D", 145 "EventName": "UNC_CHA_SF_EVICTION.S_STATE", 146 "PerPkg": "1", 147 "UMask": "0x04", 148 "Unit": "CHA" 149 }, 150 { 151 "BriefDescription": "TOR Inserts : All requests from iA Cores", 152 "Counter": "0,1,2,3", 153 "CounterType": "PGMABLE", 154 "EventCode": "0x35", 155 "EventName": "UNC_CHA_TOR_INSERTS.IA", 156 "PerPkg": "1", 157 "UMask": "0xC001FF01", 158 "UMaskExt": "0xC001FF", 159 "Unit": "CHA" 160 }, 161 { 162 "BriefDescription": "TOR Inserts : All requests from iA Cores that Hit the LLC", 163 "Counter": "0,1,2,3", 164 "CounterType": "PGMABLE", 165 "EventCode": "0x35", 166 "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT", 167 "PerPkg": "1", 168 "UMask": "0xC001FD01", 169 "UMaskExt": "0xC001FD", 170 "Unit": "CHA" 171 }, 172 { 173 "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Hit the LLC", 174 "Counter": "0,1,2,3", 175 "CounterType": "PGMABLE", 176 "EventCode": "0x35", 177 "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD", 178 "PerPkg": "1", 179 "UMask": "0xC80FFD01", 180 "UMaskExt": "0xC80FFD", 181 "Unit": "CHA" 182 }, 183 { 184 "BriefDescription": "TOR Inserts : DRds issued by iA Cores that Hit the LLC", 185 "Counter": "0,1,2,3", 186 "CounterType": "PGMABLE", 187 "EventCode": "0x35", 188 "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD", 189 "PerPkg": "1", 190 "UMask": "0xC817FD01", 191 "UMaskExt": "0xC817FD", 192 "Unit": "CHA" 193 }, 194 { 195 "BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores that hit the LLC", 196 "Counter": "0,1,2,3", 197 "CounterType": "PGMABLE", 198 "EventCode": "0x35", 199 "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFRFO", 200 "PerPkg": "1", 201 "UMask": "0xCCC7FD01", 202 "UMaskExt": "0xCCC7FD", 203 "Unit": "CHA" 204 }, 205 { 206 "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Hit the LLC", 207 "Counter": "0,1,2,3", 208 "CounterType": "PGMABLE", 209 "EventCode": "0x35", 210 "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO", 211 "PerPkg": "1", 212 "UMask": "0xC807FD01", 213 "UMaskExt": "0xC807FD", 214 "Unit": "CHA" 215 }, 216 { 217 "BriefDescription": "TOR Inserts : All requests from iA Cores that Missed the LLC", 218 "Counter": "0,1,2,3", 219 "CounterType": "PGMABLE", 220 "EventCode": "0x35", 221 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", 222 "PerPkg": "1", 223 "UMask": "0xC001FE01", 224 "UMaskExt": "0xC001FE", 225 "Unit": "CHA" 226 }, 227 { 228 "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Missed the LLC", 229 "Counter": "0,1,2,3", 230 "CounterType": "PGMABLE", 231 "EventCode": "0x35", 232 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD", 233 "PerPkg": "1", 234 "UMask": "0xC80FFE01", 235 "UMaskExt": "0xC80FFE", 236 "Unit": "CHA" 237 }, 238 { 239 "BriefDescription": "TOR Inserts : DRds issued by iA Cores that Missed the LLC", 240 "Counter": "0,1,2,3", 241 "CounterType": "PGMABLE", 242 "EventCode": "0x35", 243 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD", 244 "PerPkg": "1", 245 "UMask": "0xC817FE01", 246 "UMaskExt": "0xC817FE", 247 "Unit": "CHA" 248 }, 249 { 250 "BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores that missed the LLC", 251 "Counter": "0,1,2,3", 252 "CounterType": "PGMABLE", 253 "EventCode": "0x35", 254 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO", 255 "PerPkg": "1", 256 "UMask": "0xCCC7FE01", 257 "UMaskExt": "0xCCC7FE", 258 "Unit": "CHA" 259 }, 260 { 261 "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Missed the LLC", 262 "Counter": "0,1,2,3", 263 "CounterType": "PGMABLE", 264 "EventCode": "0x35", 265 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO", 266 "PerPkg": "1", 267 "UMask": "0xC807FE01", 268 "UMaskExt": "0xC807FE", 269 "Unit": "CHA" 270 }, 271 { 272 "BriefDescription": "TOR Inserts : All requests from IO Devices", 273 "Counter": "0,1,2,3", 274 "CounterType": "PGMABLE", 275 "EventCode": "0x35", 276 "EventName": "UNC_CHA_TOR_INSERTS.IO", 277 "PerPkg": "1", 278 "UMask": "0xC001FF04", 279 "UMaskExt": "0xC001FF", 280 "Unit": "CHA" 281 }, 282 { 283 "BriefDescription": "TOR Inserts : All requests from IO Devices that hit the LLC", 284 "Counter": "0,1,2,3", 285 "CounterType": "PGMABLE", 286 "EventCode": "0x35", 287 "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT", 288 "PerPkg": "1", 289 "UMask": "0xC001FD04", 290 "UMaskExt": "0xC001FD", 291 "Unit": "CHA" 292 }, 293 { 294 "BriefDescription": "TOR Inserts : All requests from IO Devices that missed the LLC", 295 "Counter": "0,1,2,3", 296 "CounterType": "PGMABLE", 297 "EventCode": "0x35", 298 "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS", 299 "PerPkg": "1", 300 "UMask": "0xC001FE04", 301 "UMaskExt": "0xC001FE", 302 "Unit": "CHA" 303 }, 304 { 305 "BriefDescription": "TOR Occupancy : All requests from iA Cores", 306 "CounterType": "PGMABLE", 307 "EventCode": "0x36", 308 "EventName": "UNC_CHA_TOR_OCCUPANCY.IA", 309 "PerPkg": "1", 310 "UMask": "0xC001FF01", 311 "UMaskExt": "0xC001FF", 312 "Unit": "CHA" 313 }, 314 { 315 "BriefDescription": "TOR Occupancy : All requests from iA Cores that Hit the LLC", 316 "CounterType": "PGMABLE", 317 "EventCode": "0x36", 318 "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT", 319 "PerPkg": "1", 320 "UMask": "0xC001FD01", 321 "UMaskExt": "0xC001FD", 322 "Unit": "CHA" 323 }, 324 { 325 "BriefDescription": "TOR Occupancy : All requests from iA Cores that Missed the LLC", 326 "CounterType": "PGMABLE", 327 "EventCode": "0x36", 328 "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS", 329 "PerPkg": "1", 330 "UMask": "0xC001FE01", 331 "UMaskExt": "0xC001FE", 332 "Unit": "CHA" 333 }, 334 { 335 "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that Missed the LLC", 336 "CounterType": "PGMABLE", 337 "EventCode": "0x36", 338 "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD", 339 "PerPkg": "1", 340 "UMask": "0xC80FFE01", 341 "UMaskExt": "0xC80FFE", 342 "Unit": "CHA" 343 }, 344 { 345 "BriefDescription": "TOR Occupancy : DRds issued by iA Cores that Missed the LLC", 346 "CounterType": "PGMABLE", 347 "EventCode": "0x36", 348 "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD", 349 "PerPkg": "1", 350 "UMask": "0xC817FE01", 351 "UMaskExt": "0xC817FE", 352 "Unit": "CHA" 353 }, 354 { 355 "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that Missed the LLC", 356 "CounterType": "PGMABLE", 357 "EventCode": "0x36", 358 "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO", 359 "PerPkg": "1", 360 "UMask": "0xC807FE01", 361 "UMaskExt": "0xC807FE", 362 "Unit": "CHA" 363 }, 364 { 365 "BriefDescription": "TOR Occupancy : All requests from IO Devices", 366 "CounterType": "PGMABLE", 367 "EventCode": "0x36", 368 "EventName": "UNC_CHA_TOR_OCCUPANCY.IO", 369 "PerPkg": "1", 370 "UMask": "0xC001FF04", 371 "UMaskExt": "0xC001FF", 372 "Unit": "CHA" 373 }, 374 { 375 "BriefDescription": "TOR Occupancy : All requests from IO Devices that hit the LLC", 376 "CounterType": "PGMABLE", 377 "EventCode": "0x36", 378 "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT", 379 "PerPkg": "1", 380 "UMask": "0xC001FD04", 381 "UMaskExt": "0xC001FD", 382 "Unit": "CHA" 383 }, 384 { 385 "BriefDescription": "TOR Occupancy : All requests from IO Devices that missed the LLC", 386 "CounterType": "PGMABLE", 387 "EventCode": "0x36", 388 "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS", 389 "PerPkg": "1", 390 "UMask": "0xC001FE04", 391 "UMaskExt": "0xC001FE", 392 "Unit": "CHA" 393 }, 394 { 395 "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices that missed the LLC", 396 "Counter": "0,1,2,3", 397 "CounterType": "PGMABLE", 398 "EventCode": "0x35", 399 "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM", 400 "PerPkg": "1", 401 "UMask": "0xCC43FE04", 402 "UMaskExt": "0xCC43FE", 403 "Unit": "CHA" 404 }, 405 { 406 "BriefDescription": "CMS Clockticks", 407 "Counter": "0,1,2,3", 408 "CounterType": "PGMABLE", 409 "EventCode": "0xc0", 410 "EventName": "UNC_CHA_CMS_CLOCKTICKS", 411 "PerPkg": "1", 412 "Unit": "CHA" 413 }, 414 { 415 "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores that hit the LLC", 416 "Counter": "0,1,2,3", 417 "CounterType": "PGMABLE", 418 "EventCode": "0x35", 419 "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD_PREF", 420 "PerPkg": "1", 421 "UMask": "0xC88FFD01", 422 "UMaskExt": "0xC88FFD", 423 "Unit": "CHA" 424 }, 425 { 426 "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores that Hit the LLC", 427 "Counter": "0,1,2,3", 428 "CounterType": "PGMABLE", 429 "EventCode": "0x35", 430 "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_PREF", 431 "PerPkg": "1", 432 "UMask": "0xC897FD01", 433 "UMaskExt": "0xC897FD", 434 "Unit": "CHA" 435 }, 436 { 437 "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores that Hit the LLC", 438 "Counter": "0,1,2,3", 439 "CounterType": "PGMABLE", 440 "EventCode": "0x35", 441 "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO_PREF", 442 "PerPkg": "1", 443 "UMask": "0xC887FD01", 444 "UMaskExt": "0xC887FD", 445 "Unit": "CHA" 446 }, 447 { 448 "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores that Missed the LLC", 449 "Counter": "0,1,2,3", 450 "CounterType": "PGMABLE", 451 "EventCode": "0x35", 452 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF", 453 "PerPkg": "1", 454 "UMask": "0xC88FFE01", 455 "UMaskExt": "0xC88FFE", 456 "Unit": "CHA" 457 }, 458 { 459 "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores that Missed the LLC", 460 "Counter": "0,1,2,3", 461 "CounterType": "PGMABLE", 462 "EventCode": "0x35", 463 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF", 464 "PerPkg": "1", 465 "UMask": "0xC897FE01", 466 "UMaskExt": "0xC897FE", 467 "Unit": "CHA" 468 }, 469 { 470 "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores that Missed the LLC", 471 "Counter": "0,1,2,3", 472 "CounterType": "PGMABLE", 473 "EventCode": "0x35", 474 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF", 475 "PerPkg": "1", 476 "UMask": "0xC887FE01", 477 "UMaskExt": "0xC887FE", 478 "Unit": "CHA" 479 }, 480 { 481 "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices that Hit the LLC", 482 "Counter": "0,1,2,3", 483 "CounterType": "PGMABLE", 484 "EventCode": "0x35", 485 "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOM", 486 "PerPkg": "1", 487 "UMask": "0xCC43FD04", 488 "UMaskExt": "0xCC43FD", 489 "Unit": "CHA" 490 }, 491 { 492 "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices", 493 "Counter": "0,1,2,3", 494 "CounterType": "PGMABLE", 495 "EventCode": "0x35", 496 "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM", 497 "PerPkg": "1", 498 "UMask": "0xCC43FF04", 499 "UMaskExt": "0xCC43FF", 500 "Unit": "CHA" 501 }, 502 { 503 "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores", 504 "Counter": "0,1,2,3", 505 "CounterType": "PGMABLE", 506 "EventCode": "0x35", 507 "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO_PREF", 508 "PerPkg": "1", 509 "UMask": "0xC887FF01", 510 "UMaskExt": "0xC887FF", 511 "Unit": "CHA" 512 }, 513 { 514 "BriefDescription": "TOR Inserts : RFOs issued by iA Cores", 515 "Counter": "0,1,2,3", 516 "CounterType": "PGMABLE", 517 "EventCode": "0x35", 518 "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO", 519 "PerPkg": "1", 520 "UMask": "0xC807FF01", 521 "UMaskExt": "0xC807FF", 522 "Unit": "CHA" 523 }, 524 { 525 "BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores", 526 "Counter": "0,1,2,3", 527 "CounterType": "PGMABLE", 528 "EventCode": "0x35", 529 "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFRFO", 530 "PerPkg": "1", 531 "UMask": "0xCCC7FF01", 532 "UMaskExt": "0xCCC7FF", 533 "Unit": "CHA" 534 }, 535 { 536 "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores", 537 "Counter": "0,1,2,3", 538 "CounterType": "PGMABLE", 539 "EventCode": "0x35", 540 "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_PREF", 541 "PerPkg": "1", 542 "UMask": "0xC897FF01", 543 "UMaskExt": "0xC897FF", 544 "Unit": "CHA" 545 }, 546 { 547 "BriefDescription": "TOR Inserts : CRDs issued by iA Cores", 548 "Counter": "0,1,2,3", 549 "CounterType": "PGMABLE", 550 "EventCode": "0x35", 551 "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD", 552 "PerPkg": "1", 553 "UMask": "0xC80FFF01", 554 "UMaskExt": "0xC80FFF", 555 "Unit": "CHA" 556 }, 557 { 558 "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores", 559 "CounterType": "PGMABLE", 560 "EventCode": "0x36", 561 "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO", 562 "PerPkg": "1", 563 "UMask": "0xC807FF01", 564 "UMaskExt": "0xC807FF", 565 "Unit": "CHA" 566 }, 567 { 568 "BriefDescription": "TOR Occupancy : DRds issued by iA Cores", 569 "CounterType": "PGMABLE", 570 "EventCode": "0x36", 571 "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD", 572 "PerPkg": "1", 573 "UMask": "0xC817FF01", 574 "UMaskExt": "0xC817FF", 575 "Unit": "CHA" 576 }, 577 { 578 "BriefDescription": "TOR Occupancy : CRDs issued by iA Cores", 579 "CounterType": "PGMABLE", 580 "EventCode": "0x36", 581 "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD", 582 "PerPkg": "1", 583 "UMask": "0xC80FFF01", 584 "UMaskExt": "0xC80FFF", 585 "Unit": "CHA" 586 }, 587 { 588 "BriefDescription": "TOR Occupancy : DRds issued by iA Cores that Missed the LLC - HOMed locally", 589 "CounterType": "PGMABLE", 590 "EventCode": "0x36", 591 "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL", 592 "PerPkg": "1", 593 "UMask": "0xC816FE01", 594 "UMaskExt": "0xC816FE", 595 "Unit": "CHA" 596 }, 597 { 598 "BriefDescription": "TOR Occupancy : DRds issued by iA Cores that Missed the LLC - HOMed remotely", 599 "CounterType": "PGMABLE", 600 "EventCode": "0x36", 601 "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE", 602 "PerPkg": "1", 603 "UMask": "0xC8177E01", 604 "UMaskExt": "0xC8177E", 605 "Unit": "CHA" 606 }, 607 { 608 "BriefDescription": "TOR Inserts : DRds issued by iA Cores that Missed the LLC - HOMed locally", 609 "Counter": "0,1,2,3", 610 "CounterType": "PGMABLE", 611 "EventCode": "0x35", 612 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL", 613 "PerPkg": "1", 614 "UMask": "0xC816FE01", 615 "UMaskExt": "0xC816FE", 616 "Unit": "CHA" 617 }, 618 { 619 "BriefDescription": "TOR Inserts : DRds issued by iA Cores that Missed the LLC - HOMed remotely", 620 "Counter": "0,1,2,3", 621 "CounterType": "PGMABLE", 622 "EventCode": "0x35", 623 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE", 624 "PerPkg": "1", 625 "UMask": "0xC8177E01", 626 "UMaskExt": "0xC8177E", 627 "Unit": "CHA" 628 }, 629 { 630 "BriefDescription": "TOR Inserts; DRd Pref misses from local IA", 631 "Counter": "0,1,2,3", 632 "CounterType": "PGMABLE", 633 "EventCode": "0x35", 634 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL", 635 "PerPkg": "1", 636 "UMask": "0xC896FE01", 637 "UMaskExt": "0xC896FE", 638 "Unit": "CHA" 639 }, 640 { 641 "BriefDescription": "TOR Inserts; DRd Pref misses from local IA", 642 "Counter": "0,1,2,3", 643 "CounterType": "PGMABLE", 644 "EventCode": "0x35", 645 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE", 646 "PerPkg": "1", 647 "UMask": "0xC8977E01", 648 "UMaskExt": "0xC8977E", 649 "Unit": "CHA" 650 }, 651 { 652 "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Missed the LLC - HOMed locally", 653 "Counter": "0,1,2,3", 654 "CounterType": "PGMABLE", 655 "EventCode": "0x35", 656 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_LOCAL", 657 "PerPkg": "1", 658 "UMask": "0xC806FE01", 659 "UMaskExt": "0xC806FE", 660 "Unit": "CHA" 661 }, 662 { 663 "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Missed the LLC - HOMed remotely", 664 "Counter": "0,1,2,3", 665 "CounterType": "PGMABLE", 666 "EventCode": "0x35", 667 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_REMOTE", 668 "PerPkg": "1", 669 "UMask": "0xC8077E01", 670 "UMaskExt": "0xC8077E", 671 "Unit": "CHA" 672 }, 673 { 674 "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores that Missed the LLC - HOMed locally", 675 "Counter": "0,1,2,3", 676 "CounterType": "PGMABLE", 677 "EventCode": "0x35", 678 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_LOCAL", 679 "PerPkg": "1", 680 "UMask": "0xC886FE01", 681 "UMaskExt": "0xC886FE", 682 "Unit": "CHA" 683 }, 684 { 685 "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores that Missed the LLC - HOMed remotely", 686 "Counter": "0,1,2,3", 687 "CounterType": "PGMABLE", 688 "EventCode": "0x35", 689 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_REMOTE", 690 "PerPkg": "1", 691 "UMask": "0xC8877E01", 692 "UMaskExt": "0xC8877E", 693 "Unit": "CHA" 694 }, 695 { 696 "BriefDescription": "TOR Inserts : CLFlushes issued by iA Cores", 697 "Counter": "0,1,2,3", 698 "CounterType": "PGMABLE", 699 "EventCode": "0x35", 700 "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSH", 701 "PerPkg": "1", 702 "UMask": "0xC8C7FF01", 703 "UMaskExt": "0xC8C7FF", 704 "Unit": "CHA" 705 }, 706 { 707 "BriefDescription": "TOR Inserts : SpecItoMs issued by iA Cores", 708 "Counter": "0,1,2,3", 709 "CounterType": "PGMABLE", 710 "EventCode": "0x35", 711 "EventName": "UNC_CHA_TOR_INSERTS.IA_SPECITOM", 712 "PerPkg": "1", 713 "UMask": "0xCC57FF01", 714 "UMaskExt": "0xCC57FF", 715 "Unit": "CHA" 716 }, 717 { 718 "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices", 719 "Counter": "0,1,2,3", 720 "CounterType": "PGMABLE", 721 "EventCode": "0x35", 722 "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR", 723 "PerPkg": "1", 724 "UMask": "0xCD43FF04", 725 "UMaskExt": "0xCD43FF", 726 "Unit": "CHA" 727 }, 728 { 729 "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices that hit the LLC", 730 "Counter": "0,1,2,3", 731 "CounterType": "PGMABLE", 732 "EventCode": "0x35", 733 "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOMCACHENEAR", 734 "PerPkg": "1", 735 "UMask": "0xCD43FD04", 736 "UMaskExt": "0xCD43FD", 737 "Unit": "CHA" 738 }, 739 { 740 "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices that missed the LLC", 741 "Counter": "0,1,2,3", 742 "CounterType": "PGMABLE", 743 "EventCode": "0x35", 744 "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR", 745 "PerPkg": "1", 746 "UMask": "0xCD43FE04", 747 "UMaskExt": "0xCD43FE", 748 "Unit": "CHA" 749 }, 750 { 751 "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting PMM Mem that Missed the LLC", 752 "Counter": "0,1,2,3", 753 "CounterType": "PGMABLE", 754 "EventCode": "0x35", 755 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PMM", 756 "PerPkg": "1", 757 "UMask": "0xC8178A01", 758 "UMaskExt": "0xC8178A", 759 "Unit": "CHA" 760 }, 761 { 762 "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed locally", 763 "Counter": "0,1,2,3", 764 "CounterType": "PGMABLE", 765 "EventCode": "0x35", 766 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_PMM", 767 "PerPkg": "1", 768 "UMask": "0xC8168A01", 769 "UMaskExt": "0xC8168A", 770 "Unit": "CHA" 771 }, 772 { 773 "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed remotely", 774 "Counter": "0,1,2,3", 775 "CounterType": "PGMABLE", 776 "EventCode": "0x35", 777 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_PMM", 778 "PerPkg": "1", 779 "UMask": "0xC8170A01", 780 "UMaskExt": "0xC8170A", 781 "Unit": "CHA" 782 }, 783 { 784 "BriefDescription": "TOR Inserts; WCiLF misses from local IA", 785 "Counter": "0,1,2,3", 786 "CounterType": "PGMABLE", 787 "EventCode": "0x35", 788 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR", 789 "PerPkg": "1", 790 "UMask": "0xc867fe01", 791 "UMaskExt": "0xc867fe", 792 "Unit": "CHA" 793 }, 794 { 795 "BriefDescription": "TOR Inserts; WCiL misses from local IA", 796 "Counter": "0,1,2,3", 797 "CounterType": "PGMABLE", 798 "EventCode": "0x35", 799 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR", 800 "PerPkg": "1", 801 "UMask": "0xc86ffe01", 802 "UMaskExt": "0xc86ffe", 803 "Unit": "CHA" 804 }, 805 { 806 "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targeting PMM Mem that Missed the LLC", 807 "CounterType": "PGMABLE", 808 "EventCode": "0x36", 809 "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PMM", 810 "PerPkg": "1", 811 "UMask": "0xC8178A01", 812 "UMaskExt": "0xC8178A", 813 "Unit": "CHA" 814 }, 815 { 816 "BriefDescription": "TOR Inserts : LLCPrefData issued by iA Cores that missed the LLC", 817 "Counter": "0,1,2,3", 818 "CounterType": "PGMABLE", 819 "EventCode": "0x35", 820 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA", 821 "PerPkg": "1", 822 "UMask": "0xCCD7FE01", 823 "UMaskExt": "0xCCD7FE", 824 "Unit": "CHA" 825 }, 826 { 827 "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices that missed the LLC", 828 "Counter": "0,1,2,3", 829 "CounterType": "PGMABLE", 830 "EventCode": "0x35", 831 "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR", 832 "PerPkg": "1", 833 "UMask": "0xC8F3FE04", 834 "UMaskExt": "0xC8F3FE", 835 "Unit": "CHA" 836 }, 837 { 838 "BriefDescription": "TOR Occupancy : PCIRdCurs issued by IO Devices that missed the LLC", 839 "CounterType": "PGMABLE", 840 "EventCode": "0x36", 841 "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_PCIRDCUR", 842 "PerPkg": "1", 843 "UMask": "0xc8f3fe04", 844 "UMaskExt": "0xc8f3fe", 845 "Unit": "CHA" 846 }, 847 { 848 "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting DDR Mem that Missed the LLC", 849 "Counter": "0,1,2,3", 850 "CounterType": "PGMABLE", 851 "EventCode": "0x35", 852 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_DDR", 853 "PerPkg": "1", 854 "UMask": "0xC8178601", 855 "UMaskExt": "0xC81786", 856 "Unit": "CHA" 857 }, 858 { 859 "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed locally", 860 "Counter": "0,1,2,3", 861 "CounterType": "PGMABLE", 862 "EventCode": "0x35", 863 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_DDR", 864 "PerPkg": "1", 865 "UMask": "0xC8168601", 866 "UMaskExt": "0xC81686", 867 "Unit": "CHA" 868 }, 869 { 870 "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed remotely", 871 "Counter": "0,1,2,3", 872 "CounterType": "PGMABLE", 873 "EventCode": "0x35", 874 "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_DDR", 875 "PerPkg": "1", 876 "UMask": "0xC8170601", 877 "UMaskExt": "0xC81706", 878 "Unit": "CHA" 879 }, 880 { 881 "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targeting DDR Mem that Missed the LLC", 882 "CounterType": "PGMABLE", 883 "EventCode": "0x36", 884 "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_DDR", 885 "PerPkg": "1", 886 "UMask": "0xC8178601", 887 "UMaskExt": "0xC81786", 888 "Unit": "CHA" 889 }, 890 { 891 "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices that hit the LLC", 892 "Counter": "0,1,2,3", 893 "CounterType": "PGMABLE", 894 "EventCode": "0x35", 895 "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_PCIRDCUR", 896 "PerPkg": "1", 897 "UMask": "0xC8F3FD04", 898 "UMaskExt": "0xC8F3FD", 899 "Unit": "CHA" 900 }, 901 { 902 "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices", 903 "Counter": "0,1,2,3", 904 "CounterType": "PGMABLE", 905 "EventCode": "0x35", 906 "EventName": "UNC_CHA_TOR_INSERTS.IO_PCIRDCUR", 907 "PerPkg": "1", 908 "UMask": "0xC8F3FF04", 909 "UMaskExt": "0xC8F3FF", 910 "Unit": "CHA" 911 }, 912 { 913 "BriefDescription": "TOR Inserts : LLCPrefData issued by iA Cores", 914 "Counter": "0,1,2,3", 915 "CounterType": "PGMABLE", 916 "EventCode": "0x35", 917 "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFDATA", 918 "PerPkg": "1", 919 "UMask": "0xCCD7FF01", 920 "UMaskExt": "0xCCD7FF", 921 "Unit": "CHA" 922 }, 923 { 924 "BriefDescription": "TOR Occupancy : PCIRdCurs issued by IO Devices", 925 "CounterType": "PGMABLE", 926 "EventCode": "0x36", 927 "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_PCIRDCUR", 928 "PerPkg": "1", 929 "UMask": "0xC8F3FF04", 930 "UMaskExt": "0xC8F3FF", 931 "Unit": "CHA" 932 }, 933 { 934 "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Request", 935 "Counter": "0,1,2,3", 936 "CounterType": "PGMABLE", 937 "EventCode": "0x34", 938 "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ", 939 "PerPkg": "1", 940 "UMask": "0x1BC1FF", 941 "UMaskExt": "0x1BC1", 942 "Unit": "CHA" 943 }, 944 { 945 "BriefDescription": "Clockticks of the integrated IO (IIO) traffic controller", 946 "Counter": "0,1,2,3", 947 "CounterType": "PGMABLE", 948 "EventCode": "0x01", 949 "EventName": "UNC_IIO_CLOCKTICKS", 950 "PerPkg": "1", 951 "Unit": "IIO" 952 }, 953 { 954 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM", 955 "Counter": "0,1", 956 "CounterType": "PGMABLE", 957 "EventCode": "0x83", 958 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", 959 "FCMask": "0x07", 960 "PerPkg": "1", 961 "PortMask": "0x01", 962 "UMask": "0x01", 963 "Unit": "IIO" 964 }, 965 { 966 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM", 967 "Counter": "0,1", 968 "CounterType": "PGMABLE", 969 "EventCode": "0x83", 970 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", 971 "FCMask": "0x07", 972 "PerPkg": "1", 973 "PortMask": "0x02", 974 "UMask": "0x01", 975 "Unit": "IIO" 976 }, 977 { 978 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM", 979 "Counter": "0,1", 980 "CounterType": "PGMABLE", 981 "EventCode": "0x83", 982 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", 983 "FCMask": "0x07", 984 "PerPkg": "1", 985 "PortMask": "0x04", 986 "UMask": "0x01", 987 "Unit": "IIO" 988 }, 989 { 990 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM", 991 "Counter": "0,1", 992 "CounterType": "PGMABLE", 993 "EventCode": "0x83", 994 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", 995 "FCMask": "0x07", 996 "PerPkg": "1", 997 "PortMask": "0x08", 998 "UMask": "0x01", 999 "Unit": "IIO" 1000 }, 1001 { 1002 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM", 1003 "Counter": "0,1", 1004 "CounterType": "PGMABLE", 1005 "EventCode": "0x83", 1006 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", 1007 "FCMask": "0x07", 1008 "PerPkg": "1", 1009 "PortMask": "0x01", 1010 "UMask": "0x04", 1011 "Unit": "IIO" 1012 }, 1013 { 1014 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM", 1015 "Counter": "0,1", 1016 "CounterType": "PGMABLE", 1017 "EventCode": "0x83", 1018 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", 1019 "FCMask": "0x07", 1020 "PerPkg": "1", 1021 "PortMask": "0x02", 1022 "UMask": "0x04", 1023 "Unit": "IIO" 1024 }, 1025 { 1026 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM", 1027 "Counter": "0,1", 1028 "CounterType": "PGMABLE", 1029 "EventCode": "0x83", 1030 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", 1031 "FCMask": "0x07", 1032 "PerPkg": "1", 1033 "PortMask": "0x04", 1034 "UMask": "0x04", 1035 "Unit": "IIO" 1036 }, 1037 { 1038 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM", 1039 "Counter": "0,1", 1040 "CounterType": "PGMABLE", 1041 "EventCode": "0x83", 1042 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", 1043 "FCMask": "0x07", 1044 "PerPkg": "1", 1045 "PortMask": "0x08", 1046 "UMask": "0x04", 1047 "Unit": "IIO" 1048 }, 1049 { 1050 "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", 1051 "Counter": "0,1", 1052 "CounterType": "PGMABLE", 1053 "EventCode": "0x83", 1054 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART0", 1055 "FCMask": "0x07", 1056 "PerPkg": "1", 1057 "PortMask": "0x01", 1058 "UMask": "0x80", 1059 "Unit": "IIO" 1060 }, 1061 { 1062 "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", 1063 "Counter": "0,1", 1064 "CounterType": "PGMABLE", 1065 "EventCode": "0x83", 1066 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART1", 1067 "FCMask": "0x07", 1068 "PerPkg": "1", 1069 "PortMask": "0x02", 1070 "UMask": "0x80", 1071 "Unit": "IIO" 1072 }, 1073 { 1074 "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", 1075 "Counter": "0,1", 1076 "CounterType": "PGMABLE", 1077 "EventCode": "0x83", 1078 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART2", 1079 "FCMask": "0x07", 1080 "PerPkg": "1", 1081 "PortMask": "0x04", 1082 "UMask": "0x80", 1083 "Unit": "IIO" 1084 }, 1085 { 1086 "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", 1087 "Counter": "0,1", 1088 "CounterType": "PGMABLE", 1089 "EventCode": "0x83", 1090 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART3", 1091 "FCMask": "0x07", 1092 "PerPkg": "1", 1093 "PortMask": "0x08", 1094 "UMask": "0x80", 1095 "Unit": "IIO" 1096 }, 1097 { 1098 "BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space", 1099 "Counter": "2,3", 1100 "CounterType": "PGMABLE", 1101 "EventCode": "0xC0", 1102 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", 1103 "FCMask": "0x07", 1104 "PerPkg": "1", 1105 "PortMask": "0x01", 1106 "UMask": "0x01", 1107 "Unit": "IIO" 1108 }, 1109 { 1110 "BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space", 1111 "Counter": "2,3", 1112 "CounterType": "PGMABLE", 1113 "EventCode": "0xC0", 1114 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", 1115 "FCMask": "0x07", 1116 "PerPkg": "1", 1117 "PortMask": "0x02", 1118 "UMask": "0x01", 1119 "Unit": "IIO" 1120 }, 1121 { 1122 "BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space", 1123 "Counter": "2,3", 1124 "CounterType": "PGMABLE", 1125 "EventCode": "0xC0", 1126 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", 1127 "FCMask": "0x07", 1128 "PerPkg": "1", 1129 "PortMask": "0x04", 1130 "UMask": "0x01", 1131 "Unit": "IIO" 1132 }, 1133 { 1134 "BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space", 1135 "Counter": "2,3", 1136 "CounterType": "PGMABLE", 1137 "EventCode": "0xC0", 1138 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", 1139 "FCMask": "0x07", 1140 "PerPkg": "1", 1141 "PortMask": "0x08", 1142 "UMask": "0x01", 1143 "Unit": "IIO" 1144 }, 1145 { 1146 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 1147 "Counter": "2,3", 1148 "CounterType": "PGMABLE", 1149 "EventCode": "0xc0", 1150 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0", 1151 "FCMask": "0x07", 1152 "PerPkg": "1", 1153 "PortMask": "0x01", 1154 "UMask": "0x04", 1155 "Unit": "IIO" 1156 }, 1157 { 1158 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 1159 "Counter": "2,3", 1160 "CounterType": "PGMABLE", 1161 "EventCode": "0xc0", 1162 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1", 1163 "FCMask": "0x07", 1164 "PerPkg": "1", 1165 "PortMask": "0x02", 1166 "UMask": "0x04", 1167 "Unit": "IIO" 1168 }, 1169 { 1170 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 1171 "Counter": "2,3", 1172 "CounterType": "PGMABLE", 1173 "EventCode": "0xc0", 1174 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2", 1175 "FCMask": "0x07", 1176 "PerPkg": "1", 1177 "PortMask": "0x04", 1178 "UMask": "0x04", 1179 "Unit": "IIO" 1180 }, 1181 { 1182 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 1183 "Counter": "2,3", 1184 "CounterType": "PGMABLE", 1185 "EventCode": "0xc0", 1186 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3", 1187 "FCMask": "0x07", 1188 "PerPkg": "1", 1189 "PortMask": "0x08", 1190 "UMask": "0x04", 1191 "Unit": "IIO" 1192 }, 1193 { 1194 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", 1195 "Counter": "0,1,2,3", 1196 "CounterType": "PGMABLE", 1197 "EventCode": "0x84", 1198 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", 1199 "FCMask": "0x07", 1200 "PerPkg": "1", 1201 "PortMask": "0x01", 1202 "UMask": "0x01", 1203 "Unit": "IIO" 1204 }, 1205 { 1206 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", 1207 "Counter": "0,1,2,3", 1208 "CounterType": "PGMABLE", 1209 "EventCode": "0x84", 1210 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", 1211 "FCMask": "0x07", 1212 "PerPkg": "1", 1213 "PortMask": "0x02", 1214 "UMask": "0x01", 1215 "Unit": "IIO" 1216 }, 1217 { 1218 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", 1219 "Counter": "0,1,2,3", 1220 "CounterType": "PGMABLE", 1221 "EventCode": "0x84", 1222 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", 1223 "FCMask": "0x07", 1224 "PerPkg": "1", 1225 "PortMask": "0x04", 1226 "UMask": "0x01", 1227 "Unit": "IIO" 1228 }, 1229 { 1230 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", 1231 "Counter": "0,1,2,3", 1232 "CounterType": "PGMABLE", 1233 "EventCode": "0x84", 1234 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", 1235 "FCMask": "0x07", 1236 "PerPkg": "1", 1237 "PortMask": "0x08", 1238 "UMask": "0x01", 1239 "Unit": "IIO" 1240 }, 1241 { 1242 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", 1243 "Counter": "0,1,2,3", 1244 "CounterType": "PGMABLE", 1245 "EventCode": "0x84", 1246 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0", 1247 "FCMask": "0x07", 1248 "PerPkg": "1", 1249 "PortMask": "0x01", 1250 "UMask": "0x04", 1251 "Unit": "IIO" 1252 }, 1253 { 1254 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", 1255 "Counter": "0,1,2,3", 1256 "CounterType": "PGMABLE", 1257 "EventCode": "0x84", 1258 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1", 1259 "FCMask": "0x07", 1260 "PerPkg": "1", 1261 "PortMask": "0x02", 1262 "UMask": "0x04", 1263 "Unit": "IIO" 1264 }, 1265 { 1266 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", 1267 "Counter": "0,1,2,3", 1268 "CounterType": "PGMABLE", 1269 "EventCode": "0x84", 1270 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2", 1271 "FCMask": "0x07", 1272 "PerPkg": "1", 1273 "PortMask": "0x04", 1274 "UMask": "0x04", 1275 "Unit": "IIO" 1276 }, 1277 { 1278 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", 1279 "Counter": "0,1,2,3", 1280 "CounterType": "PGMABLE", 1281 "EventCode": "0x84", 1282 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3", 1283 "FCMask": "0x07", 1284 "PerPkg": "1", 1285 "PortMask": "0x08", 1286 "UMask": "0x04", 1287 "Unit": "IIO" 1288 }, 1289 { 1290 "BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request", 1291 "Counter": "0,1,2,3", 1292 "CounterType": "PGMABLE", 1293 "EventCode": "0x84", 1294 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART0", 1295 "FCMask": "0x07", 1296 "PerPkg": "1", 1297 "PortMask": "0x01", 1298 "UMask": "0x80", 1299 "Unit": "IIO" 1300 }, 1301 { 1302 "BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request", 1303 "Counter": "0,1,2,3", 1304 "CounterType": "PGMABLE", 1305 "EventCode": "0x84", 1306 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART1", 1307 "FCMask": "0x07", 1308 "PerPkg": "1", 1309 "PortMask": "0x02", 1310 "UMask": "0x80", 1311 "Unit": "IIO" 1312 }, 1313 { 1314 "BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request", 1315 "Counter": "0,1,2,3", 1316 "CounterType": "PGMABLE", 1317 "EventCode": "0x84", 1318 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART2", 1319 "FCMask": "0x07", 1320 "PerPkg": "1", 1321 "PortMask": "0x04", 1322 "UMask": "0x80", 1323 "Unit": "IIO" 1324 }, 1325 { 1326 "BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request", 1327 "Counter": "0,1,2,3", 1328 "CounterType": "PGMABLE", 1329 "EventCode": "0x84", 1330 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART3", 1331 "FCMask": "0x07", 1332 "PerPkg": "1", 1333 "PortMask": "0x08", 1334 "UMask": "0x80", 1335 "Unit": "IIO" 1336 }, 1337 { 1338 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space", 1339 "Counter": "0,1,2,3", 1340 "CounterType": "PGMABLE", 1341 "EventCode": "0xc1", 1342 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", 1343 "FCMask": "0x07", 1344 "PerPkg": "1", 1345 "PortMask": "0x01", 1346 "UMask": "0x01", 1347 "Unit": "IIO" 1348 }, 1349 { 1350 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space", 1351 "Counter": "0,1,2,3", 1352 "CounterType": "PGMABLE", 1353 "EventCode": "0xc1", 1354 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", 1355 "FCMask": "0x07", 1356 "PerPkg": "1", 1357 "PortMask": "0x02", 1358 "UMask": "0x01", 1359 "Unit": "IIO" 1360 }, 1361 { 1362 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space", 1363 "Counter": "0,1,2,3", 1364 "CounterType": "PGMABLE", 1365 "EventCode": "0xc1", 1366 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", 1367 "FCMask": "0x07", 1368 "PerPkg": "1", 1369 "PortMask": "0x04", 1370 "UMask": "0x01", 1371 "Unit": "IIO" 1372 }, 1373 { 1374 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space", 1375 "Counter": "0,1,2,3", 1376 "CounterType": "PGMABLE", 1377 "EventCode": "0xc1", 1378 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", 1379 "FCMask": "0x07", 1380 "PerPkg": "1", 1381 "PortMask": "0x08", 1382 "UMask": "0x01", 1383 "Unit": "IIO" 1384 }, 1385 { 1386 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space", 1387 "Counter": "0,1,2,3", 1388 "CounterType": "PGMABLE", 1389 "EventCode": "0xc1", 1390 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", 1391 "FCMask": "0x07", 1392 "PerPkg": "1", 1393 "PortMask": "0x01", 1394 "UMask": "0x04", 1395 "Unit": "IIO" 1396 }, 1397 { 1398 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space", 1399 "Counter": "0,1,2,3", 1400 "CounterType": "PGMABLE", 1401 "EventCode": "0xc1", 1402 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", 1403 "FCMask": "0x07", 1404 "PerPkg": "1", 1405 "PortMask": "0x02", 1406 "UMask": "0x04", 1407 "Unit": "IIO" 1408 }, 1409 { 1410 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space", 1411 "Counter": "0,1,2,3", 1412 "CounterType": "PGMABLE", 1413 "EventCode": "0xc1", 1414 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", 1415 "FCMask": "0x07", 1416 "PerPkg": "1", 1417 "PortMask": "0x04", 1418 "UMask": "0x04", 1419 "Unit": "IIO" 1420 }, 1421 { 1422 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space", 1423 "Counter": "0,1,2,3", 1424 "CounterType": "PGMABLE", 1425 "EventCode": "0xc1", 1426 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", 1427 "FCMask": "0x07", 1428 "PerPkg": "1", 1429 "PortMask": "0x08", 1430 "UMask": "0x04", 1431 "Unit": "IIO" 1432 }, 1433 { 1434 "BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space", 1435 "Counter": "2,3", 1436 "CounterType": "PGMABLE", 1437 "EventCode": "0xC0", 1438 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART4", 1439 "FCMask": "0x07", 1440 "PerPkg": "1", 1441 "PortMask": "0x10", 1442 "UMask": "0x01", 1443 "Unit": "IIO" 1444 }, 1445 { 1446 "BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space", 1447 "Counter": "2,3", 1448 "CounterType": "PGMABLE", 1449 "EventCode": "0xC0", 1450 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART5", 1451 "FCMask": "0x07", 1452 "PerPkg": "1", 1453 "PortMask": "0x20", 1454 "UMask": "0x01", 1455 "Unit": "IIO" 1456 }, 1457 { 1458 "BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space", 1459 "Counter": "2,3", 1460 "CounterType": "PGMABLE", 1461 "EventCode": "0xC0", 1462 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART6", 1463 "FCMask": "0x07", 1464 "PerPkg": "1", 1465 "PortMask": "0x40", 1466 "UMask": "0x01", 1467 "Unit": "IIO" 1468 }, 1469 { 1470 "BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space", 1471 "Counter": "2,3", 1472 "CounterType": "PGMABLE", 1473 "EventCode": "0xC0", 1474 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART7", 1475 "FCMask": "0x07", 1476 "PerPkg": "1", 1477 "PortMask": "0x80", 1478 "UMask": "0x01", 1479 "Unit": "IIO" 1480 }, 1481 { 1482 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 1483 "Counter": "2,3", 1484 "CounterType": "PGMABLE", 1485 "EventCode": "0xc0", 1486 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART4", 1487 "FCMask": "0x07", 1488 "PerPkg": "1", 1489 "PortMask": "0x10", 1490 "UMask": "0x04", 1491 "Unit": "IIO" 1492 }, 1493 { 1494 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 1495 "Counter": "2,3", 1496 "CounterType": "PGMABLE", 1497 "EventCode": "0xc0", 1498 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART5", 1499 "FCMask": "0x07", 1500 "PerPkg": "1", 1501 "PortMask": "0x20", 1502 "UMask": "0x04", 1503 "Unit": "IIO" 1504 }, 1505 { 1506 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 1507 "Counter": "2,3", 1508 "CounterType": "PGMABLE", 1509 "EventCode": "0xc0", 1510 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART6", 1511 "FCMask": "0x07", 1512 "PerPkg": "1", 1513 "PortMask": "0x40", 1514 "UMask": "0x04", 1515 "Unit": "IIO" 1516 }, 1517 { 1518 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 1519 "Counter": "2,3", 1520 "CounterType": "PGMABLE", 1521 "EventCode": "0xc0", 1522 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART7", 1523 "FCMask": "0x07", 1524 "PerPkg": "1", 1525 "PortMask": "0x80", 1526 "UMask": "0x04", 1527 "Unit": "IIO" 1528 }, 1529 { 1530 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM", 1531 "Counter": "0,1", 1532 "CounterType": "PGMABLE", 1533 "EventCode": "0x83", 1534 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART4", 1535 "FCMask": "0x07", 1536 "PerPkg": "1", 1537 "PortMask": "0x10", 1538 "UMask": "0x01", 1539 "Unit": "IIO" 1540 }, 1541 { 1542 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM", 1543 "Counter": "0,1", 1544 "CounterType": "PGMABLE", 1545 "EventCode": "0x83", 1546 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART5", 1547 "FCMask": "0x07", 1548 "PerPkg": "1", 1549 "PortMask": "0x20", 1550 "UMask": "0x01", 1551 "Unit": "IIO" 1552 }, 1553 { 1554 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM", 1555 "Counter": "0,1", 1556 "CounterType": "PGMABLE", 1557 "EventCode": "0x83", 1558 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART6", 1559 "FCMask": "0x07", 1560 "PerPkg": "1", 1561 "PortMask": "0x40", 1562 "UMask": "0x01", 1563 "Unit": "IIO" 1564 }, 1565 { 1566 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM", 1567 "Counter": "0,1", 1568 "CounterType": "PGMABLE", 1569 "EventCode": "0x83", 1570 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART7", 1571 "FCMask": "0x07", 1572 "PerPkg": "1", 1573 "PortMask": "0x80", 1574 "UMask": "0x01", 1575 "Unit": "IIO" 1576 }, 1577 { 1578 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM", 1579 "Counter": "0,1", 1580 "CounterType": "PGMABLE", 1581 "EventCode": "0x83", 1582 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART4", 1583 "FCMask": "0x07", 1584 "PerPkg": "1", 1585 "PortMask": "0x10", 1586 "UMask": "0x04", 1587 "Unit": "IIO" 1588 }, 1589 { 1590 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM", 1591 "Counter": "0,1", 1592 "CounterType": "PGMABLE", 1593 "EventCode": "0x83", 1594 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART5", 1595 "FCMask": "0x07", 1596 "PerPkg": "1", 1597 "PortMask": "0x20", 1598 "UMask": "0x04", 1599 "Unit": "IIO" 1600 }, 1601 { 1602 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM", 1603 "Counter": "0,1", 1604 "CounterType": "PGMABLE", 1605 "EventCode": "0x83", 1606 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART6", 1607 "FCMask": "0x07", 1608 "PerPkg": "1", 1609 "PortMask": "0x40", 1610 "UMask": "0x04", 1611 "Unit": "IIO" 1612 }, 1613 { 1614 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM", 1615 "Counter": "0,1", 1616 "CounterType": "PGMABLE", 1617 "EventCode": "0x83", 1618 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART7", 1619 "FCMask": "0x07", 1620 "PerPkg": "1", 1621 "PortMask": "0x80", 1622 "UMask": "0x04", 1623 "Unit": "IIO" 1624 }, 1625 { 1626 "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", 1627 "Counter": "0,1", 1628 "CounterType": "PGMABLE", 1629 "EventCode": "0x83", 1630 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART4", 1631 "FCMask": "0x07", 1632 "PerPkg": "1", 1633 "PortMask": "0x10", 1634 "UMask": "0x80", 1635 "Unit": "IIO" 1636 }, 1637 { 1638 "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", 1639 "Counter": "0,1", 1640 "CounterType": "PGMABLE", 1641 "EventCode": "0x83", 1642 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART5", 1643 "FCMask": "0x07", 1644 "PerPkg": "1", 1645 "PortMask": "0x20", 1646 "UMask": "0x80", 1647 "Unit": "IIO" 1648 }, 1649 { 1650 "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", 1651 "Counter": "0,1", 1652 "CounterType": "PGMABLE", 1653 "EventCode": "0x83", 1654 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART6", 1655 "FCMask": "0x07", 1656 "PerPkg": "1", 1657 "PortMask": "0x40", 1658 "UMask": "0x80", 1659 "Unit": "IIO" 1660 }, 1661 { 1662 "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", 1663 "Counter": "0,1", 1664 "CounterType": "PGMABLE", 1665 "EventCode": "0x83", 1666 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART7", 1667 "FCMask": "0x07", 1668 "PerPkg": "1", 1669 "PortMask": "0x80", 1670 "UMask": "0x80", 1671 "Unit": "IIO" 1672 }, 1673 { 1674 "BriefDescription": "Number requests PCIe makes of the main die : All", 1675 "Counter": "0,1,2,3", 1676 "CounterType": "PGMABLE", 1677 "EventCode": "0x85", 1678 "EventName": "UNC_IIO_NUM_REQ_OF_CPU.COMMIT.ALL", 1679 "FCMask": "0x07", 1680 "PerPkg": "1", 1681 "PortMask": "0xFF", 1682 "UMask": "0x01", 1683 "Unit": "IIO" 1684 }, 1685 { 1686 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space", 1687 "Counter": "0,1,2,3", 1688 "CounterType": "PGMABLE", 1689 "EventCode": "0xc1", 1690 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART4", 1691 "FCMask": "0x07", 1692 "PerPkg": "1", 1693 "PortMask": "0x10", 1694 "UMask": "0x01", 1695 "Unit": "IIO" 1696 }, 1697 { 1698 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space", 1699 "Counter": "0,1,2,3", 1700 "CounterType": "PGMABLE", 1701 "EventCode": "0xc1", 1702 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART5", 1703 "FCMask": "0x07", 1704 "PerPkg": "1", 1705 "PortMask": "0x20", 1706 "UMask": "0x01", 1707 "Unit": "IIO" 1708 }, 1709 { 1710 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space", 1711 "Counter": "0,1,2,3", 1712 "CounterType": "PGMABLE", 1713 "EventCode": "0xc1", 1714 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART6", 1715 "FCMask": "0x07", 1716 "PerPkg": "1", 1717 "PortMask": "0x40", 1718 "UMask": "0x01", 1719 "Unit": "IIO" 1720 }, 1721 { 1722 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space", 1723 "Counter": "0,1,2,3", 1724 "CounterType": "PGMABLE", 1725 "EventCode": "0xc1", 1726 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART7", 1727 "FCMask": "0x07", 1728 "PerPkg": "1", 1729 "PortMask": "0x80", 1730 "UMask": "0x01", 1731 "Unit": "IIO" 1732 }, 1733 { 1734 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space", 1735 "Counter": "0,1,2,3", 1736 "CounterType": "PGMABLE", 1737 "EventCode": "0xc1", 1738 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART4", 1739 "FCMask": "0x07", 1740 "PerPkg": "1", 1741 "PortMask": "0x10", 1742 "UMask": "0x04", 1743 "Unit": "IIO" 1744 }, 1745 { 1746 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space", 1747 "Counter": "0,1,2,3", 1748 "CounterType": "PGMABLE", 1749 "EventCode": "0xc1", 1750 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART5", 1751 "FCMask": "0x07", 1752 "PerPkg": "1", 1753 "PortMask": "0x20", 1754 "UMask": "0x04", 1755 "Unit": "IIO" 1756 }, 1757 { 1758 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space", 1759 "Counter": "0,1,2,3", 1760 "CounterType": "PGMABLE", 1761 "EventCode": "0xc1", 1762 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART6", 1763 "FCMask": "0x07", 1764 "PerPkg": "1", 1765 "PortMask": "0x40", 1766 "UMask": "0x04", 1767 "Unit": "IIO" 1768 }, 1769 { 1770 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space", 1771 "Counter": "0,1,2,3", 1772 "CounterType": "PGMABLE", 1773 "EventCode": "0xc1", 1774 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART7", 1775 "FCMask": "0x07", 1776 "PerPkg": "1", 1777 "PortMask": "0x80", 1778 "UMask": "0x04", 1779 "Unit": "IIO" 1780 }, 1781 { 1782 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", 1783 "Counter": "0,1,2,3", 1784 "CounterType": "PGMABLE", 1785 "EventCode": "0x84", 1786 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART4", 1787 "FCMask": "0x07", 1788 "PerPkg": "1", 1789 "PortMask": "0x10", 1790 "UMask": "0x01", 1791 "Unit": "IIO" 1792 }, 1793 { 1794 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", 1795 "Counter": "0,1,2,3", 1796 "CounterType": "PGMABLE", 1797 "EventCode": "0x84", 1798 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART5", 1799 "FCMask": "0x07", 1800 "PerPkg": "1", 1801 "PortMask": "0x20", 1802 "UMask": "0x01", 1803 "Unit": "IIO" 1804 }, 1805 { 1806 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", 1807 "Counter": "0,1,2,3", 1808 "CounterType": "PGMABLE", 1809 "EventCode": "0x84", 1810 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART6", 1811 "FCMask": "0x07", 1812 "PerPkg": "1", 1813 "PortMask": "0x40", 1814 "UMask": "0x01", 1815 "Unit": "IIO" 1816 }, 1817 { 1818 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", 1819 "Counter": "0,1,2,3", 1820 "CounterType": "PGMABLE", 1821 "EventCode": "0x84", 1822 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART7", 1823 "FCMask": "0x07", 1824 "PerPkg": "1", 1825 "PortMask": "0x80", 1826 "UMask": "0x01", 1827 "Unit": "IIO" 1828 }, 1829 { 1830 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", 1831 "Counter": "0,1,2,3", 1832 "CounterType": "PGMABLE", 1833 "EventCode": "0x84", 1834 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART4", 1835 "FCMask": "0x07", 1836 "PerPkg": "1", 1837 "PortMask": "0x10", 1838 "UMask": "0x04", 1839 "Unit": "IIO" 1840 }, 1841 { 1842 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", 1843 "Counter": "0,1,2,3", 1844 "CounterType": "PGMABLE", 1845 "EventCode": "0x84", 1846 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART5", 1847 "FCMask": "0x07", 1848 "PerPkg": "1", 1849 "PortMask": "0x20", 1850 "UMask": "0x04", 1851 "Unit": "IIO" 1852 }, 1853 { 1854 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", 1855 "Counter": "0,1,2,3", 1856 "CounterType": "PGMABLE", 1857 "EventCode": "0x84", 1858 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART6", 1859 "FCMask": "0x07", 1860 "PerPkg": "1", 1861 "PortMask": "0x40", 1862 "UMask": "0x04", 1863 "Unit": "IIO" 1864 }, 1865 { 1866 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", 1867 "Counter": "0,1,2,3", 1868 "CounterType": "PGMABLE", 1869 "EventCode": "0x84", 1870 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART7", 1871 "FCMask": "0x07", 1872 "PerPkg": "1", 1873 "PortMask": "0x80", 1874 "UMask": "0x04", 1875 "Unit": "IIO" 1876 }, 1877 { 1878 "BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request", 1879 "Counter": "0,1,2,3", 1880 "CounterType": "PGMABLE", 1881 "EventCode": "0x84", 1882 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART4", 1883 "FCMask": "0x07", 1884 "PerPkg": "1", 1885 "PortMask": "0x10", 1886 "UMask": "0x80", 1887 "Unit": "IIO" 1888 }, 1889 { 1890 "BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request", 1891 "Counter": "0,1,2,3", 1892 "CounterType": "PGMABLE", 1893 "EventCode": "0x84", 1894 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART5", 1895 "FCMask": "0x07", 1896 "PerPkg": "1", 1897 "PortMask": "0x20", 1898 "UMask": "0x80", 1899 "Unit": "IIO" 1900 }, 1901 { 1902 "BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request", 1903 "Counter": "0,1,2,3", 1904 "CounterType": "PGMABLE", 1905 "EventCode": "0x84", 1906 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART6", 1907 "FCMask": "0x07", 1908 "PerPkg": "1", 1909 "PortMask": "0x40", 1910 "UMask": "0x80", 1911 "Unit": "IIO" 1912 }, 1913 { 1914 "BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request", 1915 "Counter": "0,1,2,3", 1916 "CounterType": "PGMABLE", 1917 "EventCode": "0x84", 1918 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART7", 1919 "FCMask": "0x07", 1920 "PerPkg": "1", 1921 "PortMask": "0x80", 1922 "UMask": "0x80", 1923 "Unit": "IIO" 1924 }, 1925 { 1926 "BriefDescription": "Free running counter that increments for IIO clocktick", 1927 "CounterType": "FREERUN", 1928 "EventName": "UNC_IIO_CLOCKTICKS_FREERUN", 1929 "PerPkg": "1", 1930 "Unit": "IIO" 1931 }, 1932 { 1933 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0", 1934 "Counter": "0,1,2,3", 1935 "CounterType": "PGMABLE", 1936 "EventCode": "0xc2", 1937 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0", 1938 "FCMask": "0x04", 1939 "PerPkg": "1", 1940 "PortMask": "0x01", 1941 "UMask": "0x03", 1942 "Unit": "IIO" 1943 }, 1944 { 1945 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 1", 1946 "Counter": "0,1,2,3", 1947 "CounterType": "PGMABLE", 1948 "EventCode": "0xc2", 1949 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1", 1950 "FCMask": "0x04", 1951 "PerPkg": "1", 1952 "PortMask": "0x02", 1953 "UMask": "0x03", 1954 "Unit": "IIO" 1955 }, 1956 { 1957 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 2", 1958 "Counter": "0,1,2,3", 1959 "CounterType": "PGMABLE", 1960 "EventCode": "0xc2", 1961 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2", 1962 "FCMask": "0x04", 1963 "PerPkg": "1", 1964 "PortMask": "0x04", 1965 "UMask": "0x03", 1966 "Unit": "IIO" 1967 }, 1968 { 1969 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 3", 1970 "Counter": "0,1,2,3", 1971 "CounterType": "PGMABLE", 1972 "EventCode": "0xc2", 1973 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3", 1974 "FCMask": "0x04", 1975 "PerPkg": "1", 1976 "PortMask": "0x08", 1977 "UMask": "0x03", 1978 "Unit": "IIO" 1979 }, 1980 { 1981 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 4", 1982 "Counter": "0,1,2,3", 1983 "CounterType": "PGMABLE", 1984 "EventCode": "0xc2", 1985 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART4", 1986 "FCMask": "0x04", 1987 "PerPkg": "1", 1988 "PortMask": "0x10", 1989 "UMask": "0x03", 1990 "Unit": "IIO" 1991 }, 1992 { 1993 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 5", 1994 "Counter": "0,1,2,3", 1995 "CounterType": "PGMABLE", 1996 "EventCode": "0xc2", 1997 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART5", 1998 "FCMask": "0x04", 1999 "PerPkg": "1", 2000 "PortMask": "0x20", 2001 "UMask": "0x03", 2002 "Unit": "IIO" 2003 }, 2004 { 2005 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 6", 2006 "Counter": "0,1,2,3", 2007 "CounterType": "PGMABLE", 2008 "EventCode": "0xc2", 2009 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART6", 2010 "FCMask": "0x04", 2011 "PerPkg": "1", 2012 "PortMask": "0x40", 2013 "UMask": "0x03", 2014 "Unit": "IIO" 2015 }, 2016 { 2017 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 7", 2018 "Counter": "0,1,2,3", 2019 "CounterType": "PGMABLE", 2020 "EventCode": "0xc2", 2021 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART7", 2022 "FCMask": "0x04", 2023 "PerPkg": "1", 2024 "PortMask": "0x80", 2025 "UMask": "0x03", 2026 "Unit": "IIO" 2027 }, 2028 { 2029 "BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 0", 2030 "Counter": "2,3", 2031 "CounterType": "PGMABLE", 2032 "EventCode": "0xd5", 2033 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART0", 2034 "FCMask": "0x04", 2035 "PerPkg": "1", 2036 "UMask": "0x01", 2037 "Unit": "IIO" 2038 }, 2039 { 2040 "BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 7", 2041 "Counter": "2,3", 2042 "CounterType": "PGMABLE", 2043 "EventCode": "0xd5", 2044 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART7", 2045 "FCMask": "0x04", 2046 "PerPkg": "1", 2047 "UMask": "0x80", 2048 "Unit": "IIO" 2049 }, 2050 { 2051 "BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 6", 2052 "Counter": "2,3", 2053 "CounterType": "PGMABLE", 2054 "EventCode": "0xd5", 2055 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART6", 2056 "FCMask": "0x04", 2057 "PerPkg": "1", 2058 "UMask": "0x40", 2059 "Unit": "IIO" 2060 }, 2061 { 2062 "BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 5", 2063 "Counter": "2,3", 2064 "CounterType": "PGMABLE", 2065 "EventCode": "0xd5", 2066 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART5", 2067 "FCMask": "0x04", 2068 "PerPkg": "1", 2069 "UMask": "0x20", 2070 "Unit": "IIO" 2071 }, 2072 { 2073 "BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 4", 2074 "Counter": "2,3", 2075 "CounterType": "PGMABLE", 2076 "EventCode": "0xd5", 2077 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART4", 2078 "FCMask": "0x04", 2079 "PerPkg": "1", 2080 "UMask": "0x10", 2081 "Unit": "IIO" 2082 }, 2083 { 2084 "BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 3", 2085 "Counter": "2,3", 2086 "CounterType": "PGMABLE", 2087 "EventCode": "0xd5", 2088 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART3", 2089 "FCMask": "0x04", 2090 "PerPkg": "1", 2091 "UMask": "0x08", 2092 "Unit": "IIO" 2093 }, 2094 { 2095 "BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 2", 2096 "Counter": "2,3", 2097 "CounterType": "PGMABLE", 2098 "EventCode": "0xd5", 2099 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART2", 2100 "FCMask": "0x04", 2101 "PerPkg": "1", 2102 "UMask": "0x04", 2103 "Unit": "IIO" 2104 }, 2105 { 2106 "BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 1", 2107 "Counter": "2,3", 2108 "CounterType": "PGMABLE", 2109 "EventCode": "0xd5", 2110 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART1", 2111 "FCMask": "0x04", 2112 "PerPkg": "1", 2113 "UMask": "0x02", 2114 "Unit": "IIO" 2115 }, 2116 { 2117 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-7", 2118 "Counter": "0,1,2,3", 2119 "CounterType": "PGMABLE", 2120 "EventCode": "0xc2", 2121 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS", 2122 "FCMask": "0x04", 2123 "PerPkg": "1", 2124 "PortMask": "0xff", 2125 "UMask": "0x03", 2126 "Unit": "IIO" 2127 }, 2128 { 2129 "BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 0-7", 2130 "Counter": "2,3", 2131 "CounterType": "PGMABLE", 2132 "EventCode": "0xd5", 2133 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", 2134 "FCMask": "0x04", 2135 "PerPkg": "1", 2136 "UMask": "0xff", 2137 "Unit": "IIO" 2138 }, 2139 { 2140 "BriefDescription": "Misc Events - Set 1 : Lost Forward", 2141 "Counter": "0,1", 2142 "CounterType": "PGMABLE", 2143 "EventCode": "0x1F", 2144 "EventName": "UNC_I_MISC1.LOST_FWD", 2145 "PerPkg": "1", 2146 "UMask": "0x10", 2147 "Unit": "IRP" 2148 }, 2149 { 2150 "BriefDescription": "PCIITOM request issued by the IRP unit to the mesh with the intention of writing a full cacheline", 2151 "Counter": "0,1", 2152 "CounterType": "PGMABLE", 2153 "EventCode": "0x10", 2154 "EventName": "UNC_I_COHERENT_OPS.PCITOM", 2155 "PerPkg": "1", 2156 "UMask": "0x10", 2157 "Unit": "IRP" 2158 }, 2159 { 2160 "BriefDescription": "Coherent Ops : WbMtoI", 2161 "Counter": "0,1", 2162 "CounterType": "PGMABLE", 2163 "EventCode": "0x10", 2164 "EventName": "UNC_I_COHERENT_OPS.WBMTOI", 2165 "PerPkg": "1", 2166 "UMask": "0x40", 2167 "Unit": "IRP" 2168 }, 2169 { 2170 "BriefDescription": "Total IRP occupancy of inbound read and write requests to coherent memory", 2171 "Counter": "0,1", 2172 "CounterType": "PGMABLE", 2173 "EventCode": "0x0f", 2174 "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.MEM", 2175 "PerPkg": "1", 2176 "UMask": "0x04", 2177 "Unit": "IRP" 2178 }, 2179 { 2180 "BriefDescription": ": All Inserts Inbound (p2p + faf + cset)", 2181 "Counter": "0,1", 2182 "CounterType": "PGMABLE", 2183 "EventCode": "0x20", 2184 "EventName": "UNC_I_IRP_ALL.INBOUND_INSERTS", 2185 "PerPkg": "1", 2186 "UMask": "0x01", 2187 "Unit": "IRP" 2188 }, 2189 { 2190 "BriefDescription": "Inbound write (fast path) requests received by the IRP", 2191 "Counter": "0,1", 2192 "CounterType": "PGMABLE", 2193 "EventCode": "0x11", 2194 "EventName": "UNC_I_TRANSACTIONS.WR_PREF", 2195 "PerPkg": "1", 2196 "UMask": "0x08", 2197 "Unit": "IRP" 2198 }, 2199 { 2200 "BriefDescription": "Clockticks of the IO coherency tracker (IRP)", 2201 "Counter": "0,1", 2202 "CounterType": "PGMABLE", 2203 "EventCode": "0x01", 2204 "EventName": "UNC_I_CLOCKTICKS", 2205 "PerPkg": "1", 2206 "Unit": "IRP" 2207 }, 2208 { 2209 "BriefDescription": "FAF RF full", 2210 "Counter": "0,1", 2211 "CounterType": "PGMABLE", 2212 "EventCode": "0x17", 2213 "EventName": "UNC_I_FAF_FULL", 2214 "PerPkg": "1", 2215 "Unit": "IRP" 2216 }, 2217 { 2218 "BriefDescription": "Inbound read requests received by the IRP and inserted into the FAF queue", 2219 "Counter": "0,1", 2220 "CounterType": "PGMABLE", 2221 "EventCode": "0x18", 2222 "EventName": "UNC_I_FAF_INSERTS", 2223 "PerPkg": "1", 2224 "Unit": "IRP" 2225 }, 2226 { 2227 "BriefDescription": "Occupancy of the IRP FAF queue", 2228 "Counter": "0,1", 2229 "CounterType": "PGMABLE", 2230 "EventCode": "0x19", 2231 "EventName": "UNC_I_FAF_OCCUPANCY", 2232 "PerPkg": "1", 2233 "Unit": "IRP" 2234 }, 2235 { 2236 "BriefDescription": "FAF allocation -- sent to ADQ", 2237 "Counter": "0,1", 2238 "CounterType": "PGMABLE", 2239 "EventCode": "0x16", 2240 "EventName": "UNC_I_FAF_TRANSACTIONS", 2241 "PerPkg": "1", 2242 "Unit": "IRP" 2243 }, 2244 { 2245 "BriefDescription": "Responses to snoops of any type that hit M line in the IIO cache", 2246 "Counter": "0,1", 2247 "CounterType": "PGMABLE", 2248 "EventCode": "0x12", 2249 "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_M", 2250 "PerPkg": "1", 2251 "UMask": "0x78", 2252 "Unit": "IRP" 2253 }, 2254 { 2255 "BriefDescription": "Multi-socket cacheline Directory Lookups : Found in any state", 2256 "Counter": "0,1,2,3", 2257 "CounterType": "PGMABLE", 2258 "EventCode": "0x2D", 2259 "EventName": "UNC_M2M_DIRECTORY_LOOKUP.ANY", 2260 "PerPkg": "1", 2261 "UMask": "0x01", 2262 "Unit": "M2M" 2263 }, 2264 { 2265 "BriefDescription": "Multi-socket cacheline Directory Lookups : Found in A state", 2266 "Counter": "0,1,2,3", 2267 "CounterType": "PGMABLE", 2268 "EventCode": "0x2D", 2269 "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_A", 2270 "PerPkg": "1", 2271 "UMask": "0x08", 2272 "Unit": "M2M" 2273 }, 2274 { 2275 "BriefDescription": "Multi-socket cacheline Directory Lookups : Found in I state", 2276 "Counter": "0,1,2,3", 2277 "CounterType": "PGMABLE", 2278 "EventCode": "0x2D", 2279 "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_I", 2280 "PerPkg": "1", 2281 "UMask": "0x02", 2282 "Unit": "M2M" 2283 }, 2284 { 2285 "BriefDescription": "Multi-socket cacheline Directory Lookups : Found in S state", 2286 "Counter": "0,1,2,3", 2287 "CounterType": "PGMABLE", 2288 "EventCode": "0x2D", 2289 "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_S", 2290 "PerPkg": "1", 2291 "UMask": "0x04", 2292 "Unit": "M2M" 2293 }, 2294 { 2295 "BriefDescription": "Tag Hit : Clean NearMem Read Hit", 2296 "Counter": "0,1,2,3", 2297 "CounterType": "PGMABLE", 2298 "EventCode": "0x2C", 2299 "EventName": "UNC_M2M_TAG_HIT.NM_RD_HIT_CLEAN", 2300 "PerPkg": "1", 2301 "UMask": "0x01", 2302 "Unit": "M2M" 2303 }, 2304 { 2305 "BriefDescription": "Tag Hit : Dirty NearMem Read Hit", 2306 "Counter": "0,1,2,3", 2307 "CounterType": "PGMABLE", 2308 "EventCode": "0x2C", 2309 "EventName": "UNC_M2M_TAG_HIT.NM_RD_HIT_DIRTY", 2310 "PerPkg": "1", 2311 "UMask": "0x02", 2312 "Unit": "M2M" 2313 }, 2314 { 2315 "BriefDescription": "Clockticks of the mesh to memory (M2M)", 2316 "Counter": "0,1,2,3", 2317 "CounterType": "PGMABLE", 2318 "EventName": "UNC_M2M_CLOCKTICKS", 2319 "PerPkg": "1", 2320 "Unit": "M2M" 2321 }, 2322 { 2323 "BriefDescription": "CMS Clockticks", 2324 "Counter": "0,1,2,3", 2325 "CounterType": "PGMABLE", 2326 "EventCode": "0xc0", 2327 "EventName": "UNC_M2M_CMS_CLOCKTICKS", 2328 "PerPkg": "1", 2329 "Unit": "M2M" 2330 }, 2331 { 2332 "BriefDescription": "M2M Reads Issued to iMC : PMM - All Channels", 2333 "Counter": "0,1,2,3", 2334 "CounterType": "PGMABLE", 2335 "EventCode": "0x37", 2336 "EventName": "UNC_M2M_IMC_READS.TO_PMM", 2337 "PerPkg": "1", 2338 "UMask": "0x0720", 2339 "UMaskExt": "0x07", 2340 "Unit": "M2M" 2341 }, 2342 { 2343 "BriefDescription": "M2M Writes Issued to iMC : PMM - All Channels", 2344 "Counter": "0,1,2,3", 2345 "CounterType": "PGMABLE", 2346 "EventCode": "0x38", 2347 "EventName": "UNC_M2M_IMC_WRITES.TO_PMM", 2348 "PerPkg": "1", 2349 "UMask": "0x1C80", 2350 "UMaskExt": "0x1C", 2351 "Unit": "M2M" 2352 }, 2353 { 2354 "BriefDescription": "Clockticks of the mesh to PCI (M2P)", 2355 "Counter": "0,1,2,3", 2356 "CounterType": "PGMABLE", 2357 "EventCode": "0x01", 2358 "EventName": "UNC_M2P_CLOCKTICKS", 2359 "PerPkg": "1", 2360 "Unit": "M2PCIe" 2361 }, 2362 { 2363 "BriefDescription": "CMS Clockticks", 2364 "Counter": "0,1,2,3", 2365 "CounterType": "PGMABLE", 2366 "EventCode": "0xc0", 2367 "EventName": "UNC_M2P_CMS_CLOCKTICKS", 2368 "PerPkg": "1", 2369 "Unit": "M2PCIe" 2370 }, 2371 { 2372 "BriefDescription": "Clockticks of the mesh to UPI (M3UPI)", 2373 "Counter": "0,1,2,3", 2374 "CounterType": "PGMABLE", 2375 "EventCode": "0x01", 2376 "EventName": "UNC_M3UPI_CLOCKTICKS", 2377 "PerPkg": "1", 2378 "Unit": "M3UPI" 2379 }, 2380 { 2381 "BriefDescription": "Clockticks in the UBOX using a dedicated 48-bit Fixed Counter", 2382 "Counter": "FIXED", 2383 "CounterType": "FIXED", 2384 "EventCode": "0xff", 2385 "EventName": "UNC_U_CLOCKTICKS", 2386 "PerPkg": "1", 2387 "Unit": "UBOX" 2388 }, 2389 { 2390 "BriefDescription": "Valid Flits Received : All Data", 2391 "Counter": "0,1,2,3", 2392 "CounterType": "PGMABLE", 2393 "EventCode": "0x03", 2394 "EventName": "UNC_UPI_RxL_FLITS.ALL_DATA", 2395 "PerPkg": "1", 2396 "UMask": "0x0F", 2397 "Unit": "UPI LL" 2398 }, 2399 { 2400 "BriefDescription": "Valid Flits Received : All Non Data", 2401 "Counter": "0,1,2,3", 2402 "CounterType": "PGMABLE", 2403 "EventCode": "0x03", 2404 "EventName": "UNC_UPI_RxL_FLITS.NON_DATA", 2405 "PerPkg": "1", 2406 "UMask": "0x97", 2407 "Unit": "UPI LL" 2408 }, 2409 { 2410 "BriefDescription": "Valid Flits Sent : All Data", 2411 "Counter": "0,1,2,3", 2412 "CounterType": "PGMABLE", 2413 "EventCode": "0x02", 2414 "EventName": "UNC_UPI_TxL_FLITS.ALL_DATA", 2415 "PerPkg": "1", 2416 "UMask": "0x0F", 2417 "Unit": "UPI LL" 2418 }, 2419 { 2420 "BriefDescription": "Valid Flits Sent : All Non Data", 2421 "Counter": "0,1,2,3", 2422 "CounterType": "PGMABLE", 2423 "EventCode": "0x02", 2424 "EventName": "UNC_UPI_TxL_FLITS.NON_DATA", 2425 "PerPkg": "1", 2426 "UMask": "0x97", 2427 "Unit": "UPI LL" 2428 }, 2429 { 2430 "BriefDescription": "Number of kfclks", 2431 "Counter": "0,1,2,3", 2432 "CounterType": "PGMABLE", 2433 "EventCode": "0x01", 2434 "EventName": "UNC_UPI_CLOCKTICKS", 2435 "PerPkg": "1", 2436 "Unit": "UPI LL" 2437 }, 2438 { 2439 "BriefDescription": "Cycles in L1", 2440 "Counter": "0,1,2,3", 2441 "CounterType": "PGMABLE", 2442 "EventCode": "0x21", 2443 "EventName": "UNC_UPI_L1_POWER_CYCLES", 2444 "PerPkg": "1", 2445 "Unit": "UPI LL" 2446 }, 2447 { 2448 "BriefDescription": "Cycles in L0p", 2449 "Counter": "0,1,2,3", 2450 "CounterType": "PGMABLE", 2451 "EventCode": "0x27", 2452 "EventName": "UNC_UPI_TxL0P_POWER_CYCLES", 2453 "PerPkg": "1", 2454 "Unit": "UPI LL" 2455 }, 2456 { 2457 "BriefDescription": "Valid Flits Sent : Null FLITs transmitted to any slot", 2458 "Counter": "0,1,2,3", 2459 "CounterType": "PGMABLE", 2460 "EventCode": "0x02", 2461 "EventName": "UNC_UPI_TxL_FLITS.ALL_NULL", 2462 "PerPkg": "1", 2463 "UMask": "0x27", 2464 "Unit": "UPI LL" 2465 }, 2466 { 2467 "BriefDescription": "Valid Flits Received : Null FLITs received from any slot", 2468 "Counter": "0,1,2,3", 2469 "CounterType": "PGMABLE", 2470 "EventCode": "0x03", 2471 "EventName": "UNC_UPI_RxL_FLITS.ALL_NULL", 2472 "PerPkg": "1", 2473 "UMask": "0x27", 2474 "Unit": "UPI LL" 2475 }, 2476 { 2477 "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices to locally HOMed memory", 2478 "Counter": "0,1,2,3", 2479 "CounterType": "PGMABLE", 2480 "EventCode": "0x35", 2481 "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR_LOCAL", 2482 "PerPkg": "1", 2483 "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices : Counts the number of entries successfuly inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", 2484 "UMask": "0xCD42FF04", 2485 "UMaskExt": "0xCD42FF", 2486 "Unit": "CHA" 2487 }, 2488 { 2489 "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices to remotely HOMed memory", 2490 "Counter": "0,1,2,3", 2491 "CounterType": "PGMABLE", 2492 "EventCode": "0x35", 2493 "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR_REMOTE", 2494 "PerPkg": "1", 2495 "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices : Counts the number of entries successfuly inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", 2496 "UMask": "0xCD437F04", 2497 "UMaskExt": "0xCD437F", 2498 "Unit": "CHA" 2499 }, 2500 { 2501 "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices to locally HOMed memory", 2502 "Counter": "0,1,2,3", 2503 "CounterType": "PGMABLE", 2504 "EventCode": "0x35", 2505 "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM_LOCAL", 2506 "PerPkg": "1", 2507 "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices : Counts the number of entries successfuly inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", 2508 "UMask": "0xCC42FF04", 2509 "UMaskExt": "0xCC42FF", 2510 "Unit": "CHA" 2511 }, 2512 { 2513 "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices to remotely HOMed memory", 2514 "Counter": "0,1,2,3", 2515 "CounterType": "PGMABLE", 2516 "EventCode": "0x35", 2517 "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM_REMOTE", 2518 "PerPkg": "1", 2519 "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices : Counts the number of entries successfuly inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", 2520 "UMask": "0xCC437F04", 2521 "UMaskExt": "0xCC437F", 2522 "Unit": "CHA" 2523 }, 2524 { 2525 "BriefDescription": "Multi-socket cacheline Directory Updates : From/to any state. Note: event counts are incorrect in 2LM mode.", 2526 "Counter": "0,1,2,3", 2527 "CounterType": "PGMABLE", 2528 "EventCode": "0x2e", 2529 "EventName": "UNC_M2M_DIRECTORY_UPDATE.ANY", 2530 "PerPkg": "1", 2531 "PublicDescription": "Multi-socket cacheline Directory Updates : From/to any state. Note: event counts are incorrect in 2LM mode.", 2532 "UMask": "0x01", 2533 "Unit": "M2M" 2534 } 2535] 2536