1.\" 2.\" Copyright (c) 1995, 1996, 1997, 1998, 2000 3.\" Justin T. Gibbs. All rights reserved. 4.\" 5.\" Redistribution and use in source and binary forms, with or without 6.\" modification, are permitted provided that the following conditions 7.\" are met: 8.\" 1. Redistributions of source code must retain the above copyright 9.\" notice, this list of conditions and the following disclaimer. 10.\" 2. Redistributions in binary form must reproduce the above copyright 11.\" notice, this list of conditions and the following disclaimer in the 12.\" documentation and/or other materials provided with the distribution. 13.\" 3. The name of the author may not be used to endorse or promote products 14.\" derived from this software without specific prior written permission. 15.\" 16.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26.\" 27.\" $FreeBSD$ 28.\" 29.Dd July 13, 2008 30.Dt AHC 4 31.Os 32.Sh NAME 33.Nm ahc 34.Nd Adaptec VL/EISA/PCI SCSI host adapter driver 35.Sh SYNOPSIS 36To compile this driver into the kernel, 37place the following lines in your 38kernel configuration file: 39.Bd -ragged -offset indent 40.Cd "device scbus" 41.Cd "device ahc" 42.Pp 43For one or more VL/EISA cards: 44.Cd "device eisa" 45.Pp 46For one or more PCI cards: 47.Cd "device pci" 48.Pp 49To allow PCI adapters to use memory mapped I/O if enabled: 50.Cd options AHC_ALLOW_MEMIO 51.Pp 52To configure one or more controllers to assume the target role: 53.Cd options AHC_TMODE_ENABLE <bitmask of units> 54.Ed 55.Pp 56Alternatively, to load the driver as a 57module at boot time, place the following lines in 58.Xr loader.conf 5 : 59.Bd -literal -offset indent 60ahc_load="YES" 61ahc_eisa_load="YES" 62ahc_isa_load="YES" 63ahc_pci_load="YES" 64.Ed 65.Sh DESCRIPTION 66This driver provides access to the 67.Tn SCSI 68bus(es) connected to the Adaptec AIC77xx and AIC78xx 69host adapter chips. 70.Pp 71Driver features include support for twin and wide busses, 72fast, ultra or ultra2 synchronous transfers depending on controller type, 73tagged queueing, SCB paging, and target mode. 74.Pp 75Memory mapped I/O can be enabled for PCI devices with the 76.Dq Dv AHC_ALLOW_MEMIO 77configuration option. 78Memory mapped I/O is more efficient than the alternative, programmed I/O. 79Most PCI BIOSes will map devices so that either technique for communicating 80with the card is available. 81In some cases, 82usually when the PCI device is sitting behind a PCI->PCI bridge, 83the BIOS may fail to properly initialize the chip for memory mapped I/O. 84The typical symptom of this problem is a system hang if memory mapped I/O 85is attempted. 86Most modern motherboards perform the initialization correctly and work fine 87with this option enabled. 88.Pp 89Individual controllers may be configured to operate in the target role 90through the 91.Dq Dv AHC_TMODE_ENABLE 92configuration option. 93The value assigned to this option should be a bitmap 94of all units where target mode is desired. 95For example, a value of 0x25, would enable target mode on units 0, 2, and 5. 96A value of 0x8a enables it for units 1, 3, and 7. 97.Pp 98Per target configuration performed in the 99.Tn SCSI-Select 100menu, accessible at boot 101in 102.No non- Ns Tn EISA 103models, 104or through an 105.Tn EISA 106configuration utility for 107.Tn EISA 108models, 109is honored by this driver. 110This includes synchronous/asynchronous transfers, 111maximum synchronous negotiation rate, 112wide transfers, 113disconnection, 114the host adapter's SCSI ID, 115and, 116in the case of 117.Tn EISA 118Twin Channel controllers, 119the primary channel selection. 120For systems that store non-volatile settings in a system specific manner 121rather than a serial eeprom directly connected to the aic7xxx controller, 122the 123.Tn BIOS 124must be enabled for the driver to access this information. 125This restriction applies to all 126.Tn EISA 127and many motherboard configurations. 128.Pp 129Note that I/O addresses are determined automatically by the probe routines, 130but care should be taken when using a 284x 131.Pq Tn VESA No local bus controller 132in an 133.Tn EISA 134system. 135The jumpers setting the I/O area for the 284x should match the 136.Tn EISA 137slot into which the card is inserted to prevent conflicts with other 138.Tn EISA 139cards. 140.Pp 141Performance and feature sets vary throughout the aic7xxx product line. 142The following table provides a comparison of the different chips supported 143by the 144.Nm 145driver. 146Note that wide and twin channel features, although always supported 147by a particular chip, may be disabled in a particular motherboard or card 148design. 149.Bd -ragged -offset indent 150.Bl -column "aic7895CX" "MIPSX" "EISA/VLX" "MaxSyncX" "MaxWidthX" "SCBsX" "2 3 4 5 6 7 8X" 151.It Em "Chip" Ta "MIPS" Ta "Bus" Ta "MaxSync" Ta "MaxWidth" Ta "SCBs" Ta "Features" 152.It "aic7770" Ta "10" Ta "EISA/VL" Ta "10MHz" Ta "16Bit" Ta "4" Ta "1" 153.It "aic7850" Ta "10" Ta "PCI/32" Ta "10MHz" Ta "8Bit" Ta "3" Ta "" 154.It "aic7860" Ta "10" Ta "PCI/32" Ta "20MHz" Ta "8Bit" Ta "3" Ta "" 155.It "aic7870" Ta "10" Ta "PCI/32" Ta "10MHz" Ta "16Bit" Ta "16" Ta "" 156.It "aic7880" Ta "10" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta "" 157.It "aic7890" Ta "20" Ta "PCI/32" Ta "40MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8" 158.It "aic7891" Ta "20" Ta "PCI/64" Ta "40MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8" 159.It "aic7892" Ta "20" Ta "PCI/64" Ta "80MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8" 160.It "aic7895" Ta "15" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5" 161.It "aic7895C" Ta "15" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 8" 162.It "aic7896" Ta "20" Ta "PCI/32" Ta "40MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 6 7 8" 163.It "aic7897" Ta "20" Ta "PCI/64" Ta "40MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 6 7 8" 164.It "aic7899" Ta "20" Ta "PCI/64" Ta "80MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 6 7 8" 165.El 166.Pp 167.Bl -enum -compact 168.It 169Multiplexed Twin Channel Device - One controller servicing two busses. 170.It 171Multi-function Twin Channel Device - Two controllers on one chip. 172.It 173Command Channel Secondary DMA Engine - Allows scatter gather list and 174SCB prefetch. 175.It 17664 Byte SCB Support - SCSI CDB is embedded in the SCB to eliminate an extra DMA. 177.It 178Block Move Instruction Support - Doubles the speed of certain sequencer 179operations. 180.It 181.Sq Bayonet 182style Scatter Gather Engine - Improves S/G prefetch performance. 183.It 184Queuing Registers - Allows queueing of new transactions without pausing the 185sequencer. 186.It 187Multiple Target IDs - Allows the controller to respond to selection as a 188target on multiple SCSI IDs. 189.El 190.Ed 191.Sh HARDWARE 192The 193.Nm 194driver supports the following 195.Tn SCSI 196host adapter chips and 197.Tn SCSI 198controller cards: 199.Pp 200.Bl -bullet -compact 201.It 202Adaptec 203.Tn AIC7770 204host adapter chip 205.It 206Adaptec 207.Tn AIC7850 208host adapter chip 209.It 210Adaptec 211.Tn AIC7860 212host adapter chip 213.It 214Adaptec 215.Tn AIC7870 216host adapter chip 217.It 218Adaptec 219.Tn AIC7880 220host adapter chip 221.It 222Adaptec 223.Tn AIC7890 224host adapter chip 225.It 226Adaptec 227.Tn AIC7891 228host adapter chip 229.It 230Adaptec 231.Tn AIC7892 232host adapter chip 233.It 234Adaptec 235.Tn AIC7895 236host adapter chip 237.It 238Adaptec 239.Tn AIC7896 240host adapter chip 241.It 242Adaptec 243.Tn AIC7897 244host adapter chip 245.It 246Adaptec 247.Tn AIC7899 248host adapter chip 249.It 250Adaptec 251.Tn 274X(W) 252.It 253Adaptec 254.Tn 274X(T) 255.It 256Adaptec 257.Tn 284X 258.It 259Adaptec 260.Tn 2910 261.It 262Adaptec 263.Tn 2915 264.It 265Adaptec 266.Tn 2920C 267.It 268Adaptec 269.Tn 2930C 270.It 271Adaptec 272.Tn 2930U2 273.It 274Adaptec 275.Tn 2940 276.It 277Adaptec 278.Tn 2940J 279.It 280Adaptec 281.Tn 2940N 282.It 283Adaptec 284.Tn 2940U 285.It 286Adaptec 287.Tn 2940AU 288.It 289Adaptec 290.Tn 2940UW 291.It 292Adaptec 293.Tn 2940UW Dual 294.It 295Adaptec 296.Tn 2940UW Pro 297.It 298Adaptec 299.Tn 2940U2W 300.It 301Adaptec 302.Tn 2940U2B 303.It 304Adaptec 305.Tn 2950U2W 306.It 307Adaptec 308.Tn 2950U2B 309.It 310Adaptec 311.Tn 19160B 312.It 313Adaptec 314.Tn 29160B 315.It 316Adaptec 317.Tn 29160N 318.It 319Adaptec 320.Tn 3940 321.It 322Adaptec 323.Tn 3940U 324.It 325Adaptec 326.Tn 3940AU 327.It 328Adaptec 329.Tn 3940UW 330.It 331Adaptec 332.Tn 3940AUW 333.It 334Adaptec 335.Tn 3940U2W 336.It 337Adaptec 338.Tn 3950U2 339.It 340Adaptec 341.Tn 3960 342.It 343Adaptec 344.Tn 39160 345.It 346Adaptec 347.Tn 3985 348.It 349Adaptec 350.Tn 4944UW 351.It 352NEC PC-9821Xt13 (PC-98) 353.It 354NEC RvII26 (PC-98) 355.It 356NEC PC-9821X-B02L/B09 (PC-98) 357.It 358NEC SV-98/2-B03 (PC-98) 359.It 360Many motherboards with on-board 361.Tn SCSI 362support 363.El 364.Sh SCSI CONTROL BLOCKS (SCBs) 365Every transaction sent to a device on the SCSI bus is assigned a 366.Sq SCSI Control Block 367(SCB). 368The SCB contains all of the information required by the 369controller to process a transaction. 370The chip feature table lists 371the number of SCBs that can be stored in on-chip memory. 372All chips 373with model numbers greater than or equal to 7870 allow for the on chip 374SCB space to be augmented with external SRAM up to a maximum of 255 SCBs. 375Very few Adaptec controller configurations have external SRAM. 376.Pp 377If external SRAM is not available, SCBs are a limited resource. 378Using the SCBs in a straight forward manner would only allow the driver to 379handle as many concurrent transactions as there are physical SCBs. 380To fully utilize the SCSI bus and the devices on it, 381requires much more concurrency. 382The solution to this problem is 383.Em SCB Paging , 384a concept similar to memory paging. 385SCB paging takes advantage of 386the fact that devices usually disconnect from the SCSI bus for long 387periods of time without talking to the controller. 388The SCBs for disconnected transactions are only of use to the controller 389when the transfer is resumed. 390When the host queues another transaction 391for the controller to execute, the controller firmware will use a 392free SCB if one is available. 393Otherwise, the state of the most recently 394disconnected (and therefore most likely to stay disconnected) SCB is 395saved, via dma, to host memory, and the local SCB reused to start 396the new transaction. 397This allows the controller to queue up to 398255 transactions regardless of the amount of SCB space. 399Since the 400local SCB space serves as a cache for disconnected transactions, the 401more SCB space available, the less host bus traffic consumed saving 402and restoring SCB data. 403.Sh SEE ALSO 404.Xr aha 4 , 405.Xr ahb 4 , 406.Xr cd 4 , 407.Xr da 4 , 408.Xr sa 4 , 409.Xr scsi 4 410.Sh HISTORY 411The 412.Nm 413driver appeared in 414.Fx 2.0 . 415.Sh AUTHORS 416The 417.Nm 418driver, the 419.Tn AIC7xxx 420sequencer-code assembler, 421and the firmware running on the aic7xxx chips was written by 422.An Justin T. Gibbs . 423.Sh BUGS 424Some Quantum drives (at least the Empire 2100 and 1080s) will not run on an 425.Tn AIC7870 426Rev B in synchronous mode at 10MHz. 427Controllers with this problem have a 42842 MHz clock crystal on them and run slightly above 10MHz. 429This confuses the drive and hangs the bus. 430Setting a maximum synchronous negotiation rate of 8MHz in the 431.Tn SCSI-Select 432utility will allow normal operation. 433.Pp 434Although the Ultra2 and Ultra160 products have sufficient instruction 435ram space to support both the initiator and target roles concurrently, 436this configuration is disabled in favor of allowing the target role 437to respond on multiple target ids. 438A method for configuring dual role mode should be provided. 439.Pp 440Tagged Queuing is not supported in target mode. 441.Pp 442Reselection in target mode fails to function correctly on all high 443voltage differential boards as shipped by Adaptec. 444Information on 445how to modify HVD board to work correctly in target mode is available 446from Adaptec. 447