xref: /freebsd/share/man/man4/gpioiic.4 (revision e17f5b1d)
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27.Dd December 1, 2019
28.Dt GPIOIIC 4
29.Os
30.Sh NAME
31.Nm gpioiic
32.Nd GPIO I2C bit-banging device driver
33.Sh SYNOPSIS
34To compile this driver into the kernel,
35place the following lines in your
36kernel configuration file:
37.Bd -ragged -offset indent
38.Cd "device gpio"
39.Cd "device gpioiic"
40.Cd "device iicbb"
41.Cd "device iicbus"
42.Ed
43.Pp
44Alternatively, to load the driver as a
45module at boot time, place the following line in
46.Xr loader.conf 5 :
47.Bd -literal -offset indent
48gpioiic_load="YES"
49.Ed
50.Sh DESCRIPTION
51The
52.Nm
53driver provides an IIC bit-banging interface using two GPIO pins for the
54SCL and SDA lines on the bus.
55.Pp
56.Nm
57simulates an open collector kind of output when managing the pins on the
58bus, even on systems which don't directly support configuring gpio pins
59in that mode.
60The pins are never driven to the logical value of '1'.
61They are driven to '0' or switched to input mode (Hi-Z/tri-state), and
62an external pullup resistor pulls the line to the 1 state unless some
63other device on the bus is driving it to 0.
64.Pp
65.Sh HINTS CONFIGURATION
66On a
67.Xr device.hints 5
68based system, such as MIPS, these values are configurable for
69.Nm :
70.Bl -tag -width ".Va hint.gpioiic.%d.atXXX"
71.It Va hint.gpioiic.%d.at
72The
73.Nm gpiobus
74you are attaching to.
75Normally just gpiobus0 on systems with a single bank of gpio pins.
76.It Va hint.gpioiic.%d.pins
77This is a bitmask of the pins on the
78.Nm gpiobus
79that are to be used for SCLOCK and SDATA from the GPIO IIC
80bit-banging bus.
81To configure pin 0 and 7, use the bitmask of
820b10000001 and convert it to a hexadecimal value of 0x0081.
83Please note that this mask should only ever have two bits set
84(any other bits - i.e., pins - will be ignored).
85Because
86.Nm
87must be a child of the gpiobus, both gpio pins must be part of that bus.
88.It Va hint.gpioiic.%d.scl
89Indicates which bit in the
90.Va hint.gpioiic.%d.pins
91should be used as the SCLOCK
92source.
93Optional, defaults to 0.
94.It Va hint.gpioiic.%d.sda
95Indicates which bit in the
96.Va hint.gpioiic.%d.pins
97should be used as the SDATA
98source.
99Optional, defaults to 1.
100.El
101.Sh FDT CONFIGURATION
102On an
103.Xr FDT 4
104based system, such as ARM, the DTS node for
105.Nm gpioiic
106conforms to the standard bindings document i2c/i2c-gpio.yaml.
107The device node typically appears at the root of the device tree.
108The following is an example of a
109.Nm
110node with one slave device
111on the IIC bus:
112.Bd -literal
113/ {
114	gpioiic0 {
115		compatible = "i2c-gpio";
116		pinctrl-names = "default";
117		pinctrl-0 = <&pinctrl_gpioiic0>;
118		scl-gpios = <&gpio1  5 GPIO_ACTIVE_HIGH>;
119		sda-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
120		status = "okay";
121
122		/* One slave device on the i2c bus. */
123		rtc@51 {
124			compatible="nxp,pcf2127";
125			reg = <0x51>;
126			status = "okay";
127		};
128	};
129};
130.Ed
131.Pp
132Where:
133.Bl -tag -width ".Va compatible"
134.It Va compatible
135Should be set to "i2c-gpio".
136The deprecated string "gpioiic" is also accepted for backwards compatibility.
137.It Va scl-gpios Va sda-gpios
138These properties indicate which GPIO pins should be used for clock
139and data on the GPIO IIC bit-banging bus.
140There is no requirement that the two pins belong to the same gpio controller.
141.It Va pinctrl-names pinctrl-0
142These properties may be required to configure the chosen pins as gpio
143pins, unless the pins default to that state on your system.
144.El
145.Sh SEE ALSO
146.Xr fdt 4 ,
147.Xr gpio 4 ,
148.Xr iic 4 ,
149.Xr iicbb 4 ,
150.Xr iicbus 4
151.Sh HISTORY
152The
153.Nm
154manual page first appeared in
155.Fx 10.1 .
156.Sh AUTHORS
157This
158manual page was written by
159.An Luiz Otavio O Souza .
160