1.\" Copyright (c) 2023 The FreeBSD Foundation 2. 3.\" This documentation was written by Robert Clausecker <fuz@FreeBSD.org> 4.\" under sponsorship from the FreeBSD Foundation. 5. 6.\" Redistribution and use in source and binary forms, with or without 7.\" modification, are permitted provided that the following conditions 8.\" are met: 9.\" 1. Redistributions of source code must retain the above copyright 10.\" notice, this list of conditions and the following disclaimer. 11.\" 2. Redistributions in binary form must reproduce the above copyright 12.\" notice, this list of conditions and the following disclaimer in the 13.\" documentation and/or other materials provided with the distribution. 14. 15.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ''AS IS'' AND 16.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25.\" SUCH DAMAGE 26. 27.Dd September 2, 2023 28.Dt SIMD 7 29.Os 30.Sh NAME 31.Nm simd 32.Nd SIMD enhancements 33. 34.Sh DESCRIPTION 35On some architectures, the 36.Fx 37.Em libc 38provides enhanced implementations of commonly used functions, replacing 39the architecture-independent implementations used otherwise. 40Depending on architecture and function, an enhanced 41implementation of a function may either always be used or the 42.Em libc 43detects at runtime which SIMD instruction set extensions are 44supported and picks the most suitable implementation automatically. 45On 46.Cm amd64 , 47the environment variable 48.Ev ARCHLEVEL 49can be used to override this mechanism. 50.Pp 51Enhanced functions are present in the following architectures: 52.Bl -column FUNCTION_________ aarch64_ arm_ amd64_ i386_ ppc64_ -offset indent 53.It Em FUNCTION Ta Em AARCH64 Ta Em ARM Ta Em AMD64 Ta Em I386 Ta Em PPC64 54.It bcmp Ta Ta Ta S1 Ta S 55.It bcopy Ta Ta S Ta S Ta S Ta SV 56.It bzero Ta Ta S Ta S Ta S 57.It div Ta Ta Ta S Ta S 58.It index Ta S Ta Ta S1 59.It ldiv Ta Ta Ta S Ta S 60.It lldiv Ta Ta Ta S 61.It memchr Ta Ta Ta S1 62.It memcmp Ta Ta S Ta S1 Ta S 63.It memcpy Ta S Ta S Ta S Ta S Ta SV 64.It memmove Ta S Ta S Ta S Ta S Ta SV 65.It memset Ta Ta S Ta S Ta S 66.It rindex Ta S 67.It stpcpy Ta Ta Ta S1 68.It strcat Ta Ta Ta S Ta S 69.It strchr Ta S Ta Ta S1 Ta S 70.It strchrnul Ta Ta Ta S1 71.It strcmp Ta Ta S Ta S Ta S 72.It strcpy Ta Ta Ta S1 Ta S Ta S2 73.It strcspn Ta Ta Ta S2 74.It strlen Ta Ta S Ta S1 75.It strncmp Ta Ta S Ta Ta S 76.It strncpy Ta Ta Ta Ta Ta S2 77.It strnlen Ta Ta Ta S1 78.It strrchr Ta S Ta Ta Ta S 79.It strspn Ta Ta Ta S2 80.It swab Ta Ta Ta Ta S 81.It timingsafe_bcmp Ta Ta Ta S1 82.It timingsafe_memcmp Ta Ta Ta S 83.It wcschr Ta Ta Ta Ta S 84.It wcscmp Ta Ta Ta Ta S 85.It wcslen Ta Ta Ta Ta S 86.It wmemchr Ta Ta Ta Ta S 87.El 88.Pp 89.Sy S Ns :\ scalar (non-SIMD), 90.Sy 1 Ns :\ amd64 baseline, 91.Sy 2 Ns :\ x86-64-v2 92or PowerPC\ 2.05, 93.Sy 3 Ns :\ x86-64-v3, 94.Sy 4 Ns :\ x86-64-v4, 95.Sy V Ns :\ PowerPC\ VSX. 96. 97.Sh ENVIRONMENT 98.Bl -tag 99.It Ev ARCHLEVEL 100On 101.Em amd64 , 102controls the level of SIMD enhancements used. 103If this variable is set to an architecture level from the list below 104and that architecture level is supported by the processor, SIMD 105enhancements up to 106.Ev ARCHLEVEL 107are used. 108If 109.Ev ARCHLEVEL 110is unset, not recognised, or not supported by the processor, the highest 111level of SIMD enhancements supported by the processor is used. 112.Pp 113A suffix beginning with 114.Sq ":" 115or 116.Sq "+" 117in 118.Ev ARCHLEVEL 119is ignored and may be used for future extensions. 120The architecture level can be prefixed with a 121.Sq "!" 122character to force use of the requested architecture level, even if the 123processor does not advertise that it is supported. 124This usually causes applications to crash and should only be used for 125testing purposes or if architecture level detection yields incorrect 126results. 127.Pp 128The architecture levels follow the AMD64 SysV ABI supplement: 129.Bl -tag -width x86-64-v2 130.It Cm scalar 131scalar enhancements only (no SIMD) 132.It Cm baseline 133cmov, cx8, x87 FPU, fxsr, MMX, osfxsr, SSE, SSE2 134.It Cm x86-64-v2 135cx16, lahf/sahf, popcnt, SSE3, SSSE3, SSE4.1, SSE4.2 136.It Cm x86-64-v3 137AVX, AVX2, BMI1, BMI2, F16C, FMA, lzcnt, movbe, osxsave 138.It Cm x86-64-v4 139AVX-512F/BW/CD/DQ/VL 140.El 141.El 142. 143.Sh DIAGNOSTICS 144.Bl -diag 145.It "Illegal Instruction" 146Printed by 147.Xr sh 1 148if a command is terminated through delivery of a 149.Dv SIGILL 150signal, see 151.Xr signal 3 . 152.Pp 153Use of an unsupported architecture level was forced by setting 154.Ev ARCHLEVEL 155to a string beginning with a 156.Sq "!" 157character, causing a process to crash due to use of an unsupported 158instruction. 159Unset 160.Ev ARCHLEVEL , 161remove the 162.Sq "!" 163prefix or select a supported architecture level. 164.Pp 165Message may also appear for unrelated reasons. 166.El 167. 168.Sh SEE ALSO 169.Xr string 3 , 170.Xr arch 7 171.Rs 172.%A H. J. Lu 173.%A Michael Matz 174.%A Milind Girkar 175.%A Jan Hubi\[u010D]ka \" \(vc 176.%A Andreas Jaeger 177.%A Mark Mitchell 178.%B System V Application Binary Interface 179.%D May 23, 2023 180.%T AMD64 Architecture Processor Supplement 181.%O Version 1.0 182.Re 183. 184.Sh HISTORY 185Architecture-specific enhanced 186.Em libc 187functions were added starting 188with 189.Fx 2.0 190for 191.Cm i386 , 192.Fx 6.0 193for 194.Cm arm , 195.Fx 6.1 196for 197.Cm amd64 , 198.Fx 11.0 199for 200.Cm aarch64 , 201and 202.Fx 12.0 203for 204.Cm powerpc64 . 205SIMD-enhanced functions were first added with 206.Fx 13.0 207for 208.Cm powerpc64 209and with 210.Fx 14.0 211for 212.Cm amd64 . 213.Pp 214A 215.Nm 216manual page appeared in 217.Fx 14.0 . 218. 219.Sh AUTHOR 220.An Robert Clausecker Aq Mt fuz@FreeBSD.org 221. 222.Sh CAVEATS 223Other parts of 224.Fx 225such as cryptographic routines in the kernel or in 226OpenSSL may also use SIMD enhancements. 227These enhancements are not subject to the 228.Ev ARCHLEVEL 229variable and may have their own configuration 230mechanism. 231. 232.Sh BUGS 233Use of SIMD enhancements cannot be configured on powerpc64. 234