1 /*- 2 * SPDX-License-Identifier: BSD-4-Clause 3 * 4 * Copyright (c) 2003 Peter Wemm. 5 * Copyright (c) 1992 Terrence R. Lambert. 6 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to Berkeley by 10 * William Jolitz. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the University of 23 * California, Berkeley and its contributors. 24 * 4. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 41 */ 42 43 #include <sys/cdefs.h> 44 __FBSDID("$FreeBSD$"); 45 46 #include "opt_cpu.h" 47 #include "opt_ddb.h" 48 #include "opt_kstack_pages.h" 49 50 #include <sys/param.h> 51 #include <sys/proc.h> 52 #include <sys/systm.h> 53 #include <sys/exec.h> 54 #include <sys/imgact.h> 55 #include <sys/kdb.h> 56 #include <sys/kernel.h> 57 #include <sys/ktr.h> 58 #include <sys/linker.h> 59 #include <sys/lock.h> 60 #include <sys/malloc.h> 61 #include <sys/mutex.h> 62 #include <sys/pcpu.h> 63 #include <sys/reg.h> 64 #include <sys/rwlock.h> 65 #include <sys/signalvar.h> 66 #ifdef SMP 67 #include <sys/smp.h> 68 #endif 69 #include <sys/syscallsubr.h> 70 #include <sys/sysctl.h> 71 #include <sys/sysent.h> 72 #include <sys/sysproto.h> 73 #include <sys/ucontext.h> 74 #include <sys/vmmeter.h> 75 76 #include <vm/vm.h> 77 #include <vm/vm_param.h> 78 #include <vm/vm_extern.h> 79 #include <vm/pmap.h> 80 81 #ifdef DDB 82 #ifndef KDB 83 #error KDB must be enabled in order for DDB to work! 84 #endif 85 #include <ddb/ddb.h> 86 #include <ddb/db_sym.h> 87 #endif 88 89 #include <machine/vmparam.h> 90 #include <machine/frame.h> 91 #include <machine/md_var.h> 92 #include <machine/pcb.h> 93 #include <machine/proc.h> 94 #include <machine/sigframe.h> 95 #include <machine/specialreg.h> 96 #include <machine/trap.h> 97 98 static void get_fpcontext(struct thread *td, mcontext_t *mcp, 99 char **xfpusave, size_t *xfpusave_len); 100 static int set_fpcontext(struct thread *td, mcontext_t *mcp, 101 char *xfpustate, size_t xfpustate_len); 102 103 /* 104 * Send an interrupt to process. 105 * 106 * Stack is set up to allow sigcode stored at top to call routine, 107 * followed by call to sigreturn routine below. After sigreturn 108 * resets the signal mask, the stack, and the frame pointer, it 109 * returns to the user specified pc, psl. 110 */ 111 void 112 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 113 { 114 struct sigframe sf, *sfp; 115 struct pcb *pcb; 116 struct proc *p; 117 struct thread *td; 118 struct sigacts *psp; 119 char *sp; 120 struct trapframe *regs; 121 char *xfpusave; 122 size_t xfpusave_len; 123 int sig; 124 int oonstack; 125 126 td = curthread; 127 pcb = td->td_pcb; 128 p = td->td_proc; 129 PROC_LOCK_ASSERT(p, MA_OWNED); 130 sig = ksi->ksi_signo; 131 psp = p->p_sigacts; 132 mtx_assert(&psp->ps_mtx, MA_OWNED); 133 regs = td->td_frame; 134 oonstack = sigonstack(regs->tf_rsp); 135 136 /* Save user context. */ 137 bzero(&sf, sizeof(sf)); 138 sf.sf_uc.uc_sigmask = *mask; 139 sf.sf_uc.uc_stack = td->td_sigstk; 140 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 141 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 142 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 143 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs)); 144 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 145 get_fpcontext(td, &sf.sf_uc.uc_mcontext, &xfpusave, &xfpusave_len); 146 update_pcb_bases(pcb); 147 sf.sf_uc.uc_mcontext.mc_fsbase = pcb->pcb_fsbase; 148 sf.sf_uc.uc_mcontext.mc_gsbase = pcb->pcb_gsbase; 149 bzero(sf.sf_uc.uc_mcontext.mc_spare, 150 sizeof(sf.sf_uc.uc_mcontext.mc_spare)); 151 152 /* Allocate space for the signal handler context. */ 153 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 154 SIGISMEMBER(psp->ps_sigonstack, sig)) { 155 sp = (char *)td->td_sigstk.ss_sp + td->td_sigstk.ss_size; 156 #if defined(COMPAT_43) 157 td->td_sigstk.ss_flags |= SS_ONSTACK; 158 #endif 159 } else 160 sp = (char *)regs->tf_rsp - 128; 161 if (xfpusave != NULL) { 162 sp -= xfpusave_len; 163 sp = (char *)((unsigned long)sp & ~0x3Ful); 164 sf.sf_uc.uc_mcontext.mc_xfpustate = (register_t)sp; 165 } 166 sp -= sizeof(struct sigframe); 167 /* Align to 16 bytes. */ 168 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul); 169 170 /* Build the argument list for the signal handler. */ 171 regs->tf_rdi = sig; /* arg 1 in %rdi */ 172 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */ 173 bzero(&sf.sf_si, sizeof(sf.sf_si)); 174 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 175 /* Signal handler installed with SA_SIGINFO. */ 176 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */ 177 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 178 179 /* Fill in POSIX parts */ 180 sf.sf_si = ksi->ksi_info; 181 sf.sf_si.si_signo = sig; /* maybe a translated signal */ 182 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 183 } else { 184 /* Old FreeBSD-style arguments. */ 185 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */ 186 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 187 sf.sf_ahu.sf_handler = catcher; 188 } 189 mtx_unlock(&psp->ps_mtx); 190 PROC_UNLOCK(p); 191 192 /* 193 * Copy the sigframe out to the user's stack. 194 */ 195 if (copyout(&sf, sfp, sizeof(*sfp)) != 0 || 196 (xfpusave != NULL && copyout(xfpusave, 197 (void *)sf.sf_uc.uc_mcontext.mc_xfpustate, xfpusave_len) 198 != 0)) { 199 uprintf("pid %d comm %s has trashed its stack, killing\n", 200 p->p_pid, p->p_comm); 201 PROC_LOCK(p); 202 sigexit(td, SIGILL); 203 } 204 205 fpstate_drop(td); 206 regs->tf_rsp = (long)sfp; 207 regs->tf_rip = p->p_sysent->sv_sigcode_base; 208 regs->tf_rflags &= ~(PSL_T | PSL_D); 209 regs->tf_cs = _ucodesel; 210 regs->tf_ds = _udatasel; 211 regs->tf_ss = _udatasel; 212 regs->tf_es = _udatasel; 213 regs->tf_fs = _ufssel; 214 regs->tf_gs = _ugssel; 215 regs->tf_flags = TF_HASSEGS; 216 PROC_LOCK(p); 217 mtx_lock(&psp->ps_mtx); 218 } 219 220 /* 221 * System call to cleanup state after a signal 222 * has been taken. Reset signal mask and 223 * stack state from context left by sendsig (above). 224 * Return to previous pc and psl as specified by 225 * context left by sendsig. Check carefully to 226 * make sure that the user has not modified the 227 * state to gain improper privileges. 228 */ 229 int 230 sys_sigreturn(struct thread *td, struct sigreturn_args *uap) 231 { 232 ucontext_t uc; 233 struct pcb *pcb; 234 struct proc *p; 235 struct trapframe *regs; 236 ucontext_t *ucp; 237 char *xfpustate; 238 size_t xfpustate_len; 239 long rflags; 240 int cs, error, ret; 241 ksiginfo_t ksi; 242 243 pcb = td->td_pcb; 244 p = td->td_proc; 245 246 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 247 if (error != 0) { 248 uprintf("pid %d (%s): sigreturn copyin failed\n", 249 p->p_pid, td->td_name); 250 return (error); 251 } 252 ucp = &uc; 253 if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) { 254 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid, 255 td->td_name, ucp->uc_mcontext.mc_flags); 256 return (EINVAL); 257 } 258 regs = td->td_frame; 259 rflags = ucp->uc_mcontext.mc_rflags; 260 /* 261 * Don't allow users to change privileged or reserved flags. 262 */ 263 if (!EFL_SECURE(rflags, regs->tf_rflags)) { 264 uprintf("pid %d (%s): sigreturn rflags = 0x%lx\n", p->p_pid, 265 td->td_name, rflags); 266 return (EINVAL); 267 } 268 269 /* 270 * Don't allow users to load a valid privileged %cs. Let the 271 * hardware check for invalid selectors, excess privilege in 272 * other selectors, invalid %eip's and invalid %esp's. 273 */ 274 cs = ucp->uc_mcontext.mc_cs; 275 if (!CS_SECURE(cs)) { 276 uprintf("pid %d (%s): sigreturn cs = 0x%x\n", p->p_pid, 277 td->td_name, cs); 278 ksiginfo_init_trap(&ksi); 279 ksi.ksi_signo = SIGBUS; 280 ksi.ksi_code = BUS_OBJERR; 281 ksi.ksi_trapno = T_PROTFLT; 282 ksi.ksi_addr = (void *)regs->tf_rip; 283 trapsignal(td, &ksi); 284 return (EINVAL); 285 } 286 287 if ((uc.uc_mcontext.mc_flags & _MC_HASFPXSTATE) != 0) { 288 xfpustate_len = uc.uc_mcontext.mc_xfpustate_len; 289 if (xfpustate_len > cpu_max_ext_state_size - 290 sizeof(struct savefpu)) { 291 uprintf("pid %d (%s): sigreturn xfpusave_len = 0x%zx\n", 292 p->p_pid, td->td_name, xfpustate_len); 293 return (EINVAL); 294 } 295 xfpustate = (char *)fpu_save_area_alloc(); 296 error = copyin((const void *)uc.uc_mcontext.mc_xfpustate, 297 xfpustate, xfpustate_len); 298 if (error != 0) { 299 fpu_save_area_free((struct savefpu *)xfpustate); 300 uprintf( 301 "pid %d (%s): sigreturn copying xfpustate failed\n", 302 p->p_pid, td->td_name); 303 return (error); 304 } 305 } else { 306 xfpustate = NULL; 307 xfpustate_len = 0; 308 } 309 ret = set_fpcontext(td, &ucp->uc_mcontext, xfpustate, xfpustate_len); 310 fpu_save_area_free((struct savefpu *)xfpustate); 311 if (ret != 0) { 312 uprintf("pid %d (%s): sigreturn set_fpcontext err %d\n", 313 p->p_pid, td->td_name, ret); 314 return (ret); 315 } 316 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs)); 317 update_pcb_bases(pcb); 318 pcb->pcb_fsbase = ucp->uc_mcontext.mc_fsbase; 319 pcb->pcb_gsbase = ucp->uc_mcontext.mc_gsbase; 320 321 #if defined(COMPAT_43) 322 if (ucp->uc_mcontext.mc_onstack & 1) 323 td->td_sigstk.ss_flags |= SS_ONSTACK; 324 else 325 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 326 #endif 327 328 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0); 329 return (EJUSTRETURN); 330 } 331 332 #ifdef COMPAT_FREEBSD4 333 int 334 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 335 { 336 337 return sys_sigreturn(td, (struct sigreturn_args *)uap); 338 } 339 #endif 340 341 /* 342 * Reset the hardware debug registers if they were in use. 343 * They won't have any meaning for the newly exec'd process. 344 */ 345 void 346 x86_clear_dbregs(struct pcb *pcb) 347 { 348 if ((pcb->pcb_flags & PCB_DBREGS) == 0) 349 return; 350 351 pcb->pcb_dr0 = 0; 352 pcb->pcb_dr1 = 0; 353 pcb->pcb_dr2 = 0; 354 pcb->pcb_dr3 = 0; 355 pcb->pcb_dr6 = 0; 356 pcb->pcb_dr7 = 0; 357 358 if (pcb == curpcb) { 359 /* 360 * Clear the debug registers on the running CPU, 361 * otherwise they will end up affecting the next 362 * process we switch to. 363 */ 364 reset_dbregs(); 365 } 366 clear_pcb_flags(pcb, PCB_DBREGS); 367 } 368 369 /* 370 * Reset registers to default values on exec. 371 */ 372 void 373 exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack) 374 { 375 struct trapframe *regs; 376 struct pcb *pcb; 377 register_t saved_rflags; 378 379 regs = td->td_frame; 380 pcb = td->td_pcb; 381 382 if (td->td_proc->p_md.md_ldt != NULL) 383 user_ldt_free(td); 384 385 update_pcb_bases(pcb); 386 pcb->pcb_fsbase = 0; 387 pcb->pcb_gsbase = 0; 388 clear_pcb_flags(pcb, PCB_32BIT); 389 pcb->pcb_initial_fpucw = __INITIAL_FPUCW__; 390 391 saved_rflags = regs->tf_rflags & PSL_T; 392 bzero((char *)regs, sizeof(struct trapframe)); 393 regs->tf_rip = imgp->entry_addr; 394 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; 395 regs->tf_rdi = stack; /* argv */ 396 regs->tf_rflags = PSL_USER | saved_rflags; 397 regs->tf_ss = _udatasel; 398 regs->tf_cs = _ucodesel; 399 regs->tf_ds = _udatasel; 400 regs->tf_es = _udatasel; 401 regs->tf_fs = _ufssel; 402 regs->tf_gs = _ugssel; 403 regs->tf_flags = TF_HASSEGS; 404 405 x86_clear_dbregs(pcb); 406 407 /* 408 * Drop the FP state if we hold it, so that the process gets a 409 * clean FP state if it uses the FPU again. 410 */ 411 fpstate_drop(td); 412 } 413 414 int 415 fill_regs(struct thread *td, struct reg *regs) 416 { 417 struct trapframe *tp; 418 419 tp = td->td_frame; 420 return (fill_frame_regs(tp, regs)); 421 } 422 423 int 424 fill_frame_regs(struct trapframe *tp, struct reg *regs) 425 { 426 427 regs->r_r15 = tp->tf_r15; 428 regs->r_r14 = tp->tf_r14; 429 regs->r_r13 = tp->tf_r13; 430 regs->r_r12 = tp->tf_r12; 431 regs->r_r11 = tp->tf_r11; 432 regs->r_r10 = tp->tf_r10; 433 regs->r_r9 = tp->tf_r9; 434 regs->r_r8 = tp->tf_r8; 435 regs->r_rdi = tp->tf_rdi; 436 regs->r_rsi = tp->tf_rsi; 437 regs->r_rbp = tp->tf_rbp; 438 regs->r_rbx = tp->tf_rbx; 439 regs->r_rdx = tp->tf_rdx; 440 regs->r_rcx = tp->tf_rcx; 441 regs->r_rax = tp->tf_rax; 442 regs->r_rip = tp->tf_rip; 443 regs->r_cs = tp->tf_cs; 444 regs->r_rflags = tp->tf_rflags; 445 regs->r_rsp = tp->tf_rsp; 446 regs->r_ss = tp->tf_ss; 447 if (tp->tf_flags & TF_HASSEGS) { 448 regs->r_ds = tp->tf_ds; 449 regs->r_es = tp->tf_es; 450 regs->r_fs = tp->tf_fs; 451 regs->r_gs = tp->tf_gs; 452 } else { 453 regs->r_ds = 0; 454 regs->r_es = 0; 455 regs->r_fs = 0; 456 regs->r_gs = 0; 457 } 458 regs->r_err = 0; 459 regs->r_trapno = 0; 460 return (0); 461 } 462 463 int 464 set_regs(struct thread *td, struct reg *regs) 465 { 466 struct trapframe *tp; 467 register_t rflags; 468 469 tp = td->td_frame; 470 rflags = regs->r_rflags & 0xffffffff; 471 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs)) 472 return (EINVAL); 473 tp->tf_r15 = regs->r_r15; 474 tp->tf_r14 = regs->r_r14; 475 tp->tf_r13 = regs->r_r13; 476 tp->tf_r12 = regs->r_r12; 477 tp->tf_r11 = regs->r_r11; 478 tp->tf_r10 = regs->r_r10; 479 tp->tf_r9 = regs->r_r9; 480 tp->tf_r8 = regs->r_r8; 481 tp->tf_rdi = regs->r_rdi; 482 tp->tf_rsi = regs->r_rsi; 483 tp->tf_rbp = regs->r_rbp; 484 tp->tf_rbx = regs->r_rbx; 485 tp->tf_rdx = regs->r_rdx; 486 tp->tf_rcx = regs->r_rcx; 487 tp->tf_rax = regs->r_rax; 488 tp->tf_rip = regs->r_rip; 489 tp->tf_cs = regs->r_cs; 490 tp->tf_rflags = rflags; 491 tp->tf_rsp = regs->r_rsp; 492 tp->tf_ss = regs->r_ss; 493 if (0) { /* XXXKIB */ 494 tp->tf_ds = regs->r_ds; 495 tp->tf_es = regs->r_es; 496 tp->tf_fs = regs->r_fs; 497 tp->tf_gs = regs->r_gs; 498 tp->tf_flags = TF_HASSEGS; 499 } 500 set_pcb_flags(td->td_pcb, PCB_FULL_IRET); 501 return (0); 502 } 503 504 /* XXX check all this stuff! */ 505 /* externalize from sv_xmm */ 506 static void 507 fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs) 508 { 509 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 510 struct envxmm *penv_xmm = &sv_xmm->sv_env; 511 int i; 512 513 /* pcb -> fpregs */ 514 bzero(fpregs, sizeof(*fpregs)); 515 516 /* FPU control/status */ 517 penv_fpreg->en_cw = penv_xmm->en_cw; 518 penv_fpreg->en_sw = penv_xmm->en_sw; 519 penv_fpreg->en_tw = penv_xmm->en_tw; 520 penv_fpreg->en_opcode = penv_xmm->en_opcode; 521 penv_fpreg->en_rip = penv_xmm->en_rip; 522 penv_fpreg->en_rdp = penv_xmm->en_rdp; 523 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr; 524 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask; 525 526 /* FPU registers */ 527 for (i = 0; i < 8; ++i) 528 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10); 529 530 /* SSE registers */ 531 for (i = 0; i < 16; ++i) 532 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16); 533 } 534 535 /* internalize from fpregs into sv_xmm */ 536 static void 537 set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm) 538 { 539 struct envxmm *penv_xmm = &sv_xmm->sv_env; 540 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 541 int i; 542 543 /* fpregs -> pcb */ 544 /* FPU control/status */ 545 penv_xmm->en_cw = penv_fpreg->en_cw; 546 penv_xmm->en_sw = penv_fpreg->en_sw; 547 penv_xmm->en_tw = penv_fpreg->en_tw; 548 penv_xmm->en_opcode = penv_fpreg->en_opcode; 549 penv_xmm->en_rip = penv_fpreg->en_rip; 550 penv_xmm->en_rdp = penv_fpreg->en_rdp; 551 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr; 552 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask; 553 554 /* FPU registers */ 555 for (i = 0; i < 8; ++i) 556 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10); 557 558 /* SSE registers */ 559 for (i = 0; i < 16; ++i) 560 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16); 561 } 562 563 /* externalize from td->pcb */ 564 int 565 fill_fpregs(struct thread *td, struct fpreg *fpregs) 566 { 567 568 KASSERT(td == curthread || TD_IS_SUSPENDED(td) || 569 P_SHOULDSTOP(td->td_proc), 570 ("not suspended thread %p", td)); 571 fpugetregs(td); 572 fill_fpregs_xmm(get_pcb_user_save_td(td), fpregs); 573 return (0); 574 } 575 576 /* internalize to td->pcb */ 577 int 578 set_fpregs(struct thread *td, struct fpreg *fpregs) 579 { 580 581 critical_enter(); 582 set_fpregs_xmm(fpregs, get_pcb_user_save_td(td)); 583 fpuuserinited(td); 584 critical_exit(); 585 return (0); 586 } 587 588 /* 589 * Get machine context. 590 */ 591 int 592 get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 593 { 594 struct pcb *pcb; 595 struct trapframe *tp; 596 597 pcb = td->td_pcb; 598 tp = td->td_frame; 599 PROC_LOCK(curthread->td_proc); 600 mcp->mc_onstack = sigonstack(tp->tf_rsp); 601 PROC_UNLOCK(curthread->td_proc); 602 mcp->mc_r15 = tp->tf_r15; 603 mcp->mc_r14 = tp->tf_r14; 604 mcp->mc_r13 = tp->tf_r13; 605 mcp->mc_r12 = tp->tf_r12; 606 mcp->mc_r11 = tp->tf_r11; 607 mcp->mc_r10 = tp->tf_r10; 608 mcp->mc_r9 = tp->tf_r9; 609 mcp->mc_r8 = tp->tf_r8; 610 mcp->mc_rdi = tp->tf_rdi; 611 mcp->mc_rsi = tp->tf_rsi; 612 mcp->mc_rbp = tp->tf_rbp; 613 mcp->mc_rbx = tp->tf_rbx; 614 mcp->mc_rcx = tp->tf_rcx; 615 mcp->mc_rflags = tp->tf_rflags; 616 if (flags & GET_MC_CLEAR_RET) { 617 mcp->mc_rax = 0; 618 mcp->mc_rdx = 0; 619 mcp->mc_rflags &= ~PSL_C; 620 } else { 621 mcp->mc_rax = tp->tf_rax; 622 mcp->mc_rdx = tp->tf_rdx; 623 } 624 mcp->mc_rip = tp->tf_rip; 625 mcp->mc_cs = tp->tf_cs; 626 mcp->mc_rsp = tp->tf_rsp; 627 mcp->mc_ss = tp->tf_ss; 628 mcp->mc_ds = tp->tf_ds; 629 mcp->mc_es = tp->tf_es; 630 mcp->mc_fs = tp->tf_fs; 631 mcp->mc_gs = tp->tf_gs; 632 mcp->mc_flags = tp->tf_flags; 633 mcp->mc_len = sizeof(*mcp); 634 get_fpcontext(td, mcp, NULL, 0); 635 update_pcb_bases(pcb); 636 mcp->mc_fsbase = pcb->pcb_fsbase; 637 mcp->mc_gsbase = pcb->pcb_gsbase; 638 mcp->mc_xfpustate = 0; 639 mcp->mc_xfpustate_len = 0; 640 bzero(mcp->mc_spare, sizeof(mcp->mc_spare)); 641 return (0); 642 } 643 644 /* 645 * Set machine context. 646 * 647 * However, we don't set any but the user modifiable flags, and we won't 648 * touch the cs selector. 649 */ 650 int 651 set_mcontext(struct thread *td, mcontext_t *mcp) 652 { 653 struct pcb *pcb; 654 struct trapframe *tp; 655 char *xfpustate; 656 long rflags; 657 int ret; 658 659 pcb = td->td_pcb; 660 tp = td->td_frame; 661 if (mcp->mc_len != sizeof(*mcp) || 662 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0) 663 return (EINVAL); 664 rflags = (mcp->mc_rflags & PSL_USERCHANGE) | 665 (tp->tf_rflags & ~PSL_USERCHANGE); 666 if (mcp->mc_flags & _MC_HASFPXSTATE) { 667 if (mcp->mc_xfpustate_len > cpu_max_ext_state_size - 668 sizeof(struct savefpu)) 669 return (EINVAL); 670 xfpustate = (char *)fpu_save_area_alloc(); 671 ret = copyin((void *)mcp->mc_xfpustate, xfpustate, 672 mcp->mc_xfpustate_len); 673 if (ret != 0) { 674 fpu_save_area_free((struct savefpu *)xfpustate); 675 return (ret); 676 } 677 } else 678 xfpustate = NULL; 679 ret = set_fpcontext(td, mcp, xfpustate, mcp->mc_xfpustate_len); 680 fpu_save_area_free((struct savefpu *)xfpustate); 681 if (ret != 0) 682 return (ret); 683 tp->tf_r15 = mcp->mc_r15; 684 tp->tf_r14 = mcp->mc_r14; 685 tp->tf_r13 = mcp->mc_r13; 686 tp->tf_r12 = mcp->mc_r12; 687 tp->tf_r11 = mcp->mc_r11; 688 tp->tf_r10 = mcp->mc_r10; 689 tp->tf_r9 = mcp->mc_r9; 690 tp->tf_r8 = mcp->mc_r8; 691 tp->tf_rdi = mcp->mc_rdi; 692 tp->tf_rsi = mcp->mc_rsi; 693 tp->tf_rbp = mcp->mc_rbp; 694 tp->tf_rbx = mcp->mc_rbx; 695 tp->tf_rdx = mcp->mc_rdx; 696 tp->tf_rcx = mcp->mc_rcx; 697 tp->tf_rax = mcp->mc_rax; 698 tp->tf_rip = mcp->mc_rip; 699 tp->tf_rflags = rflags; 700 tp->tf_rsp = mcp->mc_rsp; 701 tp->tf_ss = mcp->mc_ss; 702 tp->tf_flags = mcp->mc_flags; 703 if (tp->tf_flags & TF_HASSEGS) { 704 tp->tf_ds = mcp->mc_ds; 705 tp->tf_es = mcp->mc_es; 706 tp->tf_fs = mcp->mc_fs; 707 tp->tf_gs = mcp->mc_gs; 708 } 709 set_pcb_flags(pcb, PCB_FULL_IRET); 710 if (mcp->mc_flags & _MC_HASBASES) { 711 pcb->pcb_fsbase = mcp->mc_fsbase; 712 pcb->pcb_gsbase = mcp->mc_gsbase; 713 } 714 return (0); 715 } 716 717 static void 718 get_fpcontext(struct thread *td, mcontext_t *mcp, char **xfpusave, 719 size_t *xfpusave_len) 720 { 721 mcp->mc_ownedfp = fpugetregs(td); 722 bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate[0], 723 sizeof(mcp->mc_fpstate)); 724 mcp->mc_fpformat = fpuformat(); 725 if (xfpusave == NULL) 726 return; 727 if (!use_xsave || cpu_max_ext_state_size <= sizeof(struct savefpu)) { 728 *xfpusave_len = 0; 729 *xfpusave = NULL; 730 } else { 731 mcp->mc_flags |= _MC_HASFPXSTATE; 732 *xfpusave_len = mcp->mc_xfpustate_len = 733 cpu_max_ext_state_size - sizeof(struct savefpu); 734 *xfpusave = (char *)(get_pcb_user_save_td(td) + 1); 735 } 736 } 737 738 static int 739 set_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpustate, 740 size_t xfpustate_len) 741 { 742 int error; 743 744 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 745 return (0); 746 else if (mcp->mc_fpformat != _MC_FPFMT_XMM) 747 return (EINVAL); 748 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) { 749 /* We don't care what state is left in the FPU or PCB. */ 750 fpstate_drop(td); 751 error = 0; 752 } else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 753 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 754 error = fpusetregs(td, (struct savefpu *)&mcp->mc_fpstate, 755 xfpustate, xfpustate_len); 756 } else 757 return (EINVAL); 758 return (error); 759 } 760 761 void 762 fpstate_drop(struct thread *td) 763 { 764 765 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu")); 766 critical_enter(); 767 if (PCPU_GET(fpcurthread) == td) 768 fpudrop(); 769 /* 770 * XXX force a full drop of the fpu. The above only drops it if we 771 * owned it. 772 * 773 * XXX I don't much like fpugetuserregs()'s semantics of doing a full 774 * drop. Dropping only to the pcb matches fnsave's behaviour. 775 * We only need to drop to !PCB_INITDONE in sendsig(). But 776 * sendsig() is the only caller of fpugetuserregs()... perhaps we just 777 * have too many layers. 778 */ 779 clear_pcb_flags(curthread->td_pcb, 780 PCB_FPUINITDONE | PCB_USERFPUINITDONE); 781 critical_exit(); 782 } 783 784 int 785 fill_dbregs(struct thread *td, struct dbreg *dbregs) 786 { 787 struct pcb *pcb; 788 789 if (td == NULL) { 790 dbregs->dr[0] = rdr0(); 791 dbregs->dr[1] = rdr1(); 792 dbregs->dr[2] = rdr2(); 793 dbregs->dr[3] = rdr3(); 794 dbregs->dr[6] = rdr6(); 795 dbregs->dr[7] = rdr7(); 796 } else { 797 pcb = td->td_pcb; 798 dbregs->dr[0] = pcb->pcb_dr0; 799 dbregs->dr[1] = pcb->pcb_dr1; 800 dbregs->dr[2] = pcb->pcb_dr2; 801 dbregs->dr[3] = pcb->pcb_dr3; 802 dbregs->dr[6] = pcb->pcb_dr6; 803 dbregs->dr[7] = pcb->pcb_dr7; 804 } 805 dbregs->dr[4] = 0; 806 dbregs->dr[5] = 0; 807 dbregs->dr[8] = 0; 808 dbregs->dr[9] = 0; 809 dbregs->dr[10] = 0; 810 dbregs->dr[11] = 0; 811 dbregs->dr[12] = 0; 812 dbregs->dr[13] = 0; 813 dbregs->dr[14] = 0; 814 dbregs->dr[15] = 0; 815 return (0); 816 } 817 818 int 819 set_dbregs(struct thread *td, struct dbreg *dbregs) 820 { 821 struct pcb *pcb; 822 int i; 823 824 if (td == NULL) { 825 load_dr0(dbregs->dr[0]); 826 load_dr1(dbregs->dr[1]); 827 load_dr2(dbregs->dr[2]); 828 load_dr3(dbregs->dr[3]); 829 load_dr6(dbregs->dr[6]); 830 load_dr7(dbregs->dr[7]); 831 } else { 832 /* 833 * Don't let an illegal value for dr7 get set. Specifically, 834 * check for undefined settings. Setting these bit patterns 835 * result in undefined behaviour and can lead to an unexpected 836 * TRCTRAP or a general protection fault right here. 837 * Upper bits of dr6 and dr7 must not be set 838 */ 839 for (i = 0; i < 4; i++) { 840 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02) 841 return (EINVAL); 842 if (td->td_frame->tf_cs == _ucode32sel && 843 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8) 844 return (EINVAL); 845 } 846 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 || 847 (dbregs->dr[7] & 0xffffffff00000000ul) != 0) 848 return (EINVAL); 849 850 pcb = td->td_pcb; 851 852 /* 853 * Don't let a process set a breakpoint that is not within the 854 * process's address space. If a process could do this, it 855 * could halt the system by setting a breakpoint in the kernel 856 * (if ddb was enabled). Thus, we need to check to make sure 857 * that no breakpoints are being enabled for addresses outside 858 * process's address space. 859 * 860 * XXX - what about when the watched area of the user's 861 * address space is written into from within the kernel 862 * ... wouldn't that still cause a breakpoint to be generated 863 * from within kernel mode? 864 */ 865 866 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) { 867 /* dr0 is enabled */ 868 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 869 return (EINVAL); 870 } 871 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) { 872 /* dr1 is enabled */ 873 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 874 return (EINVAL); 875 } 876 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) { 877 /* dr2 is enabled */ 878 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 879 return (EINVAL); 880 } 881 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) { 882 /* dr3 is enabled */ 883 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 884 return (EINVAL); 885 } 886 887 pcb->pcb_dr0 = dbregs->dr[0]; 888 pcb->pcb_dr1 = dbregs->dr[1]; 889 pcb->pcb_dr2 = dbregs->dr[2]; 890 pcb->pcb_dr3 = dbregs->dr[3]; 891 pcb->pcb_dr6 = dbregs->dr[6]; 892 pcb->pcb_dr7 = dbregs->dr[7]; 893 894 set_pcb_flags(pcb, PCB_DBREGS); 895 } 896 897 return (0); 898 } 899 900 void 901 reset_dbregs(void) 902 { 903 904 load_dr7(0); /* Turn off the control bits first */ 905 load_dr0(0); 906 load_dr1(0); 907 load_dr2(0); 908 load_dr3(0); 909 load_dr6(0); 910 } 911 912 /* 913 * Return > 0 if a hardware breakpoint has been hit, and the 914 * breakpoint was in user space. Return 0, otherwise. 915 */ 916 int 917 user_dbreg_trap(register_t dr6) 918 { 919 u_int64_t dr7; 920 u_int64_t bp; /* breakpoint bits extracted from dr6 */ 921 int nbp; /* number of breakpoints that triggered */ 922 caddr_t addr[4]; /* breakpoint addresses */ 923 int i; 924 925 bp = dr6 & DBREG_DR6_BMASK; 926 if (bp == 0) { 927 /* 928 * None of the breakpoint bits are set meaning this 929 * trap was not caused by any of the debug registers 930 */ 931 return (0); 932 } 933 934 dr7 = rdr7(); 935 if ((dr7 & 0x000000ff) == 0) { 936 /* 937 * all GE and LE bits in the dr7 register are zero, 938 * thus the trap couldn't have been caused by the 939 * hardware debug registers 940 */ 941 return (0); 942 } 943 944 nbp = 0; 945 946 /* 947 * at least one of the breakpoints were hit, check to see 948 * which ones and if any of them are user space addresses 949 */ 950 951 if (bp & 0x01) { 952 addr[nbp++] = (caddr_t)rdr0(); 953 } 954 if (bp & 0x02) { 955 addr[nbp++] = (caddr_t)rdr1(); 956 } 957 if (bp & 0x04) { 958 addr[nbp++] = (caddr_t)rdr2(); 959 } 960 if (bp & 0x08) { 961 addr[nbp++] = (caddr_t)rdr3(); 962 } 963 964 for (i = 0; i < nbp; i++) { 965 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) { 966 /* 967 * addr[i] is in user space 968 */ 969 return (nbp); 970 } 971 } 972 973 /* 974 * None of the breakpoints are in user space. 975 */ 976 return (0); 977 } 978