1 /*- 2 * SPDX-License-Identifier: BSD-4-Clause 3 * 4 * Copyright (c) 2003 Peter Wemm. 5 * Copyright (c) 1992 Terrence R. Lambert. 6 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to Berkeley by 10 * William Jolitz. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the University of 23 * California, Berkeley and its contributors. 24 * 4. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 41 */ 42 43 #include <sys/cdefs.h> 44 __FBSDID("$FreeBSD$"); 45 46 #include "opt_cpu.h" 47 #include "opt_ddb.h" 48 #include "opt_kstack_pages.h" 49 50 #include <sys/param.h> 51 #include <sys/proc.h> 52 #include <sys/systm.h> 53 #include <sys/exec.h> 54 #include <sys/imgact.h> 55 #include <sys/kdb.h> 56 #include <sys/kernel.h> 57 #include <sys/ktr.h> 58 #include <sys/linker.h> 59 #include <sys/lock.h> 60 #include <sys/malloc.h> 61 #include <sys/mutex.h> 62 #include <sys/pcpu.h> 63 #include <sys/reg.h> 64 #include <sys/rwlock.h> 65 #include <sys/signalvar.h> 66 #ifdef SMP 67 #include <sys/smp.h> 68 #endif 69 #include <sys/syscallsubr.h> 70 #include <sys/sysctl.h> 71 #include <sys/sysent.h> 72 #include <sys/sysproto.h> 73 #include <sys/ucontext.h> 74 #include <sys/vmmeter.h> 75 76 #include <vm/vm.h> 77 #include <vm/vm_param.h> 78 #include <vm/vm_extern.h> 79 #include <vm/pmap.h> 80 81 #ifdef DDB 82 #ifndef KDB 83 #error KDB must be enabled in order for DDB to work! 84 #endif 85 #include <ddb/ddb.h> 86 #include <ddb/db_sym.h> 87 #endif 88 89 #include <machine/vmparam.h> 90 #include <machine/frame.h> 91 #include <machine/md_var.h> 92 #include <machine/pcb.h> 93 #include <machine/proc.h> 94 #include <machine/sigframe.h> 95 #include <machine/specialreg.h> 96 #include <machine/trap.h> 97 98 _Static_assert(sizeof(mcontext_t) == 800, "mcontext_t size incorrect"); 99 _Static_assert(sizeof(ucontext_t) == 880, "ucontext_t size incorrect"); 100 _Static_assert(sizeof(siginfo_t) == 80, "siginfo_t size incorrect"); 101 102 /* 103 * Send an interrupt to process. 104 * 105 * Stack is set up to allow sigcode stored at top to call routine, 106 * followed by call to sigreturn routine below. After sigreturn 107 * resets the signal mask, the stack, and the frame pointer, it 108 * returns to the user specified pc, psl. 109 */ 110 void 111 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 112 { 113 struct sigframe sf, *sfp; 114 struct pcb *pcb; 115 struct proc *p; 116 struct thread *td; 117 struct sigacts *psp; 118 char *sp; 119 struct trapframe *regs; 120 char *xfpusave; 121 size_t xfpusave_len; 122 int sig; 123 int oonstack; 124 125 td = curthread; 126 pcb = td->td_pcb; 127 p = td->td_proc; 128 PROC_LOCK_ASSERT(p, MA_OWNED); 129 sig = ksi->ksi_signo; 130 psp = p->p_sigacts; 131 mtx_assert(&psp->ps_mtx, MA_OWNED); 132 regs = td->td_frame; 133 oonstack = sigonstack(regs->tf_rsp); 134 135 /* Save user context. */ 136 bzero(&sf, sizeof(sf)); 137 sf.sf_uc.uc_sigmask = *mask; 138 sf.sf_uc.uc_stack = td->td_sigstk; 139 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 140 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 141 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 142 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs)); 143 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 144 get_fpcontext(td, &sf.sf_uc.uc_mcontext, &xfpusave, &xfpusave_len); 145 update_pcb_bases(pcb); 146 sf.sf_uc.uc_mcontext.mc_fsbase = pcb->pcb_fsbase; 147 sf.sf_uc.uc_mcontext.mc_gsbase = pcb->pcb_gsbase; 148 bzero(sf.sf_uc.uc_mcontext.mc_spare, 149 sizeof(sf.sf_uc.uc_mcontext.mc_spare)); 150 151 /* Allocate space for the signal handler context. */ 152 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 153 SIGISMEMBER(psp->ps_sigonstack, sig)) { 154 sp = (char *)td->td_sigstk.ss_sp + td->td_sigstk.ss_size; 155 #if defined(COMPAT_43) 156 td->td_sigstk.ss_flags |= SS_ONSTACK; 157 #endif 158 } else 159 sp = (char *)regs->tf_rsp - 128; 160 if (xfpusave != NULL) { 161 sp -= xfpusave_len; 162 sp = (char *)((unsigned long)sp & ~0x3Ful); 163 sf.sf_uc.uc_mcontext.mc_xfpustate = (register_t)sp; 164 } 165 sp -= sizeof(struct sigframe); 166 /* Align to 16 bytes. */ 167 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul); 168 169 /* Build the argument list for the signal handler. */ 170 regs->tf_rdi = sig; /* arg 1 in %rdi */ 171 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */ 172 bzero(&sf.sf_si, sizeof(sf.sf_si)); 173 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 174 /* Signal handler installed with SA_SIGINFO. */ 175 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */ 176 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 177 178 /* Fill in POSIX parts */ 179 sf.sf_si = ksi->ksi_info; 180 sf.sf_si.si_signo = sig; /* maybe a translated signal */ 181 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 182 } else { 183 /* Old FreeBSD-style arguments. */ 184 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */ 185 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 186 sf.sf_ahu.sf_handler = catcher; 187 } 188 mtx_unlock(&psp->ps_mtx); 189 PROC_UNLOCK(p); 190 191 /* 192 * Copy the sigframe out to the user's stack. 193 */ 194 if (copyout(&sf, sfp, sizeof(*sfp)) != 0 || 195 (xfpusave != NULL && copyout(xfpusave, 196 (void *)sf.sf_uc.uc_mcontext.mc_xfpustate, xfpusave_len) 197 != 0)) { 198 uprintf("pid %d comm %s has trashed its stack, killing\n", 199 p->p_pid, p->p_comm); 200 PROC_LOCK(p); 201 sigexit(td, SIGILL); 202 } 203 204 fpstate_drop(td); 205 regs->tf_rsp = (long)sfp; 206 regs->tf_rip = p->p_sysent->sv_sigcode_base; 207 regs->tf_rflags &= ~(PSL_T | PSL_D); 208 regs->tf_cs = _ucodesel; 209 regs->tf_ds = _udatasel; 210 regs->tf_ss = _udatasel; 211 regs->tf_es = _udatasel; 212 regs->tf_fs = _ufssel; 213 regs->tf_gs = _ugssel; 214 regs->tf_flags = TF_HASSEGS; 215 PROC_LOCK(p); 216 mtx_lock(&psp->ps_mtx); 217 } 218 219 /* 220 * System call to cleanup state after a signal 221 * has been taken. Reset signal mask and 222 * stack state from context left by sendsig (above). 223 * Return to previous pc and psl as specified by 224 * context left by sendsig. Check carefully to 225 * make sure that the user has not modified the 226 * state to gain improper privileges. 227 */ 228 int 229 sys_sigreturn(struct thread *td, struct sigreturn_args *uap) 230 { 231 ucontext_t uc; 232 struct pcb *pcb; 233 struct proc *p; 234 struct trapframe *regs; 235 ucontext_t *ucp; 236 char *xfpustate; 237 size_t xfpustate_len; 238 long rflags; 239 int cs, error, ret; 240 ksiginfo_t ksi; 241 242 pcb = td->td_pcb; 243 p = td->td_proc; 244 245 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 246 if (error != 0) { 247 uprintf("pid %d (%s): sigreturn copyin failed\n", 248 p->p_pid, td->td_name); 249 return (error); 250 } 251 ucp = &uc; 252 if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) { 253 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid, 254 td->td_name, ucp->uc_mcontext.mc_flags); 255 return (EINVAL); 256 } 257 regs = td->td_frame; 258 rflags = ucp->uc_mcontext.mc_rflags; 259 /* 260 * Don't allow users to change privileged or reserved flags. 261 */ 262 if (!EFL_SECURE(rflags, regs->tf_rflags)) { 263 uprintf("pid %d (%s): sigreturn rflags = 0x%lx\n", p->p_pid, 264 td->td_name, rflags); 265 return (EINVAL); 266 } 267 268 /* 269 * Don't allow users to load a valid privileged %cs. Let the 270 * hardware check for invalid selectors, excess privilege in 271 * other selectors, invalid %eip's and invalid %esp's. 272 */ 273 cs = ucp->uc_mcontext.mc_cs; 274 if (!CS_SECURE(cs)) { 275 uprintf("pid %d (%s): sigreturn cs = 0x%x\n", p->p_pid, 276 td->td_name, cs); 277 ksiginfo_init_trap(&ksi); 278 ksi.ksi_signo = SIGBUS; 279 ksi.ksi_code = BUS_OBJERR; 280 ksi.ksi_trapno = T_PROTFLT; 281 ksi.ksi_addr = (void *)regs->tf_rip; 282 trapsignal(td, &ksi); 283 return (EINVAL); 284 } 285 286 if ((uc.uc_mcontext.mc_flags & _MC_HASFPXSTATE) != 0) { 287 xfpustate_len = uc.uc_mcontext.mc_xfpustate_len; 288 if (xfpustate_len > cpu_max_ext_state_size - 289 sizeof(struct savefpu)) { 290 uprintf("pid %d (%s): sigreturn xfpusave_len = 0x%zx\n", 291 p->p_pid, td->td_name, xfpustate_len); 292 return (EINVAL); 293 } 294 xfpustate = (char *)fpu_save_area_alloc(); 295 error = copyin((const void *)uc.uc_mcontext.mc_xfpustate, 296 xfpustate, xfpustate_len); 297 if (error != 0) { 298 fpu_save_area_free((struct savefpu *)xfpustate); 299 uprintf( 300 "pid %d (%s): sigreturn copying xfpustate failed\n", 301 p->p_pid, td->td_name); 302 return (error); 303 } 304 } else { 305 xfpustate = NULL; 306 xfpustate_len = 0; 307 } 308 ret = set_fpcontext(td, &ucp->uc_mcontext, xfpustate, xfpustate_len); 309 fpu_save_area_free((struct savefpu *)xfpustate); 310 if (ret != 0) { 311 uprintf("pid %d (%s): sigreturn set_fpcontext err %d\n", 312 p->p_pid, td->td_name, ret); 313 return (ret); 314 } 315 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs)); 316 update_pcb_bases(pcb); 317 pcb->pcb_fsbase = ucp->uc_mcontext.mc_fsbase; 318 pcb->pcb_gsbase = ucp->uc_mcontext.mc_gsbase; 319 320 #if defined(COMPAT_43) 321 if (ucp->uc_mcontext.mc_onstack & 1) 322 td->td_sigstk.ss_flags |= SS_ONSTACK; 323 else 324 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 325 #endif 326 327 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0); 328 return (EJUSTRETURN); 329 } 330 331 #ifdef COMPAT_FREEBSD4 332 int 333 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 334 { 335 336 return sys_sigreturn(td, (struct sigreturn_args *)uap); 337 } 338 #endif 339 340 /* 341 * Reset the hardware debug registers if they were in use. 342 * They won't have any meaning for the newly exec'd process. 343 */ 344 void 345 x86_clear_dbregs(struct pcb *pcb) 346 { 347 if ((pcb->pcb_flags & PCB_DBREGS) == 0) 348 return; 349 350 pcb->pcb_dr0 = 0; 351 pcb->pcb_dr1 = 0; 352 pcb->pcb_dr2 = 0; 353 pcb->pcb_dr3 = 0; 354 pcb->pcb_dr6 = 0; 355 pcb->pcb_dr7 = 0; 356 357 if (pcb == curpcb) { 358 /* 359 * Clear the debug registers on the running CPU, 360 * otherwise they will end up affecting the next 361 * process we switch to. 362 */ 363 reset_dbregs(); 364 } 365 clear_pcb_flags(pcb, PCB_DBREGS); 366 } 367 368 /* 369 * Reset registers to default values on exec. 370 */ 371 void 372 exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack) 373 { 374 struct trapframe *regs; 375 struct pcb *pcb; 376 register_t saved_rflags; 377 378 regs = td->td_frame; 379 pcb = td->td_pcb; 380 381 if (td->td_proc->p_md.md_ldt != NULL) 382 user_ldt_free(td); 383 384 update_pcb_bases(pcb); 385 pcb->pcb_fsbase = 0; 386 pcb->pcb_gsbase = 0; 387 clear_pcb_flags(pcb, PCB_32BIT); 388 pcb->pcb_initial_fpucw = __INITIAL_FPUCW__; 389 390 saved_rflags = regs->tf_rflags & PSL_T; 391 bzero((char *)regs, sizeof(struct trapframe)); 392 regs->tf_rip = imgp->entry_addr; 393 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; 394 regs->tf_rdi = stack; /* argv */ 395 regs->tf_rflags = PSL_USER | saved_rflags; 396 regs->tf_ss = _udatasel; 397 regs->tf_cs = _ucodesel; 398 regs->tf_ds = _udatasel; 399 regs->tf_es = _udatasel; 400 regs->tf_fs = _ufssel; 401 regs->tf_gs = _ugssel; 402 regs->tf_flags = TF_HASSEGS; 403 404 x86_clear_dbregs(pcb); 405 406 /* 407 * Drop the FP state if we hold it, so that the process gets a 408 * clean FP state if it uses the FPU again. 409 */ 410 fpstate_drop(td); 411 } 412 413 int 414 fill_regs(struct thread *td, struct reg *regs) 415 { 416 struct trapframe *tp; 417 418 tp = td->td_frame; 419 return (fill_frame_regs(tp, regs)); 420 } 421 422 int 423 fill_frame_regs(struct trapframe *tp, struct reg *regs) 424 { 425 426 regs->r_r15 = tp->tf_r15; 427 regs->r_r14 = tp->tf_r14; 428 regs->r_r13 = tp->tf_r13; 429 regs->r_r12 = tp->tf_r12; 430 regs->r_r11 = tp->tf_r11; 431 regs->r_r10 = tp->tf_r10; 432 regs->r_r9 = tp->tf_r9; 433 regs->r_r8 = tp->tf_r8; 434 regs->r_rdi = tp->tf_rdi; 435 regs->r_rsi = tp->tf_rsi; 436 regs->r_rbp = tp->tf_rbp; 437 regs->r_rbx = tp->tf_rbx; 438 regs->r_rdx = tp->tf_rdx; 439 regs->r_rcx = tp->tf_rcx; 440 regs->r_rax = tp->tf_rax; 441 regs->r_rip = tp->tf_rip; 442 regs->r_cs = tp->tf_cs; 443 regs->r_rflags = tp->tf_rflags; 444 regs->r_rsp = tp->tf_rsp; 445 regs->r_ss = tp->tf_ss; 446 if (tp->tf_flags & TF_HASSEGS) { 447 regs->r_ds = tp->tf_ds; 448 regs->r_es = tp->tf_es; 449 regs->r_fs = tp->tf_fs; 450 regs->r_gs = tp->tf_gs; 451 } else { 452 regs->r_ds = 0; 453 regs->r_es = 0; 454 regs->r_fs = 0; 455 regs->r_gs = 0; 456 } 457 regs->r_err = 0; 458 regs->r_trapno = 0; 459 return (0); 460 } 461 462 int 463 set_regs(struct thread *td, struct reg *regs) 464 { 465 struct trapframe *tp; 466 register_t rflags; 467 468 tp = td->td_frame; 469 rflags = regs->r_rflags & 0xffffffff; 470 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs)) 471 return (EINVAL); 472 tp->tf_r15 = regs->r_r15; 473 tp->tf_r14 = regs->r_r14; 474 tp->tf_r13 = regs->r_r13; 475 tp->tf_r12 = regs->r_r12; 476 tp->tf_r11 = regs->r_r11; 477 tp->tf_r10 = regs->r_r10; 478 tp->tf_r9 = regs->r_r9; 479 tp->tf_r8 = regs->r_r8; 480 tp->tf_rdi = regs->r_rdi; 481 tp->tf_rsi = regs->r_rsi; 482 tp->tf_rbp = regs->r_rbp; 483 tp->tf_rbx = regs->r_rbx; 484 tp->tf_rdx = regs->r_rdx; 485 tp->tf_rcx = regs->r_rcx; 486 tp->tf_rax = regs->r_rax; 487 tp->tf_rip = regs->r_rip; 488 tp->tf_cs = regs->r_cs; 489 tp->tf_rflags = rflags; 490 tp->tf_rsp = regs->r_rsp; 491 tp->tf_ss = regs->r_ss; 492 if (0) { /* XXXKIB */ 493 tp->tf_ds = regs->r_ds; 494 tp->tf_es = regs->r_es; 495 tp->tf_fs = regs->r_fs; 496 tp->tf_gs = regs->r_gs; 497 tp->tf_flags = TF_HASSEGS; 498 } 499 set_pcb_flags(td->td_pcb, PCB_FULL_IRET); 500 return (0); 501 } 502 503 /* XXX check all this stuff! */ 504 /* externalize from sv_xmm */ 505 static void 506 fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs) 507 { 508 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 509 struct envxmm *penv_xmm = &sv_xmm->sv_env; 510 int i; 511 512 /* pcb -> fpregs */ 513 bzero(fpregs, sizeof(*fpregs)); 514 515 /* FPU control/status */ 516 penv_fpreg->en_cw = penv_xmm->en_cw; 517 penv_fpreg->en_sw = penv_xmm->en_sw; 518 penv_fpreg->en_tw = penv_xmm->en_tw; 519 penv_fpreg->en_opcode = penv_xmm->en_opcode; 520 penv_fpreg->en_rip = penv_xmm->en_rip; 521 penv_fpreg->en_rdp = penv_xmm->en_rdp; 522 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr; 523 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask; 524 525 /* FPU registers */ 526 for (i = 0; i < 8; ++i) 527 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10); 528 529 /* SSE registers */ 530 for (i = 0; i < 16; ++i) 531 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16); 532 } 533 534 /* internalize from fpregs into sv_xmm */ 535 static void 536 set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm) 537 { 538 struct envxmm *penv_xmm = &sv_xmm->sv_env; 539 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 540 int i; 541 542 /* fpregs -> pcb */ 543 /* FPU control/status */ 544 penv_xmm->en_cw = penv_fpreg->en_cw; 545 penv_xmm->en_sw = penv_fpreg->en_sw; 546 penv_xmm->en_tw = penv_fpreg->en_tw; 547 penv_xmm->en_opcode = penv_fpreg->en_opcode; 548 penv_xmm->en_rip = penv_fpreg->en_rip; 549 penv_xmm->en_rdp = penv_fpreg->en_rdp; 550 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr; 551 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask; 552 553 /* FPU registers */ 554 for (i = 0; i < 8; ++i) 555 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10); 556 557 /* SSE registers */ 558 for (i = 0; i < 16; ++i) 559 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16); 560 } 561 562 /* externalize from td->pcb */ 563 int 564 fill_fpregs(struct thread *td, struct fpreg *fpregs) 565 { 566 567 KASSERT(td == curthread || TD_IS_SUSPENDED(td) || 568 P_SHOULDSTOP(td->td_proc), 569 ("not suspended thread %p", td)); 570 fpugetregs(td); 571 fill_fpregs_xmm(get_pcb_user_save_td(td), fpregs); 572 return (0); 573 } 574 575 /* internalize to td->pcb */ 576 int 577 set_fpregs(struct thread *td, struct fpreg *fpregs) 578 { 579 580 critical_enter(); 581 set_fpregs_xmm(fpregs, get_pcb_user_save_td(td)); 582 fpuuserinited(td); 583 critical_exit(); 584 return (0); 585 } 586 587 /* 588 * Get machine context. 589 */ 590 int 591 get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 592 { 593 struct pcb *pcb; 594 struct trapframe *tp; 595 596 pcb = td->td_pcb; 597 tp = td->td_frame; 598 PROC_LOCK(curthread->td_proc); 599 mcp->mc_onstack = sigonstack(tp->tf_rsp); 600 PROC_UNLOCK(curthread->td_proc); 601 mcp->mc_r15 = tp->tf_r15; 602 mcp->mc_r14 = tp->tf_r14; 603 mcp->mc_r13 = tp->tf_r13; 604 mcp->mc_r12 = tp->tf_r12; 605 mcp->mc_r11 = tp->tf_r11; 606 mcp->mc_r10 = tp->tf_r10; 607 mcp->mc_r9 = tp->tf_r9; 608 mcp->mc_r8 = tp->tf_r8; 609 mcp->mc_rdi = tp->tf_rdi; 610 mcp->mc_rsi = tp->tf_rsi; 611 mcp->mc_rbp = tp->tf_rbp; 612 mcp->mc_rbx = tp->tf_rbx; 613 mcp->mc_rcx = tp->tf_rcx; 614 mcp->mc_rflags = tp->tf_rflags; 615 if (flags & GET_MC_CLEAR_RET) { 616 mcp->mc_rax = 0; 617 mcp->mc_rdx = 0; 618 mcp->mc_rflags &= ~PSL_C; 619 } else { 620 mcp->mc_rax = tp->tf_rax; 621 mcp->mc_rdx = tp->tf_rdx; 622 } 623 mcp->mc_rip = tp->tf_rip; 624 mcp->mc_cs = tp->tf_cs; 625 mcp->mc_rsp = tp->tf_rsp; 626 mcp->mc_ss = tp->tf_ss; 627 mcp->mc_ds = tp->tf_ds; 628 mcp->mc_es = tp->tf_es; 629 mcp->mc_fs = tp->tf_fs; 630 mcp->mc_gs = tp->tf_gs; 631 mcp->mc_flags = tp->tf_flags; 632 mcp->mc_len = sizeof(*mcp); 633 get_fpcontext(td, mcp, NULL, NULL); 634 update_pcb_bases(pcb); 635 mcp->mc_fsbase = pcb->pcb_fsbase; 636 mcp->mc_gsbase = pcb->pcb_gsbase; 637 mcp->mc_xfpustate = 0; 638 mcp->mc_xfpustate_len = 0; 639 bzero(mcp->mc_spare, sizeof(mcp->mc_spare)); 640 return (0); 641 } 642 643 /* 644 * Set machine context. 645 * 646 * However, we don't set any but the user modifiable flags, and we won't 647 * touch the cs selector. 648 */ 649 int 650 set_mcontext(struct thread *td, mcontext_t *mcp) 651 { 652 struct pcb *pcb; 653 struct trapframe *tp; 654 char *xfpustate; 655 long rflags; 656 int ret; 657 658 pcb = td->td_pcb; 659 tp = td->td_frame; 660 if (mcp->mc_len != sizeof(*mcp) || 661 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0) 662 return (EINVAL); 663 rflags = (mcp->mc_rflags & PSL_USERCHANGE) | 664 (tp->tf_rflags & ~PSL_USERCHANGE); 665 if (mcp->mc_flags & _MC_HASFPXSTATE) { 666 if (mcp->mc_xfpustate_len > cpu_max_ext_state_size - 667 sizeof(struct savefpu)) 668 return (EINVAL); 669 xfpustate = (char *)fpu_save_area_alloc(); 670 ret = copyin((void *)mcp->mc_xfpustate, xfpustate, 671 mcp->mc_xfpustate_len); 672 if (ret != 0) { 673 fpu_save_area_free((struct savefpu *)xfpustate); 674 return (ret); 675 } 676 } else 677 xfpustate = NULL; 678 ret = set_fpcontext(td, mcp, xfpustate, mcp->mc_xfpustate_len); 679 fpu_save_area_free((struct savefpu *)xfpustate); 680 if (ret != 0) 681 return (ret); 682 tp->tf_r15 = mcp->mc_r15; 683 tp->tf_r14 = mcp->mc_r14; 684 tp->tf_r13 = mcp->mc_r13; 685 tp->tf_r12 = mcp->mc_r12; 686 tp->tf_r11 = mcp->mc_r11; 687 tp->tf_r10 = mcp->mc_r10; 688 tp->tf_r9 = mcp->mc_r9; 689 tp->tf_r8 = mcp->mc_r8; 690 tp->tf_rdi = mcp->mc_rdi; 691 tp->tf_rsi = mcp->mc_rsi; 692 tp->tf_rbp = mcp->mc_rbp; 693 tp->tf_rbx = mcp->mc_rbx; 694 tp->tf_rdx = mcp->mc_rdx; 695 tp->tf_rcx = mcp->mc_rcx; 696 tp->tf_rax = mcp->mc_rax; 697 tp->tf_rip = mcp->mc_rip; 698 tp->tf_rflags = rflags; 699 tp->tf_rsp = mcp->mc_rsp; 700 tp->tf_ss = mcp->mc_ss; 701 tp->tf_flags = mcp->mc_flags; 702 if (tp->tf_flags & TF_HASSEGS) { 703 tp->tf_ds = mcp->mc_ds; 704 tp->tf_es = mcp->mc_es; 705 tp->tf_fs = mcp->mc_fs; 706 tp->tf_gs = mcp->mc_gs; 707 } 708 set_pcb_flags(pcb, PCB_FULL_IRET); 709 if (mcp->mc_flags & _MC_HASBASES) { 710 pcb->pcb_fsbase = mcp->mc_fsbase; 711 pcb->pcb_gsbase = mcp->mc_gsbase; 712 } 713 return (0); 714 } 715 716 void 717 get_fpcontext(struct thread *td, mcontext_t *mcp, char **xfpusave, 718 size_t *xfpusave_len) 719 { 720 mcp->mc_ownedfp = fpugetregs(td); 721 bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate[0], 722 sizeof(mcp->mc_fpstate)); 723 mcp->mc_fpformat = fpuformat(); 724 if (xfpusave == NULL) 725 return; 726 if (!use_xsave || cpu_max_ext_state_size <= sizeof(struct savefpu)) { 727 *xfpusave_len = 0; 728 *xfpusave = NULL; 729 } else { 730 mcp->mc_flags |= _MC_HASFPXSTATE; 731 *xfpusave_len = mcp->mc_xfpustate_len = 732 cpu_max_ext_state_size - sizeof(struct savefpu); 733 *xfpusave = (char *)(get_pcb_user_save_td(td) + 1); 734 } 735 } 736 737 int 738 set_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpustate, 739 size_t xfpustate_len) 740 { 741 int error; 742 743 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 744 return (0); 745 else if (mcp->mc_fpformat != _MC_FPFMT_XMM) 746 return (EINVAL); 747 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) { 748 /* We don't care what state is left in the FPU or PCB. */ 749 fpstate_drop(td); 750 error = 0; 751 } else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 752 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 753 error = fpusetregs(td, (struct savefpu *)&mcp->mc_fpstate, 754 xfpustate, xfpustate_len); 755 } else 756 return (EINVAL); 757 return (error); 758 } 759 760 void 761 fpstate_drop(struct thread *td) 762 { 763 764 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu")); 765 critical_enter(); 766 if (PCPU_GET(fpcurthread) == td) 767 fpudrop(); 768 /* 769 * XXX force a full drop of the fpu. The above only drops it if we 770 * owned it. 771 * 772 * XXX I don't much like fpugetuserregs()'s semantics of doing a full 773 * drop. Dropping only to the pcb matches fnsave's behaviour. 774 * We only need to drop to !PCB_INITDONE in sendsig(). But 775 * sendsig() is the only caller of fpugetuserregs()... perhaps we just 776 * have too many layers. 777 */ 778 clear_pcb_flags(curthread->td_pcb, 779 PCB_FPUINITDONE | PCB_USERFPUINITDONE); 780 critical_exit(); 781 } 782 783 int 784 fill_dbregs(struct thread *td, struct dbreg *dbregs) 785 { 786 struct pcb *pcb; 787 788 if (td == NULL) { 789 dbregs->dr[0] = rdr0(); 790 dbregs->dr[1] = rdr1(); 791 dbregs->dr[2] = rdr2(); 792 dbregs->dr[3] = rdr3(); 793 dbregs->dr[6] = rdr6(); 794 dbregs->dr[7] = rdr7(); 795 } else { 796 pcb = td->td_pcb; 797 dbregs->dr[0] = pcb->pcb_dr0; 798 dbregs->dr[1] = pcb->pcb_dr1; 799 dbregs->dr[2] = pcb->pcb_dr2; 800 dbregs->dr[3] = pcb->pcb_dr3; 801 dbregs->dr[6] = pcb->pcb_dr6; 802 dbregs->dr[7] = pcb->pcb_dr7; 803 } 804 dbregs->dr[4] = 0; 805 dbregs->dr[5] = 0; 806 dbregs->dr[8] = 0; 807 dbregs->dr[9] = 0; 808 dbregs->dr[10] = 0; 809 dbregs->dr[11] = 0; 810 dbregs->dr[12] = 0; 811 dbregs->dr[13] = 0; 812 dbregs->dr[14] = 0; 813 dbregs->dr[15] = 0; 814 return (0); 815 } 816 817 int 818 set_dbregs(struct thread *td, struct dbreg *dbregs) 819 { 820 struct pcb *pcb; 821 int i; 822 823 if (td == NULL) { 824 load_dr0(dbregs->dr[0]); 825 load_dr1(dbregs->dr[1]); 826 load_dr2(dbregs->dr[2]); 827 load_dr3(dbregs->dr[3]); 828 load_dr6(dbregs->dr[6]); 829 load_dr7(dbregs->dr[7]); 830 } else { 831 /* 832 * Don't let an illegal value for dr7 get set. Specifically, 833 * check for undefined settings. Setting these bit patterns 834 * result in undefined behaviour and can lead to an unexpected 835 * TRCTRAP or a general protection fault right here. 836 * Upper bits of dr6 and dr7 must not be set 837 */ 838 for (i = 0; i < 4; i++) { 839 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02) 840 return (EINVAL); 841 if (td->td_frame->tf_cs == _ucode32sel && 842 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8) 843 return (EINVAL); 844 } 845 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 || 846 (dbregs->dr[7] & 0xffffffff00000000ul) != 0) 847 return (EINVAL); 848 849 pcb = td->td_pcb; 850 851 /* 852 * Don't let a process set a breakpoint that is not within the 853 * process's address space. If a process could do this, it 854 * could halt the system by setting a breakpoint in the kernel 855 * (if ddb was enabled). Thus, we need to check to make sure 856 * that no breakpoints are being enabled for addresses outside 857 * process's address space. 858 * 859 * XXX - what about when the watched area of the user's 860 * address space is written into from within the kernel 861 * ... wouldn't that still cause a breakpoint to be generated 862 * from within kernel mode? 863 */ 864 865 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) { 866 /* dr0 is enabled */ 867 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 868 return (EINVAL); 869 } 870 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) { 871 /* dr1 is enabled */ 872 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 873 return (EINVAL); 874 } 875 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) { 876 /* dr2 is enabled */ 877 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 878 return (EINVAL); 879 } 880 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) { 881 /* dr3 is enabled */ 882 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 883 return (EINVAL); 884 } 885 886 pcb->pcb_dr0 = dbregs->dr[0]; 887 pcb->pcb_dr1 = dbregs->dr[1]; 888 pcb->pcb_dr2 = dbregs->dr[2]; 889 pcb->pcb_dr3 = dbregs->dr[3]; 890 pcb->pcb_dr6 = dbregs->dr[6]; 891 pcb->pcb_dr7 = dbregs->dr[7]; 892 893 set_pcb_flags(pcb, PCB_DBREGS); 894 } 895 896 return (0); 897 } 898 899 void 900 reset_dbregs(void) 901 { 902 903 load_dr7(0); /* Turn off the control bits first */ 904 load_dr0(0); 905 load_dr1(0); 906 load_dr2(0); 907 load_dr3(0); 908 load_dr6(0); 909 } 910 911 /* 912 * Return > 0 if a hardware breakpoint has been hit, and the 913 * breakpoint was in user space. Return 0, otherwise. 914 */ 915 int 916 user_dbreg_trap(register_t dr6) 917 { 918 u_int64_t dr7; 919 u_int64_t bp; /* breakpoint bits extracted from dr6 */ 920 int nbp; /* number of breakpoints that triggered */ 921 caddr_t addr[4]; /* breakpoint addresses */ 922 int i; 923 924 bp = dr6 & DBREG_DR6_BMASK; 925 if (bp == 0) { 926 /* 927 * None of the breakpoint bits are set meaning this 928 * trap was not caused by any of the debug registers 929 */ 930 return (0); 931 } 932 933 dr7 = rdr7(); 934 if ((dr7 & 0x000000ff) == 0) { 935 /* 936 * all GE and LE bits in the dr7 register are zero, 937 * thus the trap couldn't have been caused by the 938 * hardware debug registers 939 */ 940 return (0); 941 } 942 943 nbp = 0; 944 945 /* 946 * at least one of the breakpoints were hit, check to see 947 * which ones and if any of them are user space addresses 948 */ 949 950 if (bp & 0x01) { 951 addr[nbp++] = (caddr_t)rdr0(); 952 } 953 if (bp & 0x02) { 954 addr[nbp++] = (caddr_t)rdr1(); 955 } 956 if (bp & 0x04) { 957 addr[nbp++] = (caddr_t)rdr2(); 958 } 959 if (bp & 0x08) { 960 addr[nbp++] = (caddr_t)rdr3(); 961 } 962 963 for (i = 0; i < nbp; i++) { 964 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) { 965 /* 966 * addr[i] is in user space 967 */ 968 return (nbp); 969 } 970 } 971 972 /* 973 * None of the breakpoints are in user space. 974 */ 975 return (0); 976 } 977