xref: /freebsd/sys/amd64/include/db_machdep.h (revision 06c3fb27)
1 /*-
2  * Mach Operating System
3  * Copyright (c) 1991,1990 Carnegie Mellon University
4  * All Rights Reserved.
5  *
6  * Permission to use, copy, modify and distribute this software and its
7  * documentation is hereby granted, provided that both the copyright
8  * notice and this permission notice appear in all copies of the
9  * software, derivative works or modified versions, and any portions
10  * thereof, and that both notices appear in supporting documentation.
11  *
12  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
13  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
14  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
15  *
16  * Carnegie Mellon requests users of this software to return to
17  *
18  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
19  *  School of Computer Science
20  *  Carnegie Mellon University
21  *  Pittsburgh PA 15213-3890
22  *
23  * any improvements or extensions that they make and grant Carnegie Mellon
24  * the rights to redistribute these changes.
25  */
26 
27 #ifndef _MACHINE_DB_MACHDEP_H_
28 #define	_MACHINE_DB_MACHDEP_H_
29 
30 #include <machine/frame.h>
31 #include <machine/trap.h>
32 
33 typedef	vm_offset_t	db_addr_t;	/* address - unsigned */
34 typedef	long		db_expr_t;	/* expression - signed */
35 
36 #define	PC_REGS()	((db_addr_t)kdb_thrctx->pcb_rip)
37 
38 #define	BKPT_INST	0xcc		/* breakpoint instruction */
39 #define	BKPT_SIZE	(1)		/* size of breakpoint inst */
40 #define	BKPT_SET(inst)	(BKPT_INST)
41 
42 #define BKPT_SKIP				\
43 do {						\
44 	kdb_frame->tf_rip += 1;			\
45 	kdb_thrctx->pcb_rip += 1;		\
46 } while(0)
47 
48 #define	FIXUP_PC_AFTER_BREAK			\
49 do {						\
50 	kdb_frame->tf_rip -= 1;			\
51 	kdb_thrctx->pcb_rip -= 1;		\
52 } while(0);
53 
54 #define	db_clear_single_step	kdb_cpu_clear_singlestep
55 #define	db_set_single_step	kdb_cpu_set_singlestep
56 
57 /*
58  * The debug exception type is copied from %dr6 to 'code' and used to
59  * disambiguate single step traps.  Watchpoints have no special support.
60  * Our hardware breakpoints are not well integrated with ddb and are too
61  * different from watchpoints.  ddb treats them as unknown traps with
62  * unknown addresses and doesn't turn them off while it is running.
63  */
64 #define	IS_BREAKPOINT_TRAP(type, code)	((type) == T_BPTFLT)
65 #define	IS_SSTEP_TRAP(type, code)					\
66 	((type) == T_TRCTRAP && (code) & DBREG_DR6_BS)
67 #define	IS_WATCHPOINT_TRAP(type, code)	0
68 
69 #define	I_CALL		0xe8
70 #define	I_CALLI		0xff
71 #define	i_calli(ins)	(((ins)&0xff) == I_CALLI && ((ins)&0x3800) == 0x1000)
72 #define	I_RET		0xc3
73 #define	I_IRET		0xcf
74 #define	i_rex(ins)	(((ins) & 0xff) == 0x41 || ((ins) & 0xff) == 0x43)
75 
76 #define	inst_trap_return(ins)	(((ins)&0xff) == I_IRET)
77 #define	inst_return(ins)	(((ins)&0xff) == I_RET)
78 #define	inst_call(ins)		(((ins)&0xff) == I_CALL || i_calli(ins) || \
79 				 (i_calli((ins) >> 8) && i_rex(ins)))
80 #define inst_load(ins)		0
81 #define inst_store(ins)		0
82 
83 #endif /* !_MACHINE_DB_MACHDEP_H_ */
84