xref: /freebsd/sys/amd64/include/pmc_mdep.h (revision b00ab754)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2003-2008 Joseph Koshy
5  * Copyright (c) 2007 The FreeBSD Foundation
6  * All rights reserved.
7  *
8  * Portions of this software were developed by A. Joseph Koshy under
9  * sponsorship from the FreeBSD Foundation and Google, Inc.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30  * SUCH DAMAGE.
31  *
32  * $FreeBSD$
33  */
34 
35 /* Machine dependent interfaces */
36 
37 #ifndef _MACHINE_PMC_MDEP_H
38 #define	_MACHINE_PMC_MDEP_H 1
39 
40 #ifdef	_KERNEL
41 struct pmc_mdep;
42 #endif
43 
44 #include <dev/hwpmc/hwpmc_amd.h>
45 #include <dev/hwpmc/hwpmc_core.h>
46 #include <dev/hwpmc/hwpmc_piv.h>
47 #include <dev/hwpmc/hwpmc_tsc.h>
48 #include <dev/hwpmc/hwpmc_uncore.h>
49 
50 /*
51  * Intel processors implementing V2 and later of the Intel performance
52  * measurement architecture have PMCs of the following classes: TSC,
53  * IAF, IAP, UCF and UCP.
54  */
55 #define	PMC_MDEP_CLASS_INDEX_TSC	1
56 #define	PMC_MDEP_CLASS_INDEX_K8		2
57 #define	PMC_MDEP_CLASS_INDEX_P4		2
58 #define	PMC_MDEP_CLASS_INDEX_IAP	2
59 #define	PMC_MDEP_CLASS_INDEX_IAF	3
60 #define	PMC_MDEP_CLASS_INDEX_UCP	4
61 #define	PMC_MDEP_CLASS_INDEX_UCF	5
62 
63 /*
64  * On the amd64 platform we support the following PMCs.
65  *
66  * TSC		The timestamp counter
67  * K8		AMD Athlon64 and Opteron PMCs in 64 bit mode.
68  * PIV		Intel P4/HTT and P4/EMT64
69  * IAP		Intel Core/Core2/Atom CPUs in 64 bits mode.
70  * IAF		Intel fixed-function PMCs in Core2 and later CPUs.
71  * UCP		Intel Uncore programmable PMCs.
72  * UCF		Intel Uncore fixed-function PMCs.
73  */
74 
75 union pmc_md_op_pmcallocate  {
76 	struct pmc_md_amd_op_pmcallocate	pm_amd;
77 	struct pmc_md_iaf_op_pmcallocate	pm_iaf;
78 	struct pmc_md_iap_op_pmcallocate	pm_iap;
79 	struct pmc_md_ucf_op_pmcallocate	pm_ucf;
80 	struct pmc_md_ucp_op_pmcallocate	pm_ucp;
81 	struct pmc_md_p4_op_pmcallocate		pm_p4;
82 	uint64_t				__pad[4];
83 };
84 
85 /* Logging */
86 #define	PMCLOG_READADDR		PMCLOG_READ64
87 #define	PMCLOG_EMITADDR		PMCLOG_EMIT64
88 
89 #ifdef	_KERNEL
90 
91 union pmc_md_pmc {
92 	struct pmc_md_amd_pmc	pm_amd;
93 	struct pmc_md_iaf_pmc	pm_iaf;
94 	struct pmc_md_iap_pmc	pm_iap;
95 	struct pmc_md_ucf_pmc	pm_ucf;
96 	struct pmc_md_ucp_pmc	pm_ucp;
97 	struct pmc_md_p4_pmc	pm_p4;
98 };
99 
100 #define	PMC_TRAPFRAME_TO_PC(TF)	((TF)->tf_rip)
101 #define	PMC_TRAPFRAME_TO_FP(TF)	((TF)->tf_rbp)
102 #define	PMC_TRAPFRAME_TO_USER_SP(TF)	((TF)->tf_rsp)
103 #define	PMC_TRAPFRAME_TO_KERNEL_SP(TF)	((TF)->tf_rsp)
104 
105 #define	PMC_AT_FUNCTION_PROLOGUE_PUSH_BP(I)		\
106 	(((I) & 0xffffffff) == 0xe5894855) /* pushq %rbp; movq %rsp,%rbp */
107 #define	PMC_AT_FUNCTION_PROLOGUE_MOV_SP_BP(I)		\
108 	(((I) & 0x00ffffff) == 0x00e58948) /* movq %rsp,%rbp */
109 #define	PMC_AT_FUNCTION_EPILOGUE_RET(I)			\
110 	(((I) & 0xFF) == 0xC3)		   /* ret */
111 
112 #define	PMC_IN_TRAP_HANDLER(PC) 			\
113 	((PC) >= (uintptr_t) start_exceptions &&	\
114 	 (PC) < (uintptr_t) end_exceptions)
115 
116 #define	PMC_IN_KERNEL_STACK(S,START,END)		\
117 	((S) >= (START) && (S) < (END))
118 #define	PMC_IN_KERNEL(va) INKERNEL(va)
119 
120 #define	PMC_IN_USERSPACE(va) ((va) <= VM_MAXUSER_ADDRESS)
121 
122 /* Build a fake kernel trapframe from current instruction pointer. */
123 #define PMC_FAKE_TRAPFRAME(TF)						\
124 	do {								\
125 	(TF)->tf_cs = 0; (TF)->tf_rflags = 0;				\
126 	__asm __volatile("movq %%rbp,%0" : "=r" ((TF)->tf_rbp));	\
127 	__asm __volatile("movq %%rsp,%0" : "=r" ((TF)->tf_rsp));	\
128 	__asm __volatile("call 1f \n\t1: pop %0" : "=r"((TF)->tf_rip));	\
129 	} while (0)
130 
131 /*
132  * Prototypes
133  */
134 
135 void	start_exceptions(void), end_exceptions(void);
136 
137 struct pmc_mdep *pmc_amd_initialize(void);
138 void	pmc_amd_finalize(struct pmc_mdep *_md);
139 struct pmc_mdep *pmc_intel_initialize(void);
140 void	pmc_intel_finalize(struct pmc_mdep *_md);
141 
142 #endif /* _KERNEL */
143 #endif /* _MACHINE_PMC_MDEP_H */
144