xref: /freebsd/sys/amd64/vmm/intel/vmcs.h (revision 4e8d558c)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2011 NetApp, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  * $FreeBSD$
29  */
30 
31 #ifndef _VMCS_H_
32 #define	_VMCS_H_
33 
34 #ifdef _KERNEL
35 
36 struct vm_snapshot_meta;
37 
38 struct vmcs {
39 	uint32_t	identifier;
40 	uint32_t	abort_code;
41 	char		_impl_specific[PAGE_SIZE - sizeof(uint32_t) * 2];
42 };
43 CTASSERT(sizeof(struct vmcs) == PAGE_SIZE);
44 
45 /* MSR save region is composed of an array of 'struct msr_entry' */
46 struct msr_entry {
47 	uint32_t	index;
48 	uint32_t	reserved;
49 	uint64_t	val;
50 
51 };
52 
53 int vmcs_set_msr_save(struct vmcs *vmcs, u_long g_area, u_int g_count);
54 int	vmcs_init(struct vmcs *vmcs);
55 int	vmcs_getreg(struct vmcs *vmcs, int running, int ident, uint64_t *rv);
56 int	vmcs_setreg(struct vmcs *vmcs, int running, int ident, uint64_t val);
57 int	vmcs_getdesc(struct vmcs *vmcs, int running, int ident,
58 		     struct seg_desc *desc);
59 int	vmcs_setdesc(struct vmcs *vmcs, int running, int ident,
60 		     struct seg_desc *desc);
61 #ifdef BHYVE_SNAPSHOT
62 int	vmcs_getany(struct vmcs *vmcs, int running, int ident, uint64_t *val);
63 int	vmcs_setany(struct vmcs *vmcs, int running, int ident, uint64_t val);
64 int	vmcs_snapshot_reg(struct vmcs *vmcs, int running, int ident,
65 			  struct vm_snapshot_meta *meta);
66 int	vmcs_snapshot_desc(struct vmcs *vmcs, int running, int seg,
67 			   struct vm_snapshot_meta *meta);
68 int	vmcs_snapshot_any(struct vmcs *vmcs, int running, int ident,
69 			  struct vm_snapshot_meta *meta);
70 #endif
71 
72 /*
73  * Avoid header pollution caused by inline use of 'vtophys()' in vmx_cpufunc.h
74  */
75 #ifdef _VMX_CPUFUNC_H_
76 static __inline uint64_t
77 vmcs_read(uint32_t encoding)
78 {
79 	int error __diagused;
80 	uint64_t val;
81 
82 	error = vmread(encoding, &val);
83 	KASSERT(error == 0, ("vmcs_read(%u) error %d", encoding, error));
84 	return (val);
85 }
86 
87 static __inline void
88 vmcs_write(uint32_t encoding, uint64_t val)
89 {
90 	int error __diagused;
91 
92 	error = vmwrite(encoding, val);
93 	KASSERT(error == 0, ("vmcs_write(%u) error %d", encoding, error));
94 }
95 #endif	/* _VMX_CPUFUNC_H_ */
96 
97 #define	vmexit_instruction_length()	vmcs_read(VMCS_EXIT_INSTRUCTION_LENGTH)
98 #define	vmcs_guest_rip()		vmcs_read(VMCS_GUEST_RIP)
99 #define	vmcs_instruction_error()	vmcs_read(VMCS_INSTRUCTION_ERROR)
100 #define	vmcs_exit_reason()		(vmcs_read(VMCS_EXIT_REASON) & 0xffff)
101 #define	vmcs_exit_qualification()	vmcs_read(VMCS_EXIT_QUALIFICATION)
102 #define	vmcs_guest_cr3()		vmcs_read(VMCS_GUEST_CR3)
103 #define	vmcs_gpa()			vmcs_read(VMCS_GUEST_PHYSICAL_ADDRESS)
104 #define	vmcs_gla()			vmcs_read(VMCS_GUEST_LINEAR_ADDRESS)
105 #define	vmcs_idt_vectoring_info()	vmcs_read(VMCS_IDT_VECTORING_INFO)
106 #define	vmcs_idt_vectoring_err()	vmcs_read(VMCS_IDT_VECTORING_ERROR)
107 
108 #endif	/* _KERNEL */
109 
110 #define	VMCS_INITIAL			0xffffffffffffffff
111 
112 #define	VMCS_IDENT(encoding)		((encoding) | 0x80000000)
113 /*
114  * VMCS field encodings from Appendix H, Intel Architecture Manual Vol3B.
115  */
116 #define	VMCS_INVALID_ENCODING		0xffffffff
117 
118 /* 16-bit control fields */
119 #define	VMCS_VPID			0x00000000
120 #define	VMCS_PIR_VECTOR			0x00000002
121 
122 /* 16-bit guest-state fields */
123 #define	VMCS_GUEST_ES_SELECTOR		0x00000800
124 #define	VMCS_GUEST_CS_SELECTOR		0x00000802
125 #define	VMCS_GUEST_SS_SELECTOR		0x00000804
126 #define	VMCS_GUEST_DS_SELECTOR		0x00000806
127 #define	VMCS_GUEST_FS_SELECTOR		0x00000808
128 #define	VMCS_GUEST_GS_SELECTOR		0x0000080A
129 #define	VMCS_GUEST_LDTR_SELECTOR	0x0000080C
130 #define	VMCS_GUEST_TR_SELECTOR		0x0000080E
131 #define	VMCS_GUEST_INTR_STATUS		0x00000810
132 
133 /* 16-bit host-state fields */
134 #define	VMCS_HOST_ES_SELECTOR		0x00000C00
135 #define	VMCS_HOST_CS_SELECTOR		0x00000C02
136 #define	VMCS_HOST_SS_SELECTOR		0x00000C04
137 #define	VMCS_HOST_DS_SELECTOR		0x00000C06
138 #define	VMCS_HOST_FS_SELECTOR		0x00000C08
139 #define	VMCS_HOST_GS_SELECTOR		0x00000C0A
140 #define	VMCS_HOST_TR_SELECTOR		0x00000C0C
141 
142 /* 64-bit control fields */
143 #define	VMCS_IO_BITMAP_A		0x00002000
144 #define	VMCS_IO_BITMAP_B		0x00002002
145 #define	VMCS_MSR_BITMAP			0x00002004
146 #define	VMCS_EXIT_MSR_STORE		0x00002006
147 #define	VMCS_EXIT_MSR_LOAD		0x00002008
148 #define	VMCS_ENTRY_MSR_LOAD		0x0000200A
149 #define	VMCS_EXECUTIVE_VMCS		0x0000200C
150 #define	VMCS_TSC_OFFSET			0x00002010
151 #define	VMCS_VIRTUAL_APIC		0x00002012
152 #define	VMCS_APIC_ACCESS		0x00002014
153 #define	VMCS_PIR_DESC			0x00002016
154 #define	VMCS_EPTP			0x0000201A
155 #define	VMCS_EOI_EXIT0			0x0000201C
156 #define	VMCS_EOI_EXIT1			0x0000201E
157 #define	VMCS_EOI_EXIT2			0x00002020
158 #define	VMCS_EOI_EXIT3			0x00002022
159 #define	VMCS_EOI_EXIT(vector)		(VMCS_EOI_EXIT0 + ((vector) / 64) * 2)
160 
161 /* 64-bit read-only fields */
162 #define	VMCS_GUEST_PHYSICAL_ADDRESS	0x00002400
163 
164 /* 64-bit guest-state fields */
165 #define	VMCS_LINK_POINTER		0x00002800
166 #define	VMCS_GUEST_IA32_DEBUGCTL	0x00002802
167 #define	VMCS_GUEST_IA32_PAT		0x00002804
168 #define	VMCS_GUEST_IA32_EFER		0x00002806
169 #define	VMCS_GUEST_IA32_PERF_GLOBAL_CTRL 0x00002808
170 #define	VMCS_GUEST_PDPTE0		0x0000280A
171 #define	VMCS_GUEST_PDPTE1		0x0000280C
172 #define	VMCS_GUEST_PDPTE2		0x0000280E
173 #define	VMCS_GUEST_PDPTE3		0x00002810
174 
175 /* 64-bit host-state fields */
176 #define	VMCS_HOST_IA32_PAT		0x00002C00
177 #define	VMCS_HOST_IA32_EFER		0x00002C02
178 #define	VMCS_HOST_IA32_PERF_GLOBAL_CTRL	0x00002C04
179 
180 /* 32-bit control fields */
181 #define	VMCS_PIN_BASED_CTLS		0x00004000
182 #define	VMCS_PRI_PROC_BASED_CTLS	0x00004002
183 #define	VMCS_EXCEPTION_BITMAP		0x00004004
184 #define	VMCS_PF_ERROR_MASK		0x00004006
185 #define	VMCS_PF_ERROR_MATCH		0x00004008
186 #define	VMCS_CR3_TARGET_COUNT		0x0000400A
187 #define	VMCS_EXIT_CTLS			0x0000400C
188 #define	VMCS_EXIT_MSR_STORE_COUNT	0x0000400E
189 #define	VMCS_EXIT_MSR_LOAD_COUNT	0x00004010
190 #define	VMCS_ENTRY_CTLS			0x00004012
191 #define	VMCS_ENTRY_MSR_LOAD_COUNT	0x00004014
192 #define	VMCS_ENTRY_INTR_INFO		0x00004016
193 #define	VMCS_ENTRY_EXCEPTION_ERROR	0x00004018
194 #define	VMCS_ENTRY_INST_LENGTH		0x0000401A
195 #define	VMCS_TPR_THRESHOLD		0x0000401C
196 #define	VMCS_SEC_PROC_BASED_CTLS	0x0000401E
197 #define	VMCS_PLE_GAP			0x00004020
198 #define	VMCS_PLE_WINDOW			0x00004022
199 
200 /* 32-bit read-only data fields */
201 #define	VMCS_INSTRUCTION_ERROR		0x00004400
202 #define	VMCS_EXIT_REASON		0x00004402
203 #define	VMCS_EXIT_INTR_INFO		0x00004404
204 #define	VMCS_EXIT_INTR_ERRCODE		0x00004406
205 #define	VMCS_IDT_VECTORING_INFO		0x00004408
206 #define	VMCS_IDT_VECTORING_ERROR	0x0000440A
207 #define	VMCS_EXIT_INSTRUCTION_LENGTH	0x0000440C
208 #define	VMCS_EXIT_INSTRUCTION_INFO	0x0000440E
209 
210 /* 32-bit guest-state fields */
211 #define	VMCS_GUEST_ES_LIMIT		0x00004800
212 #define	VMCS_GUEST_CS_LIMIT		0x00004802
213 #define	VMCS_GUEST_SS_LIMIT		0x00004804
214 #define	VMCS_GUEST_DS_LIMIT		0x00004806
215 #define	VMCS_GUEST_FS_LIMIT		0x00004808
216 #define	VMCS_GUEST_GS_LIMIT		0x0000480A
217 #define	VMCS_GUEST_LDTR_LIMIT		0x0000480C
218 #define	VMCS_GUEST_TR_LIMIT		0x0000480E
219 #define	VMCS_GUEST_GDTR_LIMIT		0x00004810
220 #define	VMCS_GUEST_IDTR_LIMIT		0x00004812
221 #define	VMCS_GUEST_ES_ACCESS_RIGHTS	0x00004814
222 #define	VMCS_GUEST_CS_ACCESS_RIGHTS	0x00004816
223 #define	VMCS_GUEST_SS_ACCESS_RIGHTS	0x00004818
224 #define	VMCS_GUEST_DS_ACCESS_RIGHTS	0x0000481A
225 #define	VMCS_GUEST_FS_ACCESS_RIGHTS	0x0000481C
226 #define	VMCS_GUEST_GS_ACCESS_RIGHTS	0x0000481E
227 #define	VMCS_GUEST_LDTR_ACCESS_RIGHTS	0x00004820
228 #define	VMCS_GUEST_TR_ACCESS_RIGHTS	0x00004822
229 #define	VMCS_GUEST_INTERRUPTIBILITY	0x00004824
230 #define	VMCS_GUEST_ACTIVITY		0x00004826
231 #define VMCS_GUEST_SMBASE		0x00004828
232 #define	VMCS_GUEST_IA32_SYSENTER_CS	0x0000482A
233 #define	VMCS_PREEMPTION_TIMER_VALUE	0x0000482E
234 
235 /* 32-bit host state fields */
236 #define	VMCS_HOST_IA32_SYSENTER_CS	0x00004C00
237 
238 /* Natural Width control fields */
239 #define	VMCS_CR0_MASK			0x00006000
240 #define	VMCS_CR4_MASK			0x00006002
241 #define	VMCS_CR0_SHADOW			0x00006004
242 #define	VMCS_CR4_SHADOW			0x00006006
243 #define	VMCS_CR3_TARGET0		0x00006008
244 #define	VMCS_CR3_TARGET1		0x0000600A
245 #define	VMCS_CR3_TARGET2		0x0000600C
246 #define	VMCS_CR3_TARGET3		0x0000600E
247 
248 /* Natural Width read-only fields */
249 #define	VMCS_EXIT_QUALIFICATION		0x00006400
250 #define	VMCS_IO_RCX			0x00006402
251 #define	VMCS_IO_RSI			0x00006404
252 #define	VMCS_IO_RDI			0x00006406
253 #define	VMCS_IO_RIP			0x00006408
254 #define	VMCS_GUEST_LINEAR_ADDRESS	0x0000640A
255 
256 /* Natural Width guest-state fields */
257 #define	VMCS_GUEST_CR0			0x00006800
258 #define	VMCS_GUEST_CR3			0x00006802
259 #define	VMCS_GUEST_CR4			0x00006804
260 #define	VMCS_GUEST_ES_BASE		0x00006806
261 #define	VMCS_GUEST_CS_BASE		0x00006808
262 #define	VMCS_GUEST_SS_BASE		0x0000680A
263 #define	VMCS_GUEST_DS_BASE		0x0000680C
264 #define	VMCS_GUEST_FS_BASE		0x0000680E
265 #define	VMCS_GUEST_GS_BASE		0x00006810
266 #define	VMCS_GUEST_LDTR_BASE		0x00006812
267 #define	VMCS_GUEST_TR_BASE		0x00006814
268 #define	VMCS_GUEST_GDTR_BASE		0x00006816
269 #define	VMCS_GUEST_IDTR_BASE		0x00006818
270 #define	VMCS_GUEST_DR7			0x0000681A
271 #define	VMCS_GUEST_RSP			0x0000681C
272 #define	VMCS_GUEST_RIP			0x0000681E
273 #define	VMCS_GUEST_RFLAGS		0x00006820
274 #define	VMCS_GUEST_PENDING_DBG_EXCEPTIONS 0x00006822
275 #define	VMCS_GUEST_IA32_SYSENTER_ESP	0x00006824
276 #define	VMCS_GUEST_IA32_SYSENTER_EIP	0x00006826
277 
278 /* Natural Width host-state fields */
279 #define	VMCS_HOST_CR0			0x00006C00
280 #define	VMCS_HOST_CR3			0x00006C02
281 #define	VMCS_HOST_CR4			0x00006C04
282 #define	VMCS_HOST_FS_BASE		0x00006C06
283 #define	VMCS_HOST_GS_BASE		0x00006C08
284 #define	VMCS_HOST_TR_BASE		0x00006C0A
285 #define	VMCS_HOST_GDTR_BASE		0x00006C0C
286 #define	VMCS_HOST_IDTR_BASE		0x00006C0E
287 #define	VMCS_HOST_IA32_SYSENTER_ESP	0x00006C10
288 #define	VMCS_HOST_IA32_SYSENTER_EIP	0x00006C12
289 #define	VMCS_HOST_RSP			0x00006C14
290 #define	VMCS_HOST_RIP			0x00006c16
291 
292 /*
293  * VM instruction error numbers
294  */
295 #define	VMRESUME_WITH_NON_LAUNCHED_VMCS	5
296 
297 /*
298  * VMCS exit reasons
299  */
300 #define EXIT_REASON_EXCEPTION		0
301 #define EXIT_REASON_EXT_INTR		1
302 #define EXIT_REASON_TRIPLE_FAULT	2
303 #define EXIT_REASON_INIT		3
304 #define EXIT_REASON_SIPI		4
305 #define EXIT_REASON_IO_SMI		5
306 #define EXIT_REASON_SMI			6
307 #define EXIT_REASON_INTR_WINDOW		7
308 #define EXIT_REASON_NMI_WINDOW		8
309 #define EXIT_REASON_TASK_SWITCH		9
310 #define EXIT_REASON_CPUID		10
311 #define EXIT_REASON_GETSEC		11
312 #define EXIT_REASON_HLT			12
313 #define EXIT_REASON_INVD		13
314 #define EXIT_REASON_INVLPG		14
315 #define EXIT_REASON_RDPMC		15
316 #define EXIT_REASON_RDTSC		16
317 #define EXIT_REASON_RSM			17
318 #define EXIT_REASON_VMCALL		18
319 #define EXIT_REASON_VMCLEAR		19
320 #define EXIT_REASON_VMLAUNCH		20
321 #define EXIT_REASON_VMPTRLD		21
322 #define EXIT_REASON_VMPTRST		22
323 #define EXIT_REASON_VMREAD		23
324 #define EXIT_REASON_VMRESUME		24
325 #define EXIT_REASON_VMWRITE		25
326 #define EXIT_REASON_VMXOFF		26
327 #define EXIT_REASON_VMXON		27
328 #define EXIT_REASON_CR_ACCESS		28
329 #define EXIT_REASON_DR_ACCESS		29
330 #define EXIT_REASON_INOUT		30
331 #define EXIT_REASON_RDMSR		31
332 #define EXIT_REASON_WRMSR		32
333 #define EXIT_REASON_INVAL_VMCS		33
334 #define EXIT_REASON_INVAL_MSR		34
335 #define EXIT_REASON_MWAIT		36
336 #define EXIT_REASON_MTF			37
337 #define EXIT_REASON_MONITOR		39
338 #define EXIT_REASON_PAUSE		40
339 #define EXIT_REASON_MCE_DURING_ENTRY	41
340 #define EXIT_REASON_TPR			43
341 #define EXIT_REASON_APIC_ACCESS		44
342 #define	EXIT_REASON_VIRTUALIZED_EOI	45
343 #define EXIT_REASON_GDTR_IDTR		46
344 #define EXIT_REASON_LDTR_TR		47
345 #define EXIT_REASON_EPT_FAULT		48
346 #define EXIT_REASON_EPT_MISCONFIG	49
347 #define EXIT_REASON_INVEPT		50
348 #define EXIT_REASON_RDTSCP		51
349 #define EXIT_REASON_VMX_PREEMPT		52
350 #define EXIT_REASON_INVVPID		53
351 #define EXIT_REASON_WBINVD		54
352 #define EXIT_REASON_XSETBV		55
353 #define	EXIT_REASON_APIC_WRITE		56
354 #define	EXIT_REASON_RDRAND		57
355 #define	EXIT_REASON_INVPCID		58
356 #define	EXIT_REASON_VMFUNC		59
357 #define	EXIT_REASON_ENCLS		60
358 #define	EXIT_REASON_RDSEED		61
359 #define	EXIT_REASON_PM_LOG_FULL		62
360 #define	EXIT_REASON_XSAVES		63
361 #define	EXIT_REASON_XRSTORS		64
362 
363 /*
364  * NMI unblocking due to IRET.
365  *
366  * Applies to VM-exits due to hardware exception or EPT fault.
367  */
368 #define	EXIT_QUAL_NMIUDTI	(1 << 12)
369 /*
370  * VMCS interrupt information fields
371  */
372 #define	VMCS_INTR_VALID		(1U << 31)
373 #define	VMCS_INTR_T_MASK	0x700		/* Interruption-info type */
374 #define	VMCS_INTR_T_HWINTR	(0 << 8)
375 #define	VMCS_INTR_T_NMI		(2 << 8)
376 #define	VMCS_INTR_T_HWEXCEPTION	(3 << 8)
377 #define	VMCS_INTR_T_SWINTR	(4 << 8)
378 #define	VMCS_INTR_T_PRIV_SWEXCEPTION (5 << 8)
379 #define	VMCS_INTR_T_SWEXCEPTION	(6 << 8)
380 #define	VMCS_INTR_DEL_ERRCODE	(1 << 11)
381 
382 /*
383  * VMCS IDT-Vectoring information fields
384  */
385 #define	VMCS_IDT_VEC_VALID		(1U << 31)
386 #define	VMCS_IDT_VEC_ERRCODE_VALID	(1 << 11)
387 
388 /*
389  * VMCS Guest interruptibility field
390  */
391 #define	VMCS_INTERRUPTIBILITY_STI_BLOCKING	(1 << 0)
392 #define	VMCS_INTERRUPTIBILITY_MOVSS_BLOCKING	(1 << 1)
393 #define	VMCS_INTERRUPTIBILITY_SMI_BLOCKING	(1 << 2)
394 #define	VMCS_INTERRUPTIBILITY_NMI_BLOCKING	(1 << 3)
395 
396 /*
397  * Exit qualification for EXIT_REASON_INVAL_VMCS
398  */
399 #define	EXIT_QUAL_NMI_WHILE_STI_BLOCKING	3
400 
401 /*
402  * Exit qualification for EPT violation
403  */
404 #define	EPT_VIOLATION_DATA_READ		(1UL << 0)
405 #define	EPT_VIOLATION_DATA_WRITE	(1UL << 1)
406 #define	EPT_VIOLATION_INST_FETCH	(1UL << 2)
407 #define	EPT_VIOLATION_GPA_READABLE	(1UL << 3)
408 #define	EPT_VIOLATION_GPA_WRITEABLE	(1UL << 4)
409 #define	EPT_VIOLATION_GPA_EXECUTABLE	(1UL << 5)
410 #define	EPT_VIOLATION_GLA_VALID		(1UL << 7)
411 #define	EPT_VIOLATION_XLAT_VALID	(1UL << 8)
412 
413 /*
414  * Exit qualification for APIC-access VM exit
415  */
416 #define	APIC_ACCESS_OFFSET(qual)	((qual) & 0xFFF)
417 #define	APIC_ACCESS_TYPE(qual)		(((qual) >> 12) & 0xF)
418 
419 /*
420  * Exit qualification for APIC-write VM exit
421  */
422 #define	APIC_WRITE_OFFSET(qual)		((qual) & 0xFFF)
423 
424 #endif
425