1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/bus.h> 37 #include <sys/kernel.h> 38 #include <sys/module.h> 39 #include <sys/malloc.h> 40 #include <sys/rman.h> 41 #include <sys/timeet.h> 42 #include <sys/timetc.h> 43 #include <sys/watchdog.h> 44 #include <machine/bus.h> 45 #include <machine/cpu.h> 46 #include <machine/frame.h> 47 #include <machine/intr.h> 48 49 #include <dev/ofw/openfirm.h> 50 #include <dev/ofw/ofw_bus.h> 51 #include <dev/ofw/ofw_bus_subr.h> 52 53 #include "a10_sramc.h" 54 55 #define SRAM_CTL1_CFG 0x04 56 #define CTL1_CFG_SRAMD_MAP_USB0 (1 << 0) 57 58 struct a10_sramc_softc { 59 struct resource *res; 60 bus_space_tag_t bst; 61 bus_space_handle_t bsh; 62 }; 63 64 static struct a10_sramc_softc *a10_sramc_sc; 65 66 #define sramc_read_4(sc, reg) \ 67 bus_space_read_4((sc)->bst, (sc)->bsh, (reg)) 68 #define sramc_write_4(sc, reg, val) \ 69 bus_space_write_4((sc)->bst, (sc)->bsh, (reg), (val)) 70 71 72 static int 73 a10_sramc_probe(device_t dev) 74 { 75 76 if (ofw_bus_is_compatible(dev, "allwinner,sun4i-a10-sram-controller")) { 77 device_set_desc(dev, "Allwinner sramc module"); 78 return (BUS_PROBE_DEFAULT); 79 } 80 81 return (ENXIO); 82 } 83 84 static int 85 a10_sramc_attach(device_t dev) 86 { 87 struct a10_sramc_softc *sc = device_get_softc(dev); 88 int rid = 0; 89 90 sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); 91 if (!sc->res) { 92 device_printf(dev, "could not allocate resource\n"); 93 return (ENXIO); 94 } 95 96 sc->bst = rman_get_bustag(sc->res); 97 sc->bsh = rman_get_bushandle(sc->res); 98 99 a10_sramc_sc = sc; 100 101 return (0); 102 } 103 104 static device_method_t a10_sramc_methods[] = { 105 DEVMETHOD(device_probe, a10_sramc_probe), 106 DEVMETHOD(device_attach, a10_sramc_attach), 107 { 0, 0 } 108 }; 109 110 static driver_t a10_sramc_driver = { 111 "a10_sramc", 112 a10_sramc_methods, 113 sizeof(struct a10_sramc_softc), 114 }; 115 116 static devclass_t a10_sramc_devclass; 117 118 EARLY_DRIVER_MODULE(a10_sramc, simplebus, a10_sramc_driver, a10_sramc_devclass, 119 0, 0, BUS_PASS_SUPPORTDEV + BUS_PASS_ORDER_FIRST); 120 121 int 122 a10_map_to_emac(void) 123 { 124 struct a10_sramc_softc *sc = a10_sramc_sc; 125 uint32_t reg_value; 126 127 if (sc == NULL) 128 return (ENXIO); 129 130 /* Map SRAM to EMAC, set bit 2 and 4. */ 131 reg_value = sramc_read_4(sc, SRAM_CTL1_CFG); 132 reg_value |= 0x5 << 2; 133 sramc_write_4(sc, SRAM_CTL1_CFG, reg_value); 134 135 return (0); 136 } 137 138 int 139 a10_map_to_otg(void) 140 { 141 struct a10_sramc_softc *sc = a10_sramc_sc; 142 uint32_t reg_value; 143 144 if (sc == NULL) 145 return (ENXIO); 146 147 /* Map SRAM to OTG */ 148 reg_value = sramc_read_4(sc, SRAM_CTL1_CFG); 149 reg_value |= CTL1_CFG_SRAMD_MAP_USB0; 150 sramc_write_4(sc, SRAM_CTL1_CFG, reg_value); 151 152 return (0); 153 } 154