1b800eb9dSEmmanuel Vadot /*-
2b800eb9dSEmmanuel Vadot * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
3b800eb9dSEmmanuel Vadot *
4b800eb9dSEmmanuel Vadot * Redistribution and use in source and binary forms, with or without
5b800eb9dSEmmanuel Vadot * modification, are permitted provided that the following conditions
6b800eb9dSEmmanuel Vadot * are met:
7b800eb9dSEmmanuel Vadot * 1. Redistributions of source code must retain the above copyright
8b800eb9dSEmmanuel Vadot * notice, this list of conditions and the following disclaimer.
9b800eb9dSEmmanuel Vadot * 2. Redistributions in binary form must reproduce the above copyright
10b800eb9dSEmmanuel Vadot * notice, this list of conditions and the following disclaimer in the
11b800eb9dSEmmanuel Vadot * documentation and/or other materials provided with the distribution.
12b800eb9dSEmmanuel Vadot *
13b800eb9dSEmmanuel Vadot * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14b800eb9dSEmmanuel Vadot * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15b800eb9dSEmmanuel Vadot * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16b800eb9dSEmmanuel Vadot * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17b800eb9dSEmmanuel Vadot * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
18b800eb9dSEmmanuel Vadot * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
19b800eb9dSEmmanuel Vadot * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
20b800eb9dSEmmanuel Vadot * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
21b800eb9dSEmmanuel Vadot * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22b800eb9dSEmmanuel Vadot * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23b800eb9dSEmmanuel Vadot * SUCH DAMAGE.
24b800eb9dSEmmanuel Vadot */
25b800eb9dSEmmanuel Vadot
26b800eb9dSEmmanuel Vadot /*
27b800eb9dSEmmanuel Vadot * Allwinner GMAC clock
28b800eb9dSEmmanuel Vadot */
29b800eb9dSEmmanuel Vadot
30b800eb9dSEmmanuel Vadot #include <sys/param.h>
31b800eb9dSEmmanuel Vadot #include <sys/systm.h>
32b800eb9dSEmmanuel Vadot #include <sys/bus.h>
33b800eb9dSEmmanuel Vadot #include <sys/rman.h>
34b800eb9dSEmmanuel Vadot #include <sys/kernel.h>
35b800eb9dSEmmanuel Vadot #include <sys/module.h>
36b800eb9dSEmmanuel Vadot #include <machine/bus.h>
37b800eb9dSEmmanuel Vadot
38b800eb9dSEmmanuel Vadot #include <dev/ofw/ofw_bus.h>
39b800eb9dSEmmanuel Vadot #include <dev/ofw/ofw_bus_subr.h>
40b800eb9dSEmmanuel Vadot #include <dev/ofw/ofw_subr.h>
41b800eb9dSEmmanuel Vadot
42be82b3a0SEmmanuel Vadot #include <dev/clk/clk_mux.h>
43be82b3a0SEmmanuel Vadot #include <dev/clk/clk_gate.h>
44b800eb9dSEmmanuel Vadot
45b800eb9dSEmmanuel Vadot #include "clkdev_if.h"
46b800eb9dSEmmanuel Vadot
47b800eb9dSEmmanuel Vadot #define GMAC_CLK_PIT (0x1 << 2)
48b800eb9dSEmmanuel Vadot #define GMAC_CLK_PIT_SHIFT 2
49b800eb9dSEmmanuel Vadot #define GMAC_CLK_PIT_MII 0
50b800eb9dSEmmanuel Vadot #define GMAC_CLK_PIT_RGMII 1
51b800eb9dSEmmanuel Vadot #define GMAC_CLK_SRC (0x3 << 0)
52b800eb9dSEmmanuel Vadot #define GMAC_CLK_SRC_SHIFT 0
53b800eb9dSEmmanuel Vadot #define GMAC_CLK_SRC_MII 0
54b800eb9dSEmmanuel Vadot #define GMAC_CLK_SRC_EXT_RGMII 1
55b800eb9dSEmmanuel Vadot #define GMAC_CLK_SRC_RGMII 2
56b800eb9dSEmmanuel Vadot
57b800eb9dSEmmanuel Vadot #define EMAC_TXC_DIV_CFG (1 << 15)
58b800eb9dSEmmanuel Vadot #define EMAC_TXC_DIV_CFG_SHIFT 15
59b800eb9dSEmmanuel Vadot #define EMAC_TXC_DIV_CFG_125MHZ 0
60b800eb9dSEmmanuel Vadot #define EMAC_TXC_DIV_CFG_25MHZ 1
61b800eb9dSEmmanuel Vadot #define EMAC_PHY_SELECT (1 << 16)
62b800eb9dSEmmanuel Vadot #define EMAC_PHY_SELECT_SHIFT 16
63b800eb9dSEmmanuel Vadot #define EMAC_PHY_SELECT_INT 0
64b800eb9dSEmmanuel Vadot #define EMAC_PHY_SELECT_EXT 1
65b800eb9dSEmmanuel Vadot #define EMAC_ETXDC (0x7 << 10)
66b800eb9dSEmmanuel Vadot #define EMAC_ETXDC_SHIFT 10
67b800eb9dSEmmanuel Vadot #define EMAC_ERXDC (0x1f << 5)
68b800eb9dSEmmanuel Vadot #define EMAC_ERXDC_SHIFT 5
69b800eb9dSEmmanuel Vadot
70b800eb9dSEmmanuel Vadot #define CLK_IDX_MII 0
71b800eb9dSEmmanuel Vadot #define CLK_IDX_RGMII 1
72b800eb9dSEmmanuel Vadot #define CLK_IDX_COUNT 2
73b800eb9dSEmmanuel Vadot
74b800eb9dSEmmanuel Vadot static struct ofw_compat_data compat_data[] = {
75b800eb9dSEmmanuel Vadot { "allwinner,sun7i-a20-gmac-clk", 1 },
76b800eb9dSEmmanuel Vadot { NULL, 0 }
77b800eb9dSEmmanuel Vadot };
78b800eb9dSEmmanuel Vadot
79b800eb9dSEmmanuel Vadot struct aw_gmacclk_sc {
80b800eb9dSEmmanuel Vadot device_t clkdev;
81b800eb9dSEmmanuel Vadot bus_addr_t reg;
82b800eb9dSEmmanuel Vadot
83b800eb9dSEmmanuel Vadot int rx_delay;
84b800eb9dSEmmanuel Vadot int tx_delay;
85b800eb9dSEmmanuel Vadot };
86b800eb9dSEmmanuel Vadot
87b800eb9dSEmmanuel Vadot #define GMACCLK_READ(sc, val) CLKDEV_READ_4((sc)->clkdev, (sc)->reg, (val))
88b800eb9dSEmmanuel Vadot #define GMACCLK_WRITE(sc, val) CLKDEV_WRITE_4((sc)->clkdev, (sc)->reg, (val))
89b800eb9dSEmmanuel Vadot #define DEVICE_LOCK(sc) CLKDEV_DEVICE_LOCK((sc)->clkdev)
90b800eb9dSEmmanuel Vadot #define DEVICE_UNLOCK(sc) CLKDEV_DEVICE_UNLOCK((sc)->clkdev)
91b800eb9dSEmmanuel Vadot
92b800eb9dSEmmanuel Vadot static int
aw_gmacclk_init(struct clknode * clk,device_t dev)93b800eb9dSEmmanuel Vadot aw_gmacclk_init(struct clknode *clk, device_t dev)
94b800eb9dSEmmanuel Vadot {
95b800eb9dSEmmanuel Vadot struct aw_gmacclk_sc *sc;
96b800eb9dSEmmanuel Vadot uint32_t val, index;
97b800eb9dSEmmanuel Vadot
98b800eb9dSEmmanuel Vadot sc = clknode_get_softc(clk);
99b800eb9dSEmmanuel Vadot
100b800eb9dSEmmanuel Vadot DEVICE_LOCK(sc);
101b800eb9dSEmmanuel Vadot GMACCLK_READ(sc, &val);
102b800eb9dSEmmanuel Vadot DEVICE_UNLOCK(sc);
103b800eb9dSEmmanuel Vadot
104b800eb9dSEmmanuel Vadot switch ((val & GMAC_CLK_SRC) >> GMAC_CLK_SRC_SHIFT) {
105b800eb9dSEmmanuel Vadot case GMAC_CLK_SRC_MII:
106b800eb9dSEmmanuel Vadot index = CLK_IDX_MII;
107b800eb9dSEmmanuel Vadot break;
108b800eb9dSEmmanuel Vadot case GMAC_CLK_SRC_RGMII:
109b800eb9dSEmmanuel Vadot index = CLK_IDX_RGMII;
110b800eb9dSEmmanuel Vadot break;
111b800eb9dSEmmanuel Vadot default:
112b800eb9dSEmmanuel Vadot return (ENXIO);
113b800eb9dSEmmanuel Vadot }
114b800eb9dSEmmanuel Vadot
115b800eb9dSEmmanuel Vadot clknode_init_parent_idx(clk, index);
116b800eb9dSEmmanuel Vadot return (0);
117b800eb9dSEmmanuel Vadot }
118b800eb9dSEmmanuel Vadot
119b800eb9dSEmmanuel Vadot static int
aw_gmacclk_set_mux(struct clknode * clk,int index)120b800eb9dSEmmanuel Vadot aw_gmacclk_set_mux(struct clknode *clk, int index)
121b800eb9dSEmmanuel Vadot {
122b800eb9dSEmmanuel Vadot struct aw_gmacclk_sc *sc;
123bce1b42fSJohn Baldwin uint32_t val, clk_src, pit;
124b800eb9dSEmmanuel Vadot
125b800eb9dSEmmanuel Vadot sc = clknode_get_softc(clk);
126b800eb9dSEmmanuel Vadot
127b800eb9dSEmmanuel Vadot switch (index) {
128b800eb9dSEmmanuel Vadot case CLK_IDX_MII:
129b800eb9dSEmmanuel Vadot clk_src = GMAC_CLK_SRC_MII;
130b800eb9dSEmmanuel Vadot pit = GMAC_CLK_PIT_MII;
131b800eb9dSEmmanuel Vadot break;
132b800eb9dSEmmanuel Vadot case CLK_IDX_RGMII:
133b800eb9dSEmmanuel Vadot clk_src = GMAC_CLK_SRC_RGMII;
134b800eb9dSEmmanuel Vadot pit = GMAC_CLK_PIT_RGMII;
135b800eb9dSEmmanuel Vadot break;
136b800eb9dSEmmanuel Vadot default:
137b800eb9dSEmmanuel Vadot return (ENXIO);
138b800eb9dSEmmanuel Vadot }
139b800eb9dSEmmanuel Vadot
140b800eb9dSEmmanuel Vadot DEVICE_LOCK(sc);
141b800eb9dSEmmanuel Vadot GMACCLK_READ(sc, &val);
142b800eb9dSEmmanuel Vadot val &= ~(GMAC_CLK_SRC | GMAC_CLK_PIT);
143b800eb9dSEmmanuel Vadot val |= (clk_src << GMAC_CLK_SRC_SHIFT);
144b800eb9dSEmmanuel Vadot val |= (pit << GMAC_CLK_PIT_SHIFT);
145b800eb9dSEmmanuel Vadot GMACCLK_WRITE(sc, val);
146b800eb9dSEmmanuel Vadot DEVICE_UNLOCK(sc);
147b800eb9dSEmmanuel Vadot
148b800eb9dSEmmanuel Vadot return (0);
149b800eb9dSEmmanuel Vadot }
150b800eb9dSEmmanuel Vadot
151b800eb9dSEmmanuel Vadot static clknode_method_t aw_gmacclk_clknode_methods[] = {
152b800eb9dSEmmanuel Vadot /* Device interface */
153b800eb9dSEmmanuel Vadot CLKNODEMETHOD(clknode_init, aw_gmacclk_init),
154b800eb9dSEmmanuel Vadot CLKNODEMETHOD(clknode_set_mux, aw_gmacclk_set_mux),
155b800eb9dSEmmanuel Vadot CLKNODEMETHOD_END
156b800eb9dSEmmanuel Vadot };
157b800eb9dSEmmanuel Vadot DEFINE_CLASS_1(aw_gmacclk_clknode, aw_gmacclk_clknode_class,
158b800eb9dSEmmanuel Vadot aw_gmacclk_clknode_methods, sizeof(struct aw_gmacclk_sc), clknode_class);
159b800eb9dSEmmanuel Vadot
160b800eb9dSEmmanuel Vadot static int
aw_gmacclk_probe(device_t dev)161b800eb9dSEmmanuel Vadot aw_gmacclk_probe(device_t dev)
162b800eb9dSEmmanuel Vadot {
163b800eb9dSEmmanuel Vadot if (!ofw_bus_status_okay(dev))
164b800eb9dSEmmanuel Vadot return (ENXIO);
165b800eb9dSEmmanuel Vadot
166b800eb9dSEmmanuel Vadot if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
167b800eb9dSEmmanuel Vadot return (ENXIO);
168b800eb9dSEmmanuel Vadot
169b800eb9dSEmmanuel Vadot device_set_desc(dev, "Allwinner GMAC Clock");
170b800eb9dSEmmanuel Vadot return (BUS_PROBE_DEFAULT);
171b800eb9dSEmmanuel Vadot }
172b800eb9dSEmmanuel Vadot
173b800eb9dSEmmanuel Vadot static int
aw_gmacclk_attach(device_t dev)174b800eb9dSEmmanuel Vadot aw_gmacclk_attach(device_t dev)
175b800eb9dSEmmanuel Vadot {
176b800eb9dSEmmanuel Vadot struct clknode_init_def def;
177b800eb9dSEmmanuel Vadot struct aw_gmacclk_sc *sc;
178b800eb9dSEmmanuel Vadot struct clkdom *clkdom;
179b800eb9dSEmmanuel Vadot struct clknode *clk;
180b800eb9dSEmmanuel Vadot clk_t clk_parent;
181b800eb9dSEmmanuel Vadot bus_addr_t paddr;
182b800eb9dSEmmanuel Vadot bus_size_t psize;
183b800eb9dSEmmanuel Vadot phandle_t node;
184b800eb9dSEmmanuel Vadot int error, ncells, i;
185b800eb9dSEmmanuel Vadot
186b800eb9dSEmmanuel Vadot node = ofw_bus_get_node(dev);
187b800eb9dSEmmanuel Vadot
188b800eb9dSEmmanuel Vadot if (ofw_reg_to_paddr(node, 0, &paddr, &psize, NULL) != 0) {
189b800eb9dSEmmanuel Vadot device_printf(dev, "cannot parse 'reg' property\n");
190b800eb9dSEmmanuel Vadot return (ENXIO);
191b800eb9dSEmmanuel Vadot }
192b800eb9dSEmmanuel Vadot
193b800eb9dSEmmanuel Vadot error = ofw_bus_parse_xref_list_get_length(node, "clocks",
194b800eb9dSEmmanuel Vadot "#clock-cells", &ncells);
195b800eb9dSEmmanuel Vadot if (error != 0 || ncells != CLK_IDX_COUNT) {
196b800eb9dSEmmanuel Vadot device_printf(dev, "couldn't find parent clocks\n");
197b800eb9dSEmmanuel Vadot return (ENXIO);
198b800eb9dSEmmanuel Vadot }
199b800eb9dSEmmanuel Vadot
200b800eb9dSEmmanuel Vadot clkdom = clkdom_create(dev);
201b800eb9dSEmmanuel Vadot
202b800eb9dSEmmanuel Vadot memset(&def, 0, sizeof(def));
203b800eb9dSEmmanuel Vadot error = clk_parse_ofw_clk_name(dev, node, &def.name);
204b800eb9dSEmmanuel Vadot if (error != 0) {
205b800eb9dSEmmanuel Vadot device_printf(dev, "cannot parse clock name\n");
206b800eb9dSEmmanuel Vadot error = ENXIO;
207b800eb9dSEmmanuel Vadot goto fail;
208b800eb9dSEmmanuel Vadot }
209b800eb9dSEmmanuel Vadot def.id = 1;
210b800eb9dSEmmanuel Vadot def.parent_names = malloc(sizeof(char *) * ncells, M_OFWPROP, M_WAITOK);
211b800eb9dSEmmanuel Vadot for (i = 0; i < ncells; i++) {
212b800eb9dSEmmanuel Vadot error = clk_get_by_ofw_index(dev, 0, i, &clk_parent);
213b800eb9dSEmmanuel Vadot if (error != 0) {
214b800eb9dSEmmanuel Vadot device_printf(dev, "cannot get clock %d\n", error);
215b800eb9dSEmmanuel Vadot goto fail;
216b800eb9dSEmmanuel Vadot }
217b800eb9dSEmmanuel Vadot def.parent_names[i] = clk_get_name(clk_parent);
218b800eb9dSEmmanuel Vadot clk_release(clk_parent);
219b800eb9dSEmmanuel Vadot }
220b800eb9dSEmmanuel Vadot def.parent_cnt = ncells;
221b800eb9dSEmmanuel Vadot
222b800eb9dSEmmanuel Vadot clk = clknode_create(clkdom, &aw_gmacclk_clknode_class, &def);
223b800eb9dSEmmanuel Vadot if (clk == NULL) {
224b800eb9dSEmmanuel Vadot device_printf(dev, "cannot create clknode\n");
225b800eb9dSEmmanuel Vadot error = ENXIO;
226b800eb9dSEmmanuel Vadot goto fail;
227b800eb9dSEmmanuel Vadot }
228b800eb9dSEmmanuel Vadot
229b800eb9dSEmmanuel Vadot sc = clknode_get_softc(clk);
230b800eb9dSEmmanuel Vadot sc->reg = paddr;
231b800eb9dSEmmanuel Vadot sc->clkdev = device_get_parent(dev);
232b800eb9dSEmmanuel Vadot sc->tx_delay = sc->rx_delay = -1;
233b800eb9dSEmmanuel Vadot OF_getencprop(node, "tx-delay", &sc->tx_delay, sizeof(sc->tx_delay));
234b800eb9dSEmmanuel Vadot OF_getencprop(node, "rx-delay", &sc->rx_delay, sizeof(sc->rx_delay));
235b800eb9dSEmmanuel Vadot
236b800eb9dSEmmanuel Vadot clknode_register(clkdom, clk);
237b800eb9dSEmmanuel Vadot
238b800eb9dSEmmanuel Vadot if (clkdom_finit(clkdom) != 0) {
239b800eb9dSEmmanuel Vadot device_printf(dev, "cannot finalize clkdom initialization\n");
240b800eb9dSEmmanuel Vadot error = ENXIO;
241b800eb9dSEmmanuel Vadot goto fail;
242b800eb9dSEmmanuel Vadot }
243b800eb9dSEmmanuel Vadot
244b800eb9dSEmmanuel Vadot if (bootverbose)
245b800eb9dSEmmanuel Vadot clkdom_dump(clkdom);
246b800eb9dSEmmanuel Vadot
247b800eb9dSEmmanuel Vadot return (0);
248b800eb9dSEmmanuel Vadot
249b800eb9dSEmmanuel Vadot fail:
250b800eb9dSEmmanuel Vadot return (error);
251b800eb9dSEmmanuel Vadot }
252b800eb9dSEmmanuel Vadot
253b800eb9dSEmmanuel Vadot static device_method_t aw_gmacclk_methods[] = {
254b800eb9dSEmmanuel Vadot /* Device interface */
255b800eb9dSEmmanuel Vadot DEVMETHOD(device_probe, aw_gmacclk_probe),
256b800eb9dSEmmanuel Vadot DEVMETHOD(device_attach, aw_gmacclk_attach),
257b800eb9dSEmmanuel Vadot
258b800eb9dSEmmanuel Vadot DEVMETHOD_END
259b800eb9dSEmmanuel Vadot };
260b800eb9dSEmmanuel Vadot
261b800eb9dSEmmanuel Vadot static driver_t aw_gmacclk_driver = {
262b800eb9dSEmmanuel Vadot "aw_gmacclk",
263b800eb9dSEmmanuel Vadot aw_gmacclk_methods,
264b800eb9dSEmmanuel Vadot 0
265b800eb9dSEmmanuel Vadot };
266b800eb9dSEmmanuel Vadot
2677e1e2ba1SJohn Baldwin EARLY_DRIVER_MODULE(aw_gmacclk, simplebus, aw_gmacclk_driver, 0, 0,
2687e1e2ba1SJohn Baldwin BUS_PASS_RESOURCE + BUS_PASS_ORDER_MIDDLE);
269