xref: /freebsd/sys/arm/allwinner/aw_r_intc.c (revision 9768746b)
1 /*-
2  * Copyright (c) 2021 Emmanuel Vadot <manu@freebsd.org>
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  * 1. Redistributions of source code must retain the above copyright
8  *    notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  *    notice, this list of conditions and the following disclaimer in the
11  *    documentation and/or other materials provided with the distribution.
12  *
13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23  * SUCH DAMAGE.
24  */
25 
26 #include <sys/cdefs.h>
27 __FBSDID("$FreeBSD$");
28 
29 #include "opt_platform.h"
30 
31 #include <sys/param.h>
32 #include <sys/bus.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <machine/intr.h>
36 
37 #include <dev/ofw/openfirm.h>
38 #include <dev/ofw/ofw_bus.h>
39 #include <dev/ofw/ofw_bus_subr.h>
40 
41 #include "pic_if.h"
42 
43 struct aw_r_intc_gicp_softc {
44 	device_t		dev;
45 	device_t		parent;
46 	struct resource		*res;
47 
48 	struct intr_map_data_fdt *parent_map_data;
49 };
50 
51 static struct ofw_compat_data compat_data[] = {
52 	{"allwinner,sun6i-a31-r-intc",	1},
53 	{"allwinner,sun6i-a64-r-intc",	1},
54 	{"allwinner,sun50i-h6-r-intc",	1},
55 	{NULL,				0}
56 };
57 
58 static int
59 aw_r_intc_gicp_probe(device_t dev)
60 {
61 
62 	if (!ofw_bus_status_okay(dev))
63 		return (ENXIO);
64 
65 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
66 		return (ENXIO);
67 
68 	device_set_desc(dev, "Allwinner R INTC");
69 	return (BUS_PROBE_DEFAULT);
70 }
71 
72 static int
73 aw_r_intc_gicp_attach(device_t dev)
74 {
75 	struct aw_r_intc_gicp_softc *sc;
76 	phandle_t node, xref, intr_parent;
77 
78 	sc = device_get_softc(dev);
79 	sc->dev = dev;
80 	node = ofw_bus_get_node(dev);
81 
82 	/* Look for our parent */
83 	if ((intr_parent = ofw_bus_find_iparent(node)) == 0) {
84 		device_printf(dev,
85 		     "Cannot find our parent interrupt controller\n");
86 		return (ENXIO);
87 	}
88 	if ((sc->parent = OF_device_from_xref(intr_parent)) == NULL) {
89 		device_printf(dev,
90 		     "cannot find parent interrupt controller device\n");
91 		return (ENXIO);
92 	}
93 
94 	/* Register ourself as a interrupt controller */
95 	xref = OF_xref_from_node(node);
96 	if (intr_pic_register(dev, xref) == NULL) {
97 		device_printf(dev, "Cannot register GICP\n");
98 		return (ENXIO);
99 	}
100 
101 	/* Allocate GIC compatible mapping */
102 	sc->parent_map_data = (struct intr_map_data_fdt *)intr_alloc_map_data(
103 	    INTR_MAP_DATA_FDT, sizeof(struct intr_map_data_fdt) +
104 	    + 3 * sizeof(phandle_t), M_WAITOK | M_ZERO);
105 
106 	/* Register ourself to device can find us */
107 	OF_device_register_xref(xref, dev);
108 
109 	return (0);
110 }
111 
112 static int
113 aw_r_intc_gicp_detach(device_t dev)
114 {
115 
116 	return (EBUSY);
117 }
118 
119 static struct intr_map_data *
120 aw_r_intc_gicp_convert_map_data(struct aw_r_intc_gicp_softc *sc,
121     struct intr_map_data *data)
122 {
123 	struct intr_map_data_fdt *daf;
124 
125 	daf = (struct intr_map_data_fdt *)data;
126 
127 	/* We only support GIC forward for now */
128 	if (daf->ncells != 3)
129 		return (NULL);
130 
131 	/* Check if this is a GIC_SPI type */
132 	if (daf->cells[0] != 0)
133 		return (NULL);
134 
135 	sc->parent_map_data->ncells = 3;
136 	sc->parent_map_data->cells[0] = 0;
137 	sc->parent_map_data->cells[1] = daf->cells[1];
138 	sc->parent_map_data->cells[2] = daf->cells[2];
139 
140 	return ((struct intr_map_data *)sc->parent_map_data);
141 }
142 
143 static int
144 aw_r_intc_gicp_activate_intr(device_t dev, struct intr_irqsrc *isrc,
145     struct resource *res, struct intr_map_data *data)
146 {
147 	struct aw_r_intc_gicp_softc *sc;
148 
149 	sc = device_get_softc(dev);
150 	data = aw_r_intc_gicp_convert_map_data(sc, data);
151 	if (data == NULL)
152 		return (EINVAL);
153 
154 	return (PIC_ACTIVATE_INTR(sc->parent, isrc, res, data));
155 }
156 
157 static void
158 aw_r_intc_gicp_enable_intr(device_t dev, struct intr_irqsrc *isrc)
159 {
160 	struct aw_r_intc_gicp_softc *sc;
161 
162 	sc = device_get_softc(dev);
163 
164 	PIC_ENABLE_INTR(sc->parent, isrc);
165 }
166 
167 static void
168 aw_r_intc_gicp_disable_intr(device_t dev, struct intr_irqsrc *isrc)
169 {
170 	struct aw_r_intc_gicp_softc *sc;
171 
172 	sc = device_get_softc(dev);
173 
174 	PIC_DISABLE_INTR(sc->parent, isrc);
175 }
176 
177 static int
178 aw_r_intc_gicp_map_intr(device_t dev, struct intr_map_data *data,
179     struct intr_irqsrc **isrcp)
180 {
181 	struct aw_r_intc_gicp_softc *sc;
182 	int ret;
183 
184 	sc = device_get_softc(dev);
185 
186 	if (data->type != INTR_MAP_DATA_FDT)
187 		return (ENOTSUP);
188 
189 	data = aw_r_intc_gicp_convert_map_data(sc, data);
190 	if (data == NULL)
191 		return (EINVAL);
192 
193 	ret = PIC_MAP_INTR(sc->parent, data, isrcp);
194 	(*isrcp)->isrc_dev = sc->dev;
195 	return(ret);
196 }
197 
198 static int
199 aw_r_intc_gicp_deactivate_intr(device_t dev, struct intr_irqsrc *isrc,
200     struct resource *res, struct intr_map_data *data)
201 {
202 	struct aw_r_intc_gicp_softc *sc;
203 
204 	sc = device_get_softc(dev);
205 
206 	data = aw_r_intc_gicp_convert_map_data(sc, data);
207 	if (data == NULL)
208 		return (EINVAL);
209 
210 	return (PIC_DEACTIVATE_INTR(sc->parent, isrc, res, data));
211 }
212 
213 static int
214 aw_r_intc_gicp_setup_intr(device_t dev, struct intr_irqsrc *isrc,
215     struct resource *res, struct intr_map_data *data)
216 {
217 	struct aw_r_intc_gicp_softc *sc;
218 
219 	sc = device_get_softc(dev);
220 	data = aw_r_intc_gicp_convert_map_data(sc, data);
221 	if (data == NULL)
222 		return (EINVAL);
223 
224 	return (PIC_SETUP_INTR(sc->parent, isrc, res, data));
225 }
226 
227 static int
228 aw_r_intc_gicp_teardown_intr(device_t dev, struct intr_irqsrc *isrc,
229     struct resource *res, struct intr_map_data *data)
230 {
231 	struct aw_r_intc_gicp_softc *sc;
232 
233 	sc = device_get_softc(dev);
234 	data = aw_r_intc_gicp_convert_map_data(sc, data);
235 	if (data == NULL)
236 		return (EINVAL);
237 
238 	return (PIC_TEARDOWN_INTR(sc->parent, isrc, res, data));
239 }
240 
241 static void
242 aw_r_intc_gicp_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
243 {
244 	struct aw_r_intc_gicp_softc *sc;
245 
246 	sc = device_get_softc(dev);
247 
248 	PIC_PRE_ITHREAD(sc->parent, isrc);
249 }
250 
251 static void
252 aw_r_intc_gicp_post_ithread(device_t dev, struct intr_irqsrc *isrc)
253 {
254 	struct aw_r_intc_gicp_softc *sc;
255 
256 	sc = device_get_softc(dev);
257 
258 	PIC_POST_ITHREAD(sc->parent, isrc);
259 }
260 
261 static void
262 aw_r_intc_gicp_post_filter(device_t dev, struct intr_irqsrc *isrc)
263 {
264 	struct aw_r_intc_gicp_softc *sc;
265 
266 	sc = device_get_softc(dev);
267 
268 	PIC_POST_FILTER(sc->parent, isrc);
269 }
270 
271 static device_method_t aw_r_intc_gicp_methods[] = {
272 	/* Device interface */
273 	DEVMETHOD(device_probe,		aw_r_intc_gicp_probe),
274 	DEVMETHOD(device_attach,	aw_r_intc_gicp_attach),
275 	DEVMETHOD(device_detach,	aw_r_intc_gicp_detach),
276 
277 	/* Interrupt controller interface */
278 	DEVMETHOD(pic_activate_intr,	aw_r_intc_gicp_activate_intr),
279 	DEVMETHOD(pic_disable_intr,	aw_r_intc_gicp_disable_intr),
280 	DEVMETHOD(pic_enable_intr,	aw_r_intc_gicp_enable_intr),
281 	DEVMETHOD(pic_map_intr,		aw_r_intc_gicp_map_intr),
282 	DEVMETHOD(pic_deactivate_intr,	aw_r_intc_gicp_deactivate_intr),
283 	DEVMETHOD(pic_setup_intr,	aw_r_intc_gicp_setup_intr),
284 	DEVMETHOD(pic_teardown_intr,	aw_r_intc_gicp_teardown_intr),
285 	DEVMETHOD(pic_post_filter,	aw_r_intc_gicp_post_filter),
286 	DEVMETHOD(pic_post_ithread,	aw_r_intc_gicp_post_ithread),
287 	DEVMETHOD(pic_pre_ithread,	aw_r_intc_gicp_pre_ithread),
288 
289 	DEVMETHOD_END
290 };
291 
292 static driver_t aw_r_intc_gicp_driver = {
293 	"aw_r_intc_gicp",
294 	aw_r_intc_gicp_methods,
295 	sizeof(struct aw_r_intc_gicp_softc),
296 };
297 
298 EARLY_DRIVER_MODULE(aw_r_intc_gicp, simplebus, aw_r_intc_gicp_driver, 0, 0,
299     BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
300