1343044c4SJared McNeill /*- 2343044c4SJared McNeill * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 3343044c4SJared McNeill * All rights reserved. 4343044c4SJared McNeill * 5343044c4SJared McNeill * Redistribution and use in source and binary forms, with or without 6343044c4SJared McNeill * modification, are permitted provided that the following conditions 7343044c4SJared McNeill * are met: 8343044c4SJared McNeill * 1. Redistributions of source code must retain the above copyright 9343044c4SJared McNeill * notice, this list of conditions and the following disclaimer. 10343044c4SJared McNeill * 2. Redistributions in binary form must reproduce the above copyright 11343044c4SJared McNeill * notice, this list of conditions and the following disclaimer in the 12343044c4SJared McNeill * documentation and/or other materials provided with the distribution. 13343044c4SJared McNeill * 14343044c4SJared McNeill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15343044c4SJared McNeill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16343044c4SJared McNeill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17343044c4SJared McNeill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18343044c4SJared McNeill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19343044c4SJared McNeill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 20343044c4SJared McNeill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 21343044c4SJared McNeill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22343044c4SJared McNeill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23343044c4SJared McNeill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24343044c4SJared McNeill * SUCH DAMAGE. 25343044c4SJared McNeill * 26343044c4SJared McNeill * $FreeBSD$ 27343044c4SJared McNeill */ 28343044c4SJared McNeill 29343044c4SJared McNeill /* 30343044c4SJared McNeill * Allwinner thermal sensor controller 31343044c4SJared McNeill */ 32343044c4SJared McNeill 33343044c4SJared McNeill #include <sys/cdefs.h> 34343044c4SJared McNeill __FBSDID("$FreeBSD$"); 35343044c4SJared McNeill 36343044c4SJared McNeill #include <sys/param.h> 37343044c4SJared McNeill #include <sys/systm.h> 38343044c4SJared McNeill #include <sys/bus.h> 39343044c4SJared McNeill #include <sys/rman.h> 40343044c4SJared McNeill #include <sys/kernel.h> 41343044c4SJared McNeill #include <sys/sysctl.h> 42d69d5ab0SJared McNeill #include <sys/reboot.h> 43343044c4SJared McNeill #include <sys/module.h> 443c2b90f1SJared McNeill #include <sys/cpu.h> 452e4f9347SJared McNeill #include <sys/taskqueue.h> 46343044c4SJared McNeill #include <machine/bus.h> 47343044c4SJared McNeill 48343044c4SJared McNeill #include <dev/ofw/ofw_bus.h> 49343044c4SJared McNeill #include <dev/ofw/ofw_bus_subr.h> 50343044c4SJared McNeill 51d69d5ab0SJared McNeill #include <dev/extres/clk/clk.h> 52d69d5ab0SJared McNeill #include <dev/extres/hwreset/hwreset.h> 53d69d5ab0SJared McNeill 54343044c4SJared McNeill #include <arm/allwinner/aw_sid.h> 55343044c4SJared McNeill 563c2b90f1SJared McNeill #include "cpufreq_if.h" 573c2b90f1SJared McNeill 58343044c4SJared McNeill #define THS_CTRL0 0x00 59d69d5ab0SJared McNeill #define THS_CTRL1 0x04 60d69d5ab0SJared McNeill #define ADC_CALI_EN (1 << 17) 61343044c4SJared McNeill #define THS_CTRL2 0x40 62343044c4SJared McNeill #define SENSOR_ACQ1_SHIFT 16 63343044c4SJared McNeill #define SENSOR2_EN (1 << 2) 64343044c4SJared McNeill #define SENSOR1_EN (1 << 1) 65343044c4SJared McNeill #define SENSOR0_EN (1 << 0) 66343044c4SJared McNeill #define THS_INTC 0x44 67343044c4SJared McNeill #define THS_INTS 0x48 68d69d5ab0SJared McNeill #define THS2_DATA_IRQ_STS (1 << 10) 69d69d5ab0SJared McNeill #define THS1_DATA_IRQ_STS (1 << 9) 70d69d5ab0SJared McNeill #define THS0_DATA_IRQ_STS (1 << 8) 71d69d5ab0SJared McNeill #define SHUT_INT2_STS (1 << 6) 72d69d5ab0SJared McNeill #define SHUT_INT1_STS (1 << 5) 73d69d5ab0SJared McNeill #define SHUT_INT0_STS (1 << 4) 74d69d5ab0SJared McNeill #define ALARM_INT2_STS (1 << 2) 75d69d5ab0SJared McNeill #define ALARM_INT1_STS (1 << 1) 76d69d5ab0SJared McNeill #define ALARM_INT0_STS (1 << 0) 773c2b90f1SJared McNeill #define THS_ALARM0_CTRL 0x50 783c2b90f1SJared McNeill #define ALARM_T_HOT_MASK 0xfff 793c2b90f1SJared McNeill #define ALARM_T_HOT_SHIFT 16 803c2b90f1SJared McNeill #define ALARM_T_HYST_MASK 0xfff 813c2b90f1SJared McNeill #define ALARM_T_HYST_SHIFT 0 823c2b90f1SJared McNeill #define THS_SHUTDOWN0_CTRL 0x60 833c2b90f1SJared McNeill #define SHUT_T_HOT_MASK 0xfff 843c2b90f1SJared McNeill #define SHUT_T_HOT_SHIFT 16 85343044c4SJared McNeill #define THS_FILTER 0x70 86343044c4SJared McNeill #define THS_CALIB0 0x74 87343044c4SJared McNeill #define THS_CALIB1 0x78 88343044c4SJared McNeill #define THS_DATA0 0x80 89343044c4SJared McNeill #define THS_DATA1 0x84 90343044c4SJared McNeill #define THS_DATA2 0x88 91343044c4SJared McNeill #define DATA_MASK 0xfff 92343044c4SJared McNeill 93d69d5ab0SJared McNeill #define A83T_ADC_ACQUIRE_TIME 0x17 94d69d5ab0SJared McNeill #define A83T_FILTER 0x4 95d69d5ab0SJared McNeill #define A83T_INTC 0x1000 96d69d5ab0SJared McNeill #define A83T_TEMP_BASE 2719000 974e7f43baSJared McNeill #define A83T_TEMP_MUL 1000 98d69d5ab0SJared McNeill #define A83T_TEMP_DIV 14186 99d69d5ab0SJared McNeill #define A83T_CLK_RATE 24000000 100d69d5ab0SJared McNeill 101d69d5ab0SJared McNeill #define A64_ADC_ACQUIRE_TIME 0x190 102d69d5ab0SJared McNeill #define A64_FILTER 0x6 103d69d5ab0SJared McNeill #define A64_INTC 0x18000 104d69d5ab0SJared McNeill #define A64_TEMP_BASE 2170000 1054e7f43baSJared McNeill #define A64_TEMP_MUL 1000 106d69d5ab0SJared McNeill #define A64_TEMP_DIV 8560 107d69d5ab0SJared McNeill #define A64_CLK_RATE 4000000 108d69d5ab0SJared McNeill 1094e7f43baSJared McNeill #define H3_ADC_ACQUIRE_TIME 0x3f 1104e7f43baSJared McNeill #define H3_FILTER 0x6 1114e7f43baSJared McNeill #define H3_INTC 0x191000 1120a30b4b2SJared McNeill #define H3_TEMP_BASE 217 1133c2b90f1SJared McNeill #define H3_TEMP_MUL 1000 1140a30b4b2SJared McNeill #define H3_TEMP_DIV 8253 1150a30b4b2SJared McNeill #define H3_TEMP_MINUS 1794000 1164e7f43baSJared McNeill #define H3_CLK_RATE 4000000 1170a30b4b2SJared McNeill #define H3_INIT_ALARM 90 /* degC */ 1180a30b4b2SJared McNeill #define H3_INIT_SHUT 105 /* degC */ 1194e7f43baSJared McNeill 120d69d5ab0SJared McNeill #define TEMP_C_TO_K 273 121343044c4SJared McNeill #define SENSOR_ENABLE_ALL (SENSOR0_EN|SENSOR1_EN|SENSOR2_EN) 122d69d5ab0SJared McNeill #define SHUT_INT_ALL (SHUT_INT0_STS|SHUT_INT1_STS|SHUT_INT2_STS) 1233c2b90f1SJared McNeill #define ALARM_INT_ALL (ALARM_INT0_STS) 124343044c4SJared McNeill 125d69d5ab0SJared McNeill #define MAX_SENSORS 3 1263c2b90f1SJared McNeill #define MAX_CF_LEVELS 64 1273c2b90f1SJared McNeill 1283c2b90f1SJared McNeill #define THROTTLE_ENABLE_DEFAULT 1 1293c2b90f1SJared McNeill 1303c2b90f1SJared McNeill /* Enable thermal throttling */ 1313c2b90f1SJared McNeill static int aw_thermal_throttle_enable = THROTTLE_ENABLE_DEFAULT; 1323c2b90f1SJared McNeill TUNABLE_INT("hw.aw_thermal.throttle_enable", &aw_thermal_throttle_enable); 133343044c4SJared McNeill 134d69d5ab0SJared McNeill struct aw_thermal_sensor { 135343044c4SJared McNeill const char *name; 136343044c4SJared McNeill const char *desc; 1370a30b4b2SJared McNeill int init_alarm; 1380a30b4b2SJared McNeill int init_shut; 139343044c4SJared McNeill }; 140343044c4SJared McNeill 141d69d5ab0SJared McNeill struct aw_thermal_config { 142d69d5ab0SJared McNeill struct aw_thermal_sensor sensors[MAX_SENSORS]; 143d69d5ab0SJared McNeill int nsensors; 144d69d5ab0SJared McNeill uint64_t clk_rate; 145d69d5ab0SJared McNeill uint32_t adc_acquire_time; 1463c2b90f1SJared McNeill int adc_cali_en; 147d69d5ab0SJared McNeill uint32_t filter; 148d69d5ab0SJared McNeill uint32_t intc; 1493c2b90f1SJared McNeill int (*to_temp)(uint32_t); 1500a30b4b2SJared McNeill uint32_t (*to_reg)(int); 1514e7f43baSJared McNeill int temp_base; 1524e7f43baSJared McNeill int temp_mul; 1534e7f43baSJared McNeill int temp_div; 1543c2b90f1SJared McNeill int calib0, calib1; 1553c2b90f1SJared McNeill uint32_t calib0_mask, calib1_mask; 156d69d5ab0SJared McNeill }; 157d69d5ab0SJared McNeill 1583c2b90f1SJared McNeill static int 1593c2b90f1SJared McNeill a83t_to_temp(uint32_t val) 1603c2b90f1SJared McNeill { 1613c2b90f1SJared McNeill return ((A83T_TEMP_BASE - (val * A83T_TEMP_MUL)) / A83T_TEMP_DIV); 1623c2b90f1SJared McNeill } 1633c2b90f1SJared McNeill 164d69d5ab0SJared McNeill static const struct aw_thermal_config a83t_config = { 165d69d5ab0SJared McNeill .nsensors = 3, 166d69d5ab0SJared McNeill .sensors = { 167d69d5ab0SJared McNeill [0] = { 168d69d5ab0SJared McNeill .name = "cluster0", 169d69d5ab0SJared McNeill .desc = "CPU cluster 0 temperature", 170d69d5ab0SJared McNeill }, 171d69d5ab0SJared McNeill [1] = { 172d69d5ab0SJared McNeill .name = "cluster1", 173d69d5ab0SJared McNeill .desc = "CPU cluster 1 temperature", 174d69d5ab0SJared McNeill }, 175d69d5ab0SJared McNeill [2] = { 176d69d5ab0SJared McNeill .name = "gpu", 177d69d5ab0SJared McNeill .desc = "GPU temperature", 178d69d5ab0SJared McNeill }, 179d69d5ab0SJared McNeill }, 180d69d5ab0SJared McNeill .clk_rate = A83T_CLK_RATE, 181d69d5ab0SJared McNeill .adc_acquire_time = A83T_ADC_ACQUIRE_TIME, 1823c2b90f1SJared McNeill .adc_cali_en = 1, 183d69d5ab0SJared McNeill .filter = A83T_FILTER, 184d69d5ab0SJared McNeill .intc = A83T_INTC, 1853c2b90f1SJared McNeill .to_temp = a83t_to_temp, 1863c2b90f1SJared McNeill .calib0_mask = 0xffffffff, 1873c2b90f1SJared McNeill .calib1_mask = 0xffffffff, 188d69d5ab0SJared McNeill }; 189d69d5ab0SJared McNeill 1903c2b90f1SJared McNeill static int 1913c2b90f1SJared McNeill a64_to_temp(uint32_t val) 1923c2b90f1SJared McNeill { 1933c2b90f1SJared McNeill return ((A64_TEMP_BASE - (val * A64_TEMP_MUL)) / A64_TEMP_DIV); 1943c2b90f1SJared McNeill } 1953c2b90f1SJared McNeill 196d69d5ab0SJared McNeill static const struct aw_thermal_config a64_config = { 197d69d5ab0SJared McNeill .nsensors = 3, 198d69d5ab0SJared McNeill .sensors = { 199d69d5ab0SJared McNeill [0] = { 200d69d5ab0SJared McNeill .name = "cpu", 201d69d5ab0SJared McNeill .desc = "CPU temperature", 202d69d5ab0SJared McNeill }, 203d69d5ab0SJared McNeill [1] = { 204d69d5ab0SJared McNeill .name = "gpu1", 205d69d5ab0SJared McNeill .desc = "GPU temperature 1", 206d69d5ab0SJared McNeill }, 207d69d5ab0SJared McNeill [2] = { 208d69d5ab0SJared McNeill .name = "gpu2", 209d69d5ab0SJared McNeill .desc = "GPU temperature 2", 210d69d5ab0SJared McNeill }, 211d69d5ab0SJared McNeill }, 212d69d5ab0SJared McNeill .clk_rate = A64_CLK_RATE, 213d69d5ab0SJared McNeill .adc_acquire_time = A64_ADC_ACQUIRE_TIME, 214d69d5ab0SJared McNeill .filter = A64_FILTER, 215d69d5ab0SJared McNeill .intc = A64_INTC, 2163c2b90f1SJared McNeill .to_temp = a64_to_temp, 217343044c4SJared McNeill }; 218343044c4SJared McNeill 2193c2b90f1SJared McNeill static int 2203c2b90f1SJared McNeill h3_to_temp(uint32_t val) 2213c2b90f1SJared McNeill { 2220a30b4b2SJared McNeill return (H3_TEMP_BASE - ((val * H3_TEMP_MUL) / H3_TEMP_DIV)); 2230a30b4b2SJared McNeill } 2240a30b4b2SJared McNeill 2250a30b4b2SJared McNeill static uint32_t 2260a30b4b2SJared McNeill h3_to_reg(int val) 2270a30b4b2SJared McNeill { 2280a30b4b2SJared McNeill return ((H3_TEMP_MINUS - (val * H3_TEMP_DIV)) / H3_TEMP_MUL); 2293c2b90f1SJared McNeill } 2303c2b90f1SJared McNeill 2314e7f43baSJared McNeill static const struct aw_thermal_config h3_config = { 2324e7f43baSJared McNeill .nsensors = 1, 2334e7f43baSJared McNeill .sensors = { 2344e7f43baSJared McNeill [0] = { 2354e7f43baSJared McNeill .name = "cpu", 2364e7f43baSJared McNeill .desc = "CPU temperature", 2370a30b4b2SJared McNeill .init_alarm = H3_INIT_ALARM, 2380a30b4b2SJared McNeill .init_shut = H3_INIT_SHUT, 2394e7f43baSJared McNeill }, 2404e7f43baSJared McNeill }, 2414e7f43baSJared McNeill .clk_rate = H3_CLK_RATE, 2424e7f43baSJared McNeill .adc_acquire_time = H3_ADC_ACQUIRE_TIME, 2434e7f43baSJared McNeill .filter = H3_FILTER, 2444e7f43baSJared McNeill .intc = H3_INTC, 2453c2b90f1SJared McNeill .to_temp = h3_to_temp, 2460a30b4b2SJared McNeill .to_reg = h3_to_reg, 2473c2b90f1SJared McNeill .calib0_mask = 0xfff, 2484e7f43baSJared McNeill }; 2494e7f43baSJared McNeill 250343044c4SJared McNeill static struct ofw_compat_data compat_data[] = { 251d69d5ab0SJared McNeill { "allwinner,sun8i-a83t-ts", (uintptr_t)&a83t_config }, 2524e7f43baSJared McNeill { "allwinner,sun8i-h3-ts", (uintptr_t)&h3_config }, 253d69d5ab0SJared McNeill { "allwinner,sun50i-a64-ts", (uintptr_t)&a64_config }, 254343044c4SJared McNeill { NULL, (uintptr_t)NULL } 255343044c4SJared McNeill }; 256343044c4SJared McNeill 257343044c4SJared McNeill #define THS_CONF(d) \ 258343044c4SJared McNeill (void *)ofw_bus_search_compatible((d), compat_data)->ocd_data 259343044c4SJared McNeill 260343044c4SJared McNeill struct aw_thermal_softc { 2613c2b90f1SJared McNeill device_t dev; 262d69d5ab0SJared McNeill struct resource *res[2]; 263d69d5ab0SJared McNeill struct aw_thermal_config *conf; 2643c2b90f1SJared McNeill 2652e4f9347SJared McNeill struct task cf_task; 2663c2b90f1SJared McNeill int throttle; 2673c2b90f1SJared McNeill int min_freq; 2683c2b90f1SJared McNeill struct cf_level levels[MAX_CF_LEVELS]; 2693c2b90f1SJared McNeill eventhandler_tag cf_pre_tag; 270343044c4SJared McNeill }; 271343044c4SJared McNeill 272343044c4SJared McNeill static struct resource_spec aw_thermal_spec[] = { 273343044c4SJared McNeill { SYS_RES_MEMORY, 0, RF_ACTIVE }, 274d69d5ab0SJared McNeill { SYS_RES_IRQ, 0, RF_ACTIVE }, 275343044c4SJared McNeill { -1, 0 } 276343044c4SJared McNeill }; 277343044c4SJared McNeill 278d69d5ab0SJared McNeill #define RD4(sc, reg) bus_read_4((sc)->res[0], (reg)) 279d69d5ab0SJared McNeill #define WR4(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val)) 280343044c4SJared McNeill 281343044c4SJared McNeill static int 282343044c4SJared McNeill aw_thermal_init(struct aw_thermal_softc *sc) 283343044c4SJared McNeill { 284343044c4SJared McNeill uint32_t calib0, calib1; 285343044c4SJared McNeill int error; 286343044c4SJared McNeill 2870a30b4b2SJared McNeill if (sc->conf->calib0_mask != 0 || sc->conf->calib1_mask != 0) { 288343044c4SJared McNeill /* Read calibration settings from SRAM */ 289343044c4SJared McNeill error = aw_sid_read_tscalib(&calib0, &calib1); 290343044c4SJared McNeill if (error != 0) 291343044c4SJared McNeill return (error); 292343044c4SJared McNeill 2933c2b90f1SJared McNeill calib0 &= sc->conf->calib0_mask; 2943c2b90f1SJared McNeill calib1 &= sc->conf->calib1_mask; 2953c2b90f1SJared McNeill 296343044c4SJared McNeill /* Write calibration settings to thermal controller */ 2970a30b4b2SJared McNeill if (calib0 != 0) 298343044c4SJared McNeill WR4(sc, THS_CALIB0, calib0); 2990a30b4b2SJared McNeill if (calib1 != 0) 300343044c4SJared McNeill WR4(sc, THS_CALIB1, calib1); 3014e7f43baSJared McNeill } 302343044c4SJared McNeill 303343044c4SJared McNeill /* Configure ADC acquire time (CLK_IN/(N+1)) and enable sensors */ 304d69d5ab0SJared McNeill WR4(sc, THS_CTRL1, ADC_CALI_EN); 305d69d5ab0SJared McNeill WR4(sc, THS_CTRL0, sc->conf->adc_acquire_time); 306d69d5ab0SJared McNeill WR4(sc, THS_CTRL2, sc->conf->adc_acquire_time << SENSOR_ACQ1_SHIFT); 307343044c4SJared McNeill 308343044c4SJared McNeill /* Enable average filter */ 309d69d5ab0SJared McNeill WR4(sc, THS_FILTER, sc->conf->filter); 310d69d5ab0SJared McNeill 311d69d5ab0SJared McNeill /* Enable interrupts */ 312d69d5ab0SJared McNeill WR4(sc, THS_INTS, RD4(sc, THS_INTS)); 3133c2b90f1SJared McNeill WR4(sc, THS_INTC, sc->conf->intc | SHUT_INT_ALL | ALARM_INT_ALL); 314d69d5ab0SJared McNeill 315d69d5ab0SJared McNeill /* Enable sensors */ 316d69d5ab0SJared McNeill WR4(sc, THS_CTRL2, RD4(sc, THS_CTRL2) | SENSOR_ENABLE_ALL); 317343044c4SJared McNeill 318343044c4SJared McNeill return (0); 319343044c4SJared McNeill } 320343044c4SJared McNeill 321343044c4SJared McNeill static int 322d69d5ab0SJared McNeill aw_thermal_gettemp(struct aw_thermal_softc *sc, int sensor) 323d69d5ab0SJared McNeill { 324d69d5ab0SJared McNeill uint32_t val; 325d69d5ab0SJared McNeill 326d69d5ab0SJared McNeill val = RD4(sc, THS_DATA0 + (sensor * 4)); 327d69d5ab0SJared McNeill 3280a30b4b2SJared McNeill return (sc->conf->to_temp(val)); 3293c2b90f1SJared McNeill } 3303c2b90f1SJared McNeill 3313c2b90f1SJared McNeill static int 3323c2b90f1SJared McNeill aw_thermal_getshut(struct aw_thermal_softc *sc, int sensor) 3333c2b90f1SJared McNeill { 3343c2b90f1SJared McNeill uint32_t val; 3353c2b90f1SJared McNeill 3363c2b90f1SJared McNeill val = RD4(sc, THS_SHUTDOWN0_CTRL + (sensor * 4)); 3373c2b90f1SJared McNeill val = (val >> SHUT_T_HOT_SHIFT) & SHUT_T_HOT_MASK; 3383c2b90f1SJared McNeill 3390a30b4b2SJared McNeill return (sc->conf->to_temp(val)); 3400a30b4b2SJared McNeill } 3410a30b4b2SJared McNeill 3420a30b4b2SJared McNeill static void 3430a30b4b2SJared McNeill aw_thermal_setshut(struct aw_thermal_softc *sc, int sensor, int temp) 3440a30b4b2SJared McNeill { 3450a30b4b2SJared McNeill uint32_t val; 3460a30b4b2SJared McNeill 3470a30b4b2SJared McNeill val = RD4(sc, THS_SHUTDOWN0_CTRL + (sensor * 4)); 3480a30b4b2SJared McNeill val &= ~(SHUT_T_HOT_MASK << SHUT_T_HOT_SHIFT); 3490a30b4b2SJared McNeill val |= (sc->conf->to_reg(temp) << SHUT_T_HOT_SHIFT); 3500a30b4b2SJared McNeill WR4(sc, THS_SHUTDOWN0_CTRL + (sensor * 4), val); 3513c2b90f1SJared McNeill } 3523c2b90f1SJared McNeill 3533c2b90f1SJared McNeill static int 3543c2b90f1SJared McNeill aw_thermal_gethyst(struct aw_thermal_softc *sc, int sensor) 3553c2b90f1SJared McNeill { 3563c2b90f1SJared McNeill uint32_t val; 3573c2b90f1SJared McNeill 3583c2b90f1SJared McNeill val = RD4(sc, THS_ALARM0_CTRL + (sensor * 4)); 3593c2b90f1SJared McNeill val = (val >> ALARM_T_HYST_SHIFT) & ALARM_T_HYST_MASK; 3603c2b90f1SJared McNeill 3610a30b4b2SJared McNeill return (sc->conf->to_temp(val)); 3623c2b90f1SJared McNeill } 3633c2b90f1SJared McNeill 3643c2b90f1SJared McNeill static int 3653c2b90f1SJared McNeill aw_thermal_getalarm(struct aw_thermal_softc *sc, int sensor) 3663c2b90f1SJared McNeill { 3673c2b90f1SJared McNeill uint32_t val; 3683c2b90f1SJared McNeill 3693c2b90f1SJared McNeill val = RD4(sc, THS_ALARM0_CTRL + (sensor * 4)); 3703c2b90f1SJared McNeill val = (val >> ALARM_T_HOT_SHIFT) & ALARM_T_HOT_MASK; 3713c2b90f1SJared McNeill 3720a30b4b2SJared McNeill return (sc->conf->to_temp(val)); 3730a30b4b2SJared McNeill } 3740a30b4b2SJared McNeill 3750a30b4b2SJared McNeill static void 3760a30b4b2SJared McNeill aw_thermal_setalarm(struct aw_thermal_softc *sc, int sensor, int temp) 3770a30b4b2SJared McNeill { 3780a30b4b2SJared McNeill uint32_t val; 3790a30b4b2SJared McNeill 3800a30b4b2SJared McNeill val = RD4(sc, THS_ALARM0_CTRL + (sensor * 4)); 3810a30b4b2SJared McNeill val &= ~(ALARM_T_HOT_MASK << ALARM_T_HOT_SHIFT); 3820a30b4b2SJared McNeill val |= (sc->conf->to_reg(temp) << ALARM_T_HOT_SHIFT); 3830a30b4b2SJared McNeill WR4(sc, THS_ALARM0_CTRL + (sensor * 4), val); 384343044c4SJared McNeill } 385343044c4SJared McNeill 386343044c4SJared McNeill static int 387343044c4SJared McNeill aw_thermal_sysctl(SYSCTL_HANDLER_ARGS) 388343044c4SJared McNeill { 389343044c4SJared McNeill struct aw_thermal_softc *sc; 390d69d5ab0SJared McNeill int sensor, val; 391343044c4SJared McNeill 392343044c4SJared McNeill sc = arg1; 393343044c4SJared McNeill sensor = arg2; 394343044c4SJared McNeill 3950a30b4b2SJared McNeill val = aw_thermal_gettemp(sc, sensor) + TEMP_C_TO_K; 396343044c4SJared McNeill 397343044c4SJared McNeill return sysctl_handle_opaque(oidp, &val, sizeof(val), req); 398343044c4SJared McNeill } 399343044c4SJared McNeill 400d69d5ab0SJared McNeill static void 4013c2b90f1SJared McNeill aw_thermal_throttle(struct aw_thermal_softc *sc, int enable) 4023c2b90f1SJared McNeill { 4033c2b90f1SJared McNeill device_t cf_dev; 4043c2b90f1SJared McNeill int count, error; 4053c2b90f1SJared McNeill 4063c2b90f1SJared McNeill if (enable == sc->throttle) 4073c2b90f1SJared McNeill return; 4083c2b90f1SJared McNeill 4093c2b90f1SJared McNeill if (enable != 0) { 4103c2b90f1SJared McNeill /* Set the lowest available frequency */ 4113c2b90f1SJared McNeill cf_dev = devclass_get_device(devclass_find("cpufreq"), 0); 4123c2b90f1SJared McNeill if (cf_dev == NULL) 4133c2b90f1SJared McNeill return; 4143c2b90f1SJared McNeill count = MAX_CF_LEVELS; 4153c2b90f1SJared McNeill error = CPUFREQ_LEVELS(cf_dev, sc->levels, &count); 4163c2b90f1SJared McNeill if (error != 0 || count == 0) 4173c2b90f1SJared McNeill return; 4183c2b90f1SJared McNeill sc->min_freq = sc->levels[count - 1].total_set.freq; 4193c2b90f1SJared McNeill error = CPUFREQ_SET(cf_dev, &sc->levels[count - 1], 4203c2b90f1SJared McNeill CPUFREQ_PRIO_USER); 4213c2b90f1SJared McNeill if (error != 0) 4223c2b90f1SJared McNeill return; 4233c2b90f1SJared McNeill } 4243c2b90f1SJared McNeill 4253c2b90f1SJared McNeill sc->throttle = enable; 4263c2b90f1SJared McNeill } 4273c2b90f1SJared McNeill 4283c2b90f1SJared McNeill static void 4292e4f9347SJared McNeill aw_thermal_cf_task(void *arg, int pending) 4302e4f9347SJared McNeill { 4312e4f9347SJared McNeill struct aw_thermal_softc *sc; 4322e4f9347SJared McNeill 4332e4f9347SJared McNeill sc = arg; 4342e4f9347SJared McNeill 4352e4f9347SJared McNeill aw_thermal_throttle(sc, 1); 4362e4f9347SJared McNeill } 4372e4f9347SJared McNeill 4382e4f9347SJared McNeill static void 4393c2b90f1SJared McNeill aw_thermal_cf_pre_change(void *arg, const struct cf_level *level, int *status) 4403c2b90f1SJared McNeill { 4413c2b90f1SJared McNeill struct aw_thermal_softc *sc; 4423c2b90f1SJared McNeill int temp_cur, temp_alarm; 4433c2b90f1SJared McNeill 4443c2b90f1SJared McNeill sc = arg; 4453c2b90f1SJared McNeill 4463c2b90f1SJared McNeill if (aw_thermal_throttle_enable == 0 || sc->throttle == 0 || 4473c2b90f1SJared McNeill level->total_set.freq == sc->min_freq) 4483c2b90f1SJared McNeill return; 4493c2b90f1SJared McNeill 4503c2b90f1SJared McNeill temp_cur = aw_thermal_gettemp(sc, 0); 4513c2b90f1SJared McNeill temp_alarm = aw_thermal_getalarm(sc, 0); 4523c2b90f1SJared McNeill 4533c2b90f1SJared McNeill if (temp_cur < temp_alarm) 4543c2b90f1SJared McNeill aw_thermal_throttle(sc, 0); 4553c2b90f1SJared McNeill else 4563c2b90f1SJared McNeill *status = ENXIO; 4573c2b90f1SJared McNeill } 4583c2b90f1SJared McNeill 4593c2b90f1SJared McNeill static void 460d69d5ab0SJared McNeill aw_thermal_intr(void *arg) 461d69d5ab0SJared McNeill { 462d69d5ab0SJared McNeill struct aw_thermal_softc *sc; 463d69d5ab0SJared McNeill device_t dev; 464d69d5ab0SJared McNeill uint32_t ints; 465d69d5ab0SJared McNeill 466d69d5ab0SJared McNeill dev = arg; 467d69d5ab0SJared McNeill sc = device_get_softc(dev); 468d69d5ab0SJared McNeill 469d69d5ab0SJared McNeill ints = RD4(sc, THS_INTS); 470d69d5ab0SJared McNeill WR4(sc, THS_INTS, ints); 471d69d5ab0SJared McNeill 472d69d5ab0SJared McNeill if ((ints & SHUT_INT_ALL) != 0) { 473d69d5ab0SJared McNeill device_printf(dev, 474d69d5ab0SJared McNeill "WARNING - current temperature exceeds safe limits\n"); 475d69d5ab0SJared McNeill shutdown_nice(RB_POWEROFF); 476d69d5ab0SJared McNeill } 4773c2b90f1SJared McNeill 4783c2b90f1SJared McNeill if ((ints & ALARM_INT_ALL) != 0) 4792e4f9347SJared McNeill taskqueue_enqueue(taskqueue_thread, &sc->cf_task); 480d69d5ab0SJared McNeill } 481d69d5ab0SJared McNeill 482343044c4SJared McNeill static int 483343044c4SJared McNeill aw_thermal_probe(device_t dev) 484343044c4SJared McNeill { 485343044c4SJared McNeill if (!ofw_bus_status_okay(dev)) 486343044c4SJared McNeill return (ENXIO); 487343044c4SJared McNeill 488343044c4SJared McNeill if (THS_CONF(dev) == NULL) 489343044c4SJared McNeill return (ENXIO); 490343044c4SJared McNeill 491343044c4SJared McNeill device_set_desc(dev, "Allwinner Thermal Sensor Controller"); 492343044c4SJared McNeill return (BUS_PROBE_DEFAULT); 493343044c4SJared McNeill } 494343044c4SJared McNeill 495343044c4SJared McNeill static int 496343044c4SJared McNeill aw_thermal_attach(device_t dev) 497343044c4SJared McNeill { 498343044c4SJared McNeill struct aw_thermal_softc *sc; 499d69d5ab0SJared McNeill clk_t clk_ahb, clk_ths; 500d69d5ab0SJared McNeill hwreset_t rst; 501d69d5ab0SJared McNeill int i, error; 502d69d5ab0SJared McNeill void *ih; 503343044c4SJared McNeill 504343044c4SJared McNeill sc = device_get_softc(dev); 505d69d5ab0SJared McNeill clk_ahb = clk_ths = NULL; 506d69d5ab0SJared McNeill rst = NULL; 507d69d5ab0SJared McNeill ih = NULL; 508343044c4SJared McNeill 509343044c4SJared McNeill sc->conf = THS_CONF(dev); 5102e4f9347SJared McNeill TASK_INIT(&sc->cf_task, 0, aw_thermal_cf_task, sc); 511343044c4SJared McNeill 512d69d5ab0SJared McNeill if (bus_alloc_resources(dev, aw_thermal_spec, sc->res) != 0) { 513343044c4SJared McNeill device_printf(dev, "cannot allocate resources for device\n"); 514343044c4SJared McNeill return (ENXIO); 515343044c4SJared McNeill } 516343044c4SJared McNeill 517d69d5ab0SJared McNeill if (clk_get_by_ofw_name(dev, 0, "ahb", &clk_ahb) == 0) { 518d69d5ab0SJared McNeill error = clk_enable(clk_ahb); 519d69d5ab0SJared McNeill if (error != 0) { 520d69d5ab0SJared McNeill device_printf(dev, "cannot enable ahb clock\n"); 521d69d5ab0SJared McNeill goto fail; 522d69d5ab0SJared McNeill } 523d69d5ab0SJared McNeill } 524d69d5ab0SJared McNeill if (clk_get_by_ofw_name(dev, 0, "ths", &clk_ths) == 0) { 525d69d5ab0SJared McNeill error = clk_set_freq(clk_ths, sc->conf->clk_rate, 0); 526d69d5ab0SJared McNeill if (error != 0) { 527d69d5ab0SJared McNeill device_printf(dev, "cannot set ths clock rate\n"); 528d69d5ab0SJared McNeill goto fail; 529d69d5ab0SJared McNeill } 530d69d5ab0SJared McNeill error = clk_enable(clk_ths); 531d69d5ab0SJared McNeill if (error != 0) { 532d69d5ab0SJared McNeill device_printf(dev, "cannot enable ths clock\n"); 533d69d5ab0SJared McNeill goto fail; 534d69d5ab0SJared McNeill } 535d69d5ab0SJared McNeill } 536d69d5ab0SJared McNeill if (hwreset_get_by_ofw_idx(dev, 0, 0, &rst) == 0) { 537d69d5ab0SJared McNeill error = hwreset_deassert(rst); 538d69d5ab0SJared McNeill if (error != 0) { 539d69d5ab0SJared McNeill device_printf(dev, "cannot de-assert reset\n"); 540d69d5ab0SJared McNeill goto fail; 541d69d5ab0SJared McNeill } 542d69d5ab0SJared McNeill } 543343044c4SJared McNeill 544d69d5ab0SJared McNeill error = bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE, 545d69d5ab0SJared McNeill NULL, aw_thermal_intr, dev, &ih); 546d69d5ab0SJared McNeill if (error != 0) { 547d69d5ab0SJared McNeill device_printf(dev, "cannot setup interrupt handler\n"); 548d69d5ab0SJared McNeill goto fail; 549d69d5ab0SJared McNeill } 550d69d5ab0SJared McNeill 5510a30b4b2SJared McNeill for (i = 0; i < sc->conf->nsensors; i++) { 5520a30b4b2SJared McNeill if (sc->conf->sensors[i].init_alarm > 0) 5530a30b4b2SJared McNeill aw_thermal_setalarm(sc, i, 5540a30b4b2SJared McNeill sc->conf->sensors[i].init_alarm); 5550a30b4b2SJared McNeill if (sc->conf->sensors[i].init_shut > 0) 5560a30b4b2SJared McNeill aw_thermal_setshut(sc, i, 5570a30b4b2SJared McNeill sc->conf->sensors[i].init_shut); 5580a30b4b2SJared McNeill } 5590a30b4b2SJared McNeill 560d69d5ab0SJared McNeill if (aw_thermal_init(sc) != 0) 561d69d5ab0SJared McNeill goto fail; 562d69d5ab0SJared McNeill 563d69d5ab0SJared McNeill for (i = 0; i < sc->conf->nsensors; i++) 564343044c4SJared McNeill SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 565343044c4SJared McNeill SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 566d69d5ab0SJared McNeill OID_AUTO, sc->conf->sensors[i].name, 567343044c4SJared McNeill CTLTYPE_INT | CTLFLAG_RD, 568d69d5ab0SJared McNeill sc, i, aw_thermal_sysctl, "IK0", 569d69d5ab0SJared McNeill sc->conf->sensors[i].desc); 570343044c4SJared McNeill 5713c2b90f1SJared McNeill if (bootverbose) 5723c2b90f1SJared McNeill for (i = 0; i < sc->conf->nsensors; i++) { 5733c2b90f1SJared McNeill device_printf(dev, 5743c2b90f1SJared McNeill "#%d: alarm %dC hyst %dC shut %dC\n", i, 5750a30b4b2SJared McNeill aw_thermal_getalarm(sc, i), 5760a30b4b2SJared McNeill aw_thermal_gethyst(sc, i), 5770a30b4b2SJared McNeill aw_thermal_getshut(sc, i)); 5783c2b90f1SJared McNeill } 5793c2b90f1SJared McNeill 5803c2b90f1SJared McNeill sc->cf_pre_tag = EVENTHANDLER_REGISTER(cpufreq_pre_change, 5813c2b90f1SJared McNeill aw_thermal_cf_pre_change, sc, EVENTHANDLER_PRI_FIRST); 5823c2b90f1SJared McNeill 583343044c4SJared McNeill return (0); 584d69d5ab0SJared McNeill 585d69d5ab0SJared McNeill fail: 586d69d5ab0SJared McNeill if (ih != NULL) 587d69d5ab0SJared McNeill bus_teardown_intr(dev, sc->res[1], ih); 588d69d5ab0SJared McNeill if (rst != NULL) 589d69d5ab0SJared McNeill hwreset_release(rst); 590d69d5ab0SJared McNeill if (clk_ahb != NULL) 591d69d5ab0SJared McNeill clk_release(clk_ahb); 592d69d5ab0SJared McNeill if (clk_ths != NULL) 593d69d5ab0SJared McNeill clk_release(clk_ths); 594d69d5ab0SJared McNeill bus_release_resources(dev, aw_thermal_spec, sc->res); 595d69d5ab0SJared McNeill 596d69d5ab0SJared McNeill return (ENXIO); 597343044c4SJared McNeill } 598343044c4SJared McNeill 599343044c4SJared McNeill static device_method_t aw_thermal_methods[] = { 600343044c4SJared McNeill /* Device interface */ 601343044c4SJared McNeill DEVMETHOD(device_probe, aw_thermal_probe), 602343044c4SJared McNeill DEVMETHOD(device_attach, aw_thermal_attach), 603343044c4SJared McNeill 604343044c4SJared McNeill DEVMETHOD_END 605343044c4SJared McNeill }; 606343044c4SJared McNeill 607343044c4SJared McNeill static driver_t aw_thermal_driver = { 608343044c4SJared McNeill "aw_thermal", 609343044c4SJared McNeill aw_thermal_methods, 610343044c4SJared McNeill sizeof(struct aw_thermal_softc), 611343044c4SJared McNeill }; 612343044c4SJared McNeill 613343044c4SJared McNeill static devclass_t aw_thermal_devclass; 614343044c4SJared McNeill 615343044c4SJared McNeill DRIVER_MODULE(aw_thermal, simplebus, aw_thermal_driver, aw_thermal_devclass, 616343044c4SJared McNeill 0, 0); 617343044c4SJared McNeill MODULE_VERSION(aw_thermal, 1); 618